From dd336686fa2c3cbe1b017fb1c653cc5fec79215a Mon Sep 17 00:00:00 2001 From: Jun Nie Date: Fri, 3 Jul 2026 10:10:19 +0200 Subject: [PATCH] drm/panel: Enable DSC for Visionox VTDR6130 panel Enable display compression (DSC v1.2) for 1080x2400 Visionox VTDR6130 AMOLED DSI panel. This panel is the default panel for the following devices: - SM8550-QRD - SM8550-HDK - SM8650-QRD - SM8650-HDK Enable DSC since now functional in the MSM/DPU/DSI driver. Signed-off-by: Jun Nie Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong Link: https://patch.msgid.link/20260703-topic-sm8x50-vtdr6130-dsc-v4-1-9eff51ec717a@linaro.org --- drivers/gpu/drm/panel/Kconfig | 2 ++ .../gpu/drm/panel/panel-visionox-vtdr6130.c | 18 ++++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 76fb324a2a13..cfbfb371bc67 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -1376,6 +1376,8 @@ config DRM_PANEL_VISIONOX_VTDR6130 depends on OF depends on DRM_MIPI_DSI depends on BACKLIGHT_CLASS_DEVICE + select DRM_DISPLAY_DSC_HELPER + select DRM_DISPLAY_HELPER help Say Y here if you want to enable support for Visionox VTDR6130 1080x2400 AMOLED DSI panel. diff --git a/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c b/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c index 97a79411e1ec..0cdcdbbc766d 100644 --- a/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c +++ b/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c @@ -9,6 +9,7 @@ #include #include +#include #include #include #include @@ -17,6 +18,7 @@ struct visionox_vtdr6130 { struct drm_panel panel; + struct drm_dsc_config dsc; struct mipi_dsi_device *dsi; struct gpio_desc *reset_gpio; struct regulator_bulk_data *supplies; @@ -47,9 +49,12 @@ static int visionox_vtdr6130_on(struct visionox_vtdr6130 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; + struct drm_dsc_picture_parameter_set pps; dsi->mode_flags |= MIPI_DSI_MODE_LPM; + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x01); + mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, @@ -123,6 +128,9 @@ static int visionox_vtdr6130_on(struct visionox_vtdr6130 *ctx) mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); mipi_dsi_msleep(&dsi_ctx, 20); + drm_dsc_pps_payload_pack(&pps, dsi->dsc); + mipi_dsi_picture_parameter_set_multi(&dsi_ctx, &pps); + return dsi_ctx.accum_err; } @@ -269,6 +277,16 @@ static int visionox_vtdr6130_probe(struct mipi_dsi_device *dsi) ctx->dsi = dsi; mipi_dsi_set_drvdata(dsi, ctx); + ctx->dsc.dsc_version_major = 0x1; + ctx->dsc.dsc_version_minor = 0x2; + ctx->dsc.slice_height = 40; + ctx->dsc.slice_width = 540; + ctx->dsc.slice_count = 2; + ctx->dsc.bits_per_component = 8; + ctx->dsc.bits_per_pixel = 8 << 4; + ctx->dsc.block_pred_enable = true; + + dsi->dsc = &ctx->dsc; dsi->lanes = 4; dsi->format = MIPI_DSI_FMT_RGB888; dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_NO_EOT_PACKET |