mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-04-04 22:54:43 -04:00
Merge branch 'for-2.6.25' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into for-2.6.25
This commit is contained in:
@@ -393,9 +393,39 @@ struct dbg {
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u8 res2[0x48];
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} __attribute__ ((packed));
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/* RISC Special Registers (Trap and Breakpoint) */
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/*
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* RISC Special Registers (Trap and Breakpoint). These are described in
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* the QE Developer's Handbook.
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*/
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struct rsp {
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u32 reg[0x40]; /* 64 32-bit registers */
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__be32 tibcr[16]; /* Trap/instruction breakpoint control regs */
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u8 res0[64];
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__be32 ibcr0;
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__be32 ibs0;
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__be32 ibcnr0;
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u8 res1[4];
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__be32 ibcr1;
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__be32 ibs1;
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__be32 ibcnr1;
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__be32 npcr;
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__be32 dbcr;
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__be32 dbar;
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__be32 dbamr;
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__be32 dbsr;
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__be32 dbcnr;
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u8 res2[12];
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__be32 dbdr_h;
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__be32 dbdr_l;
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__be32 dbdmr_h;
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__be32 dbdmr_l;
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__be32 bsr;
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__be32 bor;
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__be32 bior;
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u8 res3[4];
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__be32 iatr[4];
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__be32 eccr; /* Exception control configuration register */
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__be32 eicr;
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u8 res4[0x100-0xf8];
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} __attribute__ ((packed));
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struct qe_immap {
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@@ -51,6 +51,7 @@ extern unsigned long __init __lmb_alloc_base(unsigned long size,
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extern unsigned long __init lmb_phys_mem_size(void);
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extern unsigned long __init lmb_end_of_DRAM(void);
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extern void __init lmb_enforce_memory_limit(unsigned long memory_limit);
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extern int __init lmb_is_reserved(unsigned long addr);
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extern void lmb_dump_all(void);
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@@ -8,6 +8,7 @@
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#ifndef __ASM_POWERPC_MPC8260_H__
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#define __ASM_POWERPC_MPC8260_H__
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#define MPC82XX_BCR_PLDP 0x00800000 /* Pipeline Maximum Depth */
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#ifdef CONFIG_8260
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@@ -152,9 +152,6 @@ extern void setup_indirect_pci(struct pci_controller* hose,
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resource_size_t cfg_addr,
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resource_size_t cfg_data, u32 flags);
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extern void setup_grackle(struct pci_controller *hose);
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extern void __init update_bridge_resource(struct pci_dev *dev,
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struct resource *res);
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#else /* CONFIG_PPC64 */
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/*
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@@ -94,6 +94,58 @@ unsigned long qe_muram_alloc_fixed(unsigned long offset, int size);
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void qe_muram_dump(void);
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void *qe_muram_addr(unsigned long offset);
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/* Structure that defines QE firmware binary files.
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*
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* See Documentation/powerpc/qe-firmware.txt for a description of these
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* fields.
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*/
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struct qe_firmware {
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struct qe_header {
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__be32 length; /* Length of the entire structure, in bytes */
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u8 magic[3]; /* Set to { 'Q', 'E', 'F' } */
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u8 version; /* Version of this layout. First ver is '1' */
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} header;
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u8 id[62]; /* Null-terminated identifier string */
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u8 split; /* 0 = shared I-RAM, 1 = split I-RAM */
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u8 count; /* Number of microcode[] structures */
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struct {
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__be16 model; /* The SOC model */
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u8 major; /* The SOC revision major */
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u8 minor; /* The SOC revision minor */
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} __attribute__ ((packed)) soc;
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u8 padding[4]; /* Reserved, for alignment */
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__be64 extended_modes; /* Extended modes */
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__be32 vtraps[8]; /* Virtual trap addresses */
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u8 reserved[4]; /* Reserved, for future expansion */
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struct qe_microcode {
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u8 id[32]; /* Null-terminated identifier */
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__be32 traps[16]; /* Trap addresses, 0 == ignore */
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__be32 eccr; /* The value for the ECCR register */
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__be32 iram_offset; /* Offset into I-RAM for the code */
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__be32 count; /* Number of 32-bit words of the code */
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__be32 code_offset; /* Offset of the actual microcode */
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u8 major; /* The microcode version major */
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u8 minor; /* The microcode version minor */
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u8 revision; /* The microcode version revision */
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u8 padding; /* Reserved, for alignment */
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u8 reserved[4]; /* Reserved, for future expansion */
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} __attribute__ ((packed)) microcode[1];
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/* All microcode binaries should be located here */
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/* CRC32 should be located here, after the microcode binaries */
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} __attribute__ ((packed));
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struct qe_firmware_info {
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char id[64]; /* Firmware name */
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u32 vtraps[8]; /* Virtual trap addresses */
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u64 extended_modes; /* Extended modes */
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};
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/* Upload a firmware to the QE */
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int qe_upload_firmware(const struct qe_firmware *firmware);
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/* Obtain information on the uploaded firmware */
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struct qe_firmware_info *qe_get_firmware_info(void);
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/* Buffer descriptors */
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struct qe_bd {
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__be16 status;
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@@ -329,6 +381,15 @@ enum comm_dir {
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#define QE_SDEBCR_BA_MASK 0x01FFFFFF
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/* Communication Processor */
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#define QE_CP_CERCR_MEE 0x8000 /* Multi-user RAM ECC enable */
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#define QE_CP_CERCR_IEE 0x4000 /* Instruction RAM ECC enable */
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#define QE_CP_CERCR_CIR 0x0800 /* Common instruction RAM */
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/* I-RAM */
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#define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */
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#define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */
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/* UPC */
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#define UPGCR_PROTOCOL 0x80000000 /* protocol ul2 or pl2 */
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#define UPGCR_TMS 0x40000000 /* Transmit master/slave mode */
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@@ -169,6 +169,8 @@ extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
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extern void bad_page_fault(struct pt_regs *, unsigned long, int);
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extern int die(const char *, struct pt_regs *, long);
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extern void _exception(int, struct pt_regs *, int, unsigned long);
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extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
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#ifdef CONFIG_BOOKE_WDT
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extern u32 booke_wdt_enabled;
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extern u32 booke_wdt_period;
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@@ -1,38 +1,31 @@
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#ifndef __PHY_FIXED_H
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#define __PHY_FIXED_H
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#define MII_REGS_NUM 29
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/* max number of virtual phy stuff */
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#define MAX_PHY_AMNT 10
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/*
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The idea is to emulate normal phy behavior by responding with
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pre-defined values to mii BMCR read, so that read_status hook could
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take all the needed info.
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*/
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struct fixed_phy_status {
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u8 link;
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u16 speed;
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u8 duplex;
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int link;
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int speed;
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int duplex;
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int pause;
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int asym_pause;
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};
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/*-----------------------------------------------------------------------------
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* Private information hoder for mii_bus
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*-----------------------------------------------------------------------------*/
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struct fixed_info {
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u16 *regs;
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u8 regs_num;
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struct fixed_phy_status phy_status;
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struct phy_device *phydev; /* pointer to the container */
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/* link & speed cb */
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int (*link_update) (struct net_device *, struct fixed_phy_status *);
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#ifdef CONFIG_FIXED_PHY
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extern int fixed_phy_add(unsigned int irq, int phy_id,
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struct fixed_phy_status *status);
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#else
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static inline int fixed_phy_add(unsigned int irq, int phy_id,
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struct fixed_phy_status *status)
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{
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return -ENODEV;
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}
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#endif /* CONFIG_FIXED_PHY */
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};
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int fixed_mdio_set_link_update(struct phy_device *,
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int (*link_update) (struct net_device *, struct fixed_phy_status *));
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struct fixed_info *fixed_mdio_get_phydev (int phydev_ind);
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/*
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* This function issued only by fixed_phy-aware drivers, no need
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* protect it with #ifdef
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*/
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extern int fixed_phy_set_link_update(struct phy_device *phydev,
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int (*link_update)(struct net_device *,
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struct fixed_phy_status *));
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#endif /* __PHY_FIXED_H */
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