From 5a8103a6fb0ae9cf99c0271b17474468d6bae2b2 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 4 Mar 2026 18:21:57 +0100 Subject: [PATCH 1/5] genirq: Document interaction between and DT binding defines Document that the DT binding definitions in shadow the first six IRQ_TYPE_* definitions in . The values must be the same anyway, so this is harmless (as long as the latter is included first when both are included), but it is good to document this explicitly. Signed-off-by: Geert Uytterhoeven Signed-off-by: Thomas Gleixner Link: https://patch.msgid.link/fbcc65dcee6c5437fab5ef18d21766bb4effb7cb.1772644406.git.geert+renesas@glider.be --- include/linux/irq.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/linux/irq.h b/include/linux/irq.h index 951acbdb9f84..efa514ee562f 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -35,6 +35,10 @@ enum irqchip_irq_state; * * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h * + * Note that the first 6 definitions are shadowed by C preprocessor definitions + * in include/dt-bindings/interrupt-controller/irq.h. This is not an issue, as + * the actual values must be the same, due to being part of the stable DT ABI. + * * IRQ_TYPE_NONE - default, unspecified type * IRQ_TYPE_EDGE_RISING - rising edge triggered * IRQ_TYPE_EDGE_FALLING - falling edge triggered From 56c167a0c0fa24aa6eb14c4e81cc4bad1048d651 Mon Sep 17 00:00:00 2001 From: Nam Cao Date: Mon, 16 Mar 2026 08:28:50 +0100 Subject: [PATCH 2/5] genirq/matrix, LoongArch: Delete IRQ_MATRIX_BITS leftovers Delete IRQ_MATRIX_BITS leftovers after commit 5b98d210ac1e ("genirq/matrix: Dynamic bitmap allocation") has made IRQ_MATRIX_BITS obsolete. Signed-off-by: Nam Cao Signed-off-by: Thomas Gleixner Link: https://patch.msgid.link/20260316072850.467995-1-namcao@linutronix.de --- arch/loongarch/include/asm/irq.h | 1 - kernel/irq/matrix.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/loongarch/include/asm/irq.h b/arch/loongarch/include/asm/irq.h index 3943647503a9..537add26daf4 100644 --- a/arch/loongarch/include/asm/irq.h +++ b/arch/loongarch/include/asm/irq.h @@ -48,7 +48,6 @@ void spurious_interrupt(void); */ #define NR_VECTORS 256 #define NR_LEGACY_VECTORS 16 -#define IRQ_MATRIX_BITS NR_VECTORS #define AVEC_IRQ_SHIFT 4 #define AVEC_IRQ_BIT 8 diff --git a/kernel/irq/matrix.c b/kernel/irq/matrix.c index 0f79a4abea05..faafb43a4e61 100644 --- a/kernel/irq/matrix.c +++ b/kernel/irq/matrix.c @@ -39,7 +39,7 @@ struct irq_matrix { /** * irq_alloc_matrix - Allocate a irq_matrix structure and initialize it - * @matrix_bits: Number of matrix bits must be <= IRQ_MATRIX_BITS + * @matrix_bits: Number of matrix bits * @alloc_start: From which bit the allocation search starts * @alloc_end: At which bit the allocation search ends, i.e first * invalid bit From 34d85ad42604fbb5a8903488c6a7e2862e2d0254 Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Wed, 1 Apr 2026 14:13:34 +0200 Subject: [PATCH 3/5] genirq/affinity: Remove cpus_read_lock() while reading cpu_possible_mask cpu_possible_mask is set early during boot based on information from the firmware. After that it remains read only and is never changed. Therefore there is no need to acquire the CPU-hotplug lock while reading it. Remove cpus_read_*() while accessing cpu_possible_mask. Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Thomas Gleixner Link: https://patch.msgid.link/20260401121334.xeMOSC1v@linutronix.de --- kernel/irq/affinity.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/kernel/irq/affinity.c b/kernel/irq/affinity.c index 85c45cfe7223..78f2418a8925 100644 --- a/kernel/irq/affinity.c +++ b/kernel/irq/affinity.c @@ -115,13 +115,10 @@ unsigned int irq_calc_affinity_vectors(unsigned int minvec, unsigned int maxvec, if (resv > minvec) return 0; - if (affd->calc_sets) { + if (affd->calc_sets) set_vecs = maxvec - resv; - } else { - cpus_read_lock(); + else set_vecs = cpumask_weight(cpu_possible_mask); - cpus_read_unlock(); - } return resv + min(set_vecs, maxvec - resv); } From fd7400cfcbaaa1f3d1b904711d9daf029e996364 Mon Sep 17 00:00:00 2001 From: Michael Kelley Date: Thu, 2 Apr 2026 13:23:59 -0700 Subject: [PATCH 4/5] genirq/chip: Invoke add_interrupt_randomness() in handle_percpu_devid_irq() handle_percpu_devid_irq() is a version of handle_percpu_irq() but with the addition of a pointer to a per-CPU devid. However, handle_percpu_irq() invokes add_interrupt_randomness(), while handle_percpu_devid_irq() currently does not. Add the missing add_interrupt_randomness(), as it is needed when per-CPU interrupts with devid's are used in VMs for interrupts from the hypervisor. Signed-off-by: Michael Kelley Signed-off-by: Thomas Gleixner Link: https://patch.msgid.link/20260402202400.1707-2-mhklkml@zohomail.com --- kernel/irq/chip.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index 6147a07d0127..6c9b1dc4e7d4 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -14,6 +14,7 @@ #include #include #include +#include #include @@ -929,6 +930,8 @@ void handle_percpu_devid_irq(struct irq_desc *desc) enabled ? " and unmasked" : "", irq, cpu); } + add_interrupt_randomness(irq); + if (chip->irq_eoi) chip->irq_eoi(&desc->irq_data); } From e8be82c2d77ec1bb0148406e54b105028a83537e Mon Sep 17 00:00:00 2001 From: Michael Kelley Date: Thu, 2 Apr 2026 13:24:00 -0700 Subject: [PATCH 5/5] Drivers: hv: Move add_interrupt_randomness() to hypervisor callback sysvec The Hyper-V ISRs, for normal guests and when running in the hypervisor root patition, are calling add_interrupt_randomness() as a primary source of entropy. The call is currently in the ISRs as a common place to handle both x86/x64 and arm64. On x86/x64, hypervisor interrupts come through a custom sysvec entry, and do not go through a generic interrupt handler. On arm64, hypervisor interrupts come through an emulated GICv3. GICv3 uses the generic handler handle_percpu_devid_irq(), which does not do add_interrupt_randomness() -- unlike its counterpart handle_percpu_irq(). But handle_percpu_devid_irq() is now updated to do the add_interrupt_randomness(). So add_interrupt_randomness() is now needed only in Hyper-V's x86/x64 custom sysvec path. Move add_interrupt_randomness() from the Hyper-V ISRs into the Hyper-V x86/x64 custom sysvec path, matching the existing STIMER0 sysvec path. With this change, add_interrupt_randomness() is no longer called from any device drivers, which is appropriate. Signed-off-by: Michael Kelley Signed-off-by: Thomas Gleixner Acked-by: Wei Liu Link: https://patch.msgid.link/20260402202400.1707-3-mhklkml@zohomail.com --- arch/x86/kernel/cpu/mshyperv.c | 2 ++ drivers/hv/mshv_synic.c | 3 --- drivers/hv/vmbus_drv.c | 3 --- 3 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 9befdc557d9e..a7dfc29d3470 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -161,6 +161,8 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback) if (vmbus_handler) vmbus_handler(); + add_interrupt_randomness(HYPERVISOR_CALLBACK_VECTOR); + if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED) apic_eoi(); diff --git a/drivers/hv/mshv_synic.c b/drivers/hv/mshv_synic.c index 43f1bcbbf2d3..e2288a726fec 100644 --- a/drivers/hv/mshv_synic.c +++ b/drivers/hv/mshv_synic.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include @@ -445,8 +444,6 @@ void mshv_isr(void) mb(); if (msg->header.message_flags.msg_pending) hv_set_non_nested_msr(HV_MSR_EOM, 0); - - add_interrupt_randomness(mshv_sint_vector); } else { pr_warn_once("%s: unknown message type 0x%x\n", __func__, msg->header.message_type); diff --git a/drivers/hv/vmbus_drv.c b/drivers/hv/vmbus_drv.c index bc4fc1951ae1..e7ac79e2fb49 100644 --- a/drivers/hv/vmbus_drv.c +++ b/drivers/hv/vmbus_drv.c @@ -32,7 +32,6 @@ #include #include #include -#include #include #include #include @@ -1361,8 +1360,6 @@ static void __vmbus_isr(void) vmbus_message_sched(hv_cpu, hv_cpu->hyp_synic_message_page); vmbus_message_sched(hv_cpu, hv_cpu->para_synic_message_page); - - add_interrupt_randomness(vmbus_interrupt); } static DEFINE_PER_CPU(bool, vmbus_irq_pending);