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drm/amdkfd: Update LDS, Scratch base for 57bit address

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For 5-level page tables, update compute vmid sh_mem_base LDS aperture
and Scratch aperture base address to above 57-bit, use the same setting
from gfx vmid, we can remove the duplicate macro.

Update queue pdd lds_base and scratch_base to the same value as
sh_mem_base setting. Then application get process apertures return the
correct value to access LDS and Scratch memory for 57bit address 5-level
page tables. This may pass to MES in future when mapping queue.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Acked-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Philip Yang
2025-04-22 16:30:02 -04:00
committed by Alex Deucher
parent 6f744d7976
commit db1882b3ff
2 changed files with 14 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
View File

@@ -1362,9 +1362,6 @@ static void gfx_v12_1_setup_rb(struct amdgpu_device *adev)
adev->gfx.config.num_rbs = hweight32(active_rb_bitmap);
}
#define LDS_APP_BASE 0x2000
#define SCRATCH_APP_BASE 0x4
static void gfx_v12_1_xcc_init_compute_vmid(struct amdgpu_device *adev,
int xcc_id)
{
@@ -1374,12 +1371,13 @@ static void gfx_v12_1_xcc_init_compute_vmid(struct amdgpu_device *adev,
/*
* Configure apertures:
* LDS: 0x60000000'00000000 - 0x60000001'00000000 (4GB)
* Scratch: 0x60000001'00000000 - 0x60000002'00000000 (4GB)
* GPUVM: 0x60010000'00000000 - 0x60020000'00000000 (1TB)
* LDS: 0x20000000'00000000 - 0x20000001'00000000 (4GB)
* Scratch: 0x10000000'00000000 - 0x10000001'00000000 (4GB)
*/
sh_mem_bases = (LDS_APP_BASE << SH_MEM_BASES__SHARED_BASE__SHIFT) |
(SCRATCH_APP_BASE << SH_MEM_BASES__PRIVATE_BASE__SHIFT);
sh_mem_bases = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
(adev->gmc.private_aperture_start >> 58));
sh_mem_bases = REG_SET_FIELD(sh_mem_bases, SH_MEM_BASES, SHARED_BASE,
(adev->gmc.shared_aperture_start >> 48));
mutex_lock(&adev->srbm_mutex);
for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) {

10
drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
View File

@@ -342,14 +342,20 @@ static void kfd_init_apertures_vi(struct kfd_process_device *pdd, uint8_t id)
static void kfd_init_apertures_v9(struct kfd_process_device *pdd, uint8_t id)
{
pdd->lds_base = MAKE_LDS_APP_BASE_V9();
if (pdd->dev->adev->vm_manager.root_level == AMDGPU_VM_PDB3)
pdd->lds_base = pdd->dev->adev->gmc.shared_aperture_start;
else
pdd->lds_base = MAKE_LDS_APP_BASE_V9();
pdd->lds_limit = MAKE_LDS_APP_LIMIT(pdd->lds_base);
pdd->gpuvm_base = AMDGPU_VA_RESERVED_BOTTOM;
pdd->gpuvm_limit =
pdd->dev->kfd->shared_resources.gpuvm_size - 1;
pdd->scratch_base = MAKE_SCRATCH_APP_BASE_V9();
if (pdd->dev->adev->vm_manager.root_level == AMDGPU_VM_PDB3)
pdd->scratch_base = pdd->dev->adev->gmc.private_aperture_start;
else
pdd->scratch_base = MAKE_SCRATCH_APP_BASE_V9();
pdd->scratch_limit = MAKE_SCRATCH_APP_LIMIT(pdd->scratch_base);
/*