mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-12 19:44:51 -04:00
Code Issues Packages Projects Releases Wiki Activity

Merge with rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git

Browse Source
This commit is contained in:
Jaroslav Kysela
2005-06-22 12:19:24 +02:00
parent fae6ec69c8 2a5a68b840
commit da04b128cf
548 changed files with 27719 additions and 10691 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
include/asm-alpha/smp.h
View File

@@ -43,7 +43,7 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS];
#define PROC_CHANGE_PENALTY 20
#define hard_smp_processor_id() __hard_smp_processor_id()
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
extern cpumask_t cpu_present_mask;
extern cpumask_t cpu_online_map;

2
include/asm-arm/smp.h
View File

@@ -21,7 +21,7 @@
# error "<asm-arm/smp.h> included in non-SMP build"
#endif
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
extern cpumask_t cpu_present_mask;
#define cpu_possible_map cpu_present_mask

2
include/asm-arm/system.h
View File

@@ -308,7 +308,7 @@ do { \
({ \
unsigned long flags; \
local_save_flags(flags); \
flags & PSR_I_BIT; \
(int)(flags & PSR_I_BIT); \
})
#ifdef CONFIG_SMP

3
include/asm-generic/pgtable.h
View File

@@ -125,6 +125,9 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addres
#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
#define page_test_and_clear_dirty(page) (0)
#define pte_maybe_dirty(pte) pte_dirty(pte)
#else
#define pte_maybe_dirty(pte) (1)
#endif
#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG

1
include/asm-i386/page.h
View File

@@ -68,6 +68,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
#define HPAGE_MASK (~(HPAGE_SIZE - 1))
#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
#endif
#define pgd_val(x) ((x).pgd)

2
include/asm-i386/pgtable.h
View File

@@ -236,6 +236,7 @@ static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return
static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; }
static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; }
static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; }
static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PRESENT | _PAGE_PSE; return pte; }
#ifdef CONFIG_X86_PAE
# include <asm/pgtable-3level.h>
@@ -275,7 +276,6 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
*/
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
#define mk_pte_huge(entry) ((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE)
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{

2
include/asm-i386/smp.h
View File

@@ -51,7 +51,7 @@ extern u8 x86_cpu_to_apicid[];
* from the initial startup. We map APIC_BASE very early in page_setup(),
* so this is correct in the x86 case.
*/
#define __smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
extern cpumask_t cpu_callout_map;
extern cpumask_t cpu_callin_map;

2
include/asm-i386/unistd.h
View File

@@ -256,7 +256,7 @@
#define __NR_io_submit 248
#define __NR_io_cancel 249
#define __NR_fadvise64 250
#define __NR_set_zone_reclaim 251
#define __NR_exit_group 252
#define __NR_lookup_dcookie 253
#define __NR_epoll_create 254

14
include/asm-ia64/mmzone.h
View File

@@ -15,6 +15,20 @@
#include <asm/page.h>
#include <asm/meminit.h>
static inline int pfn_to_nid(unsigned long pfn)
{
#ifdef CONFIG_NUMA
extern int paddr_to_nid(unsigned long);
int nid = paddr_to_nid(pfn << PAGE_SHIFT);
if (nid < 0)
return 0;
else
return nid;
#else
return 0;
#endif
}
#ifdef CONFIG_DISCONTIGMEM
#ifdef CONFIG_IA64_DIG /* DIG systems are small */

1
include/asm-ia64/pgtable.h
View File

@@ -283,6 +283,7 @@ ia64_phys_addr_valid (unsigned long addr)
#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_A))
#define pte_mkclean(pte) (__pte(pte_val(pte) & ~_PAGE_D))
#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_D))
#define pte_mkhuge(pte) (__pte(pte_val(pte) | _PAGE_P))
/*
* Macro to a page protection value as "uncacheable". Note that "protection" is really a

2
include/asm-ia64/smp.h
View File

@@ -46,7 +46,7 @@ ia64_get_lid (void)
#define SMP_IRQ_REDIRECTION (1 << 0)
#define SMP_IPI_REDIRECTION (1 << 1)
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
extern struct smp_boot_data {
int cpu_count;

59
include/asm-ia64/sn/mspec.h Normal file
View File

@@ -0,0 +1,59 @@
/*
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved.
*/
#ifndef _ASM_IA64_SN_MSPEC_H
#define _ASM_IA64_SN_MSPEC_H
#define FETCHOP_VAR_SIZE 64 /* 64 byte per fetchop variable */
#define FETCHOP_LOAD 0
#define FETCHOP_INCREMENT 8
#define FETCHOP_DECREMENT 16
#define FETCHOP_CLEAR 24
#define FETCHOP_STORE 0
#define FETCHOP_AND 24
#define FETCHOP_OR 32
#define FETCHOP_CLEAR_CACHE 56
#define FETCHOP_LOAD_OP(addr, op) ( \
*(volatile long *)((char*) (addr) + (op)))
#define FETCHOP_STORE_OP(addr, op, x) ( \
*(volatile long *)((char*) (addr) + (op)) = (long) (x))
#ifdef __KERNEL__
/*
* Each Atomic Memory Operation (AMO formerly known as fetchop)
* variable is 64 bytes long. The first 8 bytes are used. The
* remaining 56 bytes are unaddressable due to the operation taking
* that portion of the address.
*
* NOTE: The AMO_t _MUST_ be placed in either the first or second half
* of the cache line. The cache line _MUST NOT_ be used for anything
* other than additional AMO_t entries. This is because there are two
* addresses which reference the same physical cache line. One will
* be a cached entry with the memory type bits all set. This address
* may be loaded into processor cache. The AMO_t will be referenced
* uncached via the memory special memory type. If any portion of the
* cached cache-line is modified, when that line is flushed, it will
* overwrite the uncached value in physical memory and lead to
* inconsistency.
*/
typedef struct {
u64 variable;
u64 unused[7];
} AMO_t;
#endif /* __KERNEL__ */
#endif /* _ASM_IA64_SN_MSPEC_H */

12
include/asm-ia64/uncached.h Normal file
View File

@@ -0,0 +1,12 @@
/*
* Copyright (C) 2001-2005 Silicon Graphics, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License
* as published by the Free Software Foundation.
*
* Prototypes for the uncached page allocator
*/
extern unsigned long uncached_alloc_page(int nid);
extern void uncached_free_page(unsigned long);

1
include/asm-ia64/unistd.h
View File

@@ -263,6 +263,7 @@
#define __NR_add_key 1271
#define __NR_request_key 1272
#define __NR_keyctl 1273
#define __NR_set_zone_reclaim 1276
#ifdef __KERNEL__

39
include/asm-m32r/div64.h
View File

@@ -1,38 +1 @@
#ifndef _ASM_M32R_DIV64
#define _ASM_M32R_DIV64
/* $Id$ */
/* unsigned long long division.
* Input:
* unsigned long long n
* unsigned long base
* Output:
* n = n / base;
* return value = n % base;
*/
#define do_div(n, base) \
({ \
unsigned long _res, _high, _mid, _low; \
\
_low = (n) & 0xffffffffUL; \
_high = (n) >> 32; \
if (_high) { \
_mid = (_high % (unsigned long)(base)) << 16; \
_high = _high / (unsigned long)(base); \
_mid += _low >> 16; \
_low &= 0x0000ffffUL; \
_low += (_mid % (unsigned long)(base)) << 16; \
_mid = _mid / (unsigned long)(base); \
_res = _low % (unsigned long)(base); \
_low = _low / (unsigned long)(base); \
n = _low + ((long long)_mid << 16) + \
((long long)_high << 32); \
} else { \
_res = _low % (unsigned long)(base); \
n = (_low / (unsigned long)(base)); \
} \
_res; \
})
#endif /* _ASM_M32R_DIV64 */
#include <asm-generic/div64.h>

2
include/asm-m32r/ide.h
View File

@@ -35,7 +35,7 @@
static __inline__ int ide_default_irq(unsigned long base)
{
switch (base) {
#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2)
#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3)
case 0x1f0: return PLD_IRQ_CFIREQ;
default:
return 0;

1
include/asm-m32r/m32102.h
View File

@@ -175,6 +175,7 @@
#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
#define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */
#define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */
#define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */
#define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */

468
include/asm-m32r/m32102peri.h
View File

@@ -1,468 +0,0 @@
/* $Id$
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000,2001 by Hiroyuki Kondo
*/
#ifndef __ASSEMBLY__
typedef void V;
typedef char B;
typedef short S;
typedef int W;
typedef long L;
typedef float F;
typedef double D;
typedef unsigned char UB;
typedef unsigned short US;
typedef unsigned int UW;
typedef unsigned long UL;
typedef const unsigned int CUW;
/*********************************
M32102 ICU
*********************************/
#define ICUISTS (UW *)0xa0EFF004
#define ICUIREQ0 (UW *)0xa0EFF008
#define ICUIREQ1 (UW *)0xa0EFF00C
#define ICUSBICR (UW *)0xa0EFF018
#define ICUIMASK (UW *)0xa0EFF01C
#define ICUCR1 (UW *)0xa0EFF200 /* INT0 */
#define ICUCR2 (UW *)0xa0EFF204 /* INT1 */
#define ICUCR3 (UW *)0xa0EFF208 /* INT2 */
#define ICUCR4 (UW *)0xa0EFF20C /* INT3 */
#define ICUCR5 (UW *)0xa0EFF210 /* INT4 */
#define ICUCR6 (UW *)0xa0EFF214 /* INT5 */
#define ICUCR7 (UW *)0xa0EFF218 /* INT6 */
#define ICUCR16 (UW *)0xa0EFF23C /* MFT0 */
#define ICUCR17 (UW *)0xa0EFF240 /* MFT1 */
#define ICUCR18 (UW *)0xa0EFF244 /* MFT2 */
#define ICUCR19 (UW *)0xa0EFF248 /* MFT3 */
#define ICUCR20 (UW *)0xa0EFF24C /* MFT4 */
#define ICUCR21 (UW *)0xa0EFF250 /* MFT5 */
#define ICUCR32 (UW *)0xa0EFF27C /* DMA0 */
#define ICUCR33 (UW *)0xa0EFF280 /* DMA1 */
#define ICUCR48 (UW *)0xa0EFF2BC /* SIO0R */
#define ICUCR49 (UW *)0xa0EFF2C0 /* SIO0S */
#define ICUCR50 (UW *)0xa0EFF2C4 /* SIO1R */
#define ICUCR51 (UW *)0xa0EFF2C8 /* SIO1S */
#define ICUCR52 (UW *)0xa0EFF2CC /* SIO2R */
#define ICUCR53 (UW *)0xa0EFF2D0 /* SIO2S */
#define ICUCR54 (UW *)0xa0EFF2D4 /* SIO3R */
#define ICUCR55 (UW *)0xa0EFF2D8 /* SIO3S */
#define ICUCR56 (UW *)0xa0EFF2DC /* SIO4R */
#define ICUCR57 (UW *)0xa0EFF2E0 /* SIO4S */
/*********************************
M32102 MFT
*********************************/
#define MFTCR (US *)0xa0EFC002
#define MFTRPR (UB *)0xa0EFC006
#define MFT0MOD (US *)0xa0EFC102
#define MFT0BOS (US *)0xa0EFC106
#define MFT0CUT (US *)0xa0EFC10A
#define MFT0RLD (US *)0xa0EFC10E
#define MFT0CRLD (US *)0xa0EFC112
#define MFT1MOD (US *)0xa0EFC202
#define MFT1BOS (US *)0xa0EFC206
#define MFT1CUT (US *)0xa0EFC20A
#define MFT1RLD (US *)0xa0EFC20E
#define MFT1CRLD (US *)0xa0EFC212
#define MFT2MOD (US *)0xa0EFC302
#define MFT2BOS (US *)0xa0EFC306
#define MFT2CUT (US *)0xa0EFC30A
#define MFT2RLD (US *)0xa0EFC30E
#define MFT2CRLD (US *)0xa0EFC312
#define MFT3MOD (US *)0xa0EFC402
#define MFT3CUT (US *)0xa0EFC40A
#define MFT3RLD (US *)0xa0EFC40E
#define MFT3CRLD (US *)0xa0EFC412
#define MFT4MOD (US *)0xa0EFC502
#define MFT4CUT (US *)0xa0EFC50A
#define MFT4RLD (US *)0xa0EFC50E
#define MFT4CRLD (US *)0xa0EFC512
#define MFT5MOD (US *)0xa0EFC602
#define MFT5CUT (US *)0xa0EFC60A
#define MFT5RLD (US *)0xa0EFC60E
#define MFT5CRLD (US *)0xa0EFC612
/*********************************
M32102 SIO
*********************************/
#define SIO0CR (volatile int *)0xa0efd000
#define SIO0MOD0 (volatile int *)0xa0efd004
#define SIO0MOD1 (volatile int *)0xa0efd008
#define SIO0STS (volatile int *)0xa0efd00c
#define SIO0IMASK (volatile int *)0xa0efd010
#define SIO0BAUR (volatile int *)0xa0efd014
#define SIO0RBAUR (volatile int *)0xa0efd018
#define SIO0TXB (volatile int *)0xa0efd01c
#define SIO0RXB (volatile int *)0xa0efd020
#define SIO1CR (volatile int *)0xa0efd100
#define SIO1MOD0 (volatile int *)0xa0efd104
#define SIO1MOD1 (volatile int *)0xa0efd108
#define SIO1STS (volatile int *)0xa0efd10c
#define SIO1IMASK (volatile int *)0xa0efd110
#define SIO1BAUR (volatile int *)0xa0efd114
#define SIO1RBAUR (volatile int *)0xa0efd118
#define SIO1TXB (volatile int *)0xa0efd11c
#define SIO1RXB (volatile int *)0xa0efd120
/*********************************
M32102 PORT
*********************************/
#define PIEN (UB *)0xa0EF1003 /* input enable */
#define P0DATA (UB *)0xa0EF1020 /* data */
#define P1DATA (UB *)0xa0EF1021
#define P2DATA (UB *)0xa0EF1022
#define P3DATA (UB *)0xa0EF1023
#define P4DATA (UB *)0xa0EF1024
#define P5DATA (UB *)0xa0EF1025
#define P6DATA (UB *)0xa0EF1026
#define P7DATA (UB *)0xa0EF1027
#define P0DIR (UB *)0xa0EF1040 /* direction */
#define P1DIR (UB *)0xa0EF1041
#define P2DIR (UB *)0xa0EF1042
#define P3DIR (UB *)0xa0EF1043
#define P4DIR (UB *)0xa0EF1044
#define P5DIR (UB *)0xa0EF1045
#define P6DIR (UB *)0xa0EF1046
#define P7DIR (UB *)0xa0EF1047
#define P0MOD (US *)0xa0EF1060 /* mode control */
#define P1MOD (US *)0xa0EF1062
#define P2MOD (US *)0xa0EF1064
#define P3MOD (US *)0xa0EF1066
#define P4MOD (US *)0xa0EF1068
#define P5MOD (US *)0xa0EF106A
#define P6MOD (US *)0xa0EF106C
#define P7MOD (US *)0xa0EF106E
#define P0ODCR (UB *)0xa0EF1080 /* open-drain control */
#define P1ODCR (UB *)0xa0EF1081
#define P2ODCR (UB *)0xa0EF1082
#define P3ODCR (UB *)0xa0EF1083
#define P4ODCR (UB *)0xa0EF1084
#define P5ODCR (UB *)0xa0EF1085
#define P6ODCR (UB *)0xa0EF1086
#define P7ODCR (UB *)0xa0EF1087
/*********************************
M32102 Cache
********************************/
#define MCCR (US *)0xFFFFFFFE
#else /* __ASSEMBLY__ */
;;
;; PIO 0x80ef1000
;;
#define PIEN 0xa0ef1000
#define P0DATA 0xa0ef1020
#define P1DATA 0xa0ef1021
#define P2DATA 0xa0ef1022
#define P3DATA 0xa0ef1023
#define P4DATA 0xa0ef1024
#define P5DATA 0xa0ef1025
#define P6DATA 0xa0ef1026
#define P7DATA 0xa0ef1027
#define P0DIR 0xa0ef1040
#define P1DIR 0xa0ef1041
#define P2DIR 0xa0ef1042
#define P3DIR 0xa0ef1043
#define P4DIR 0xa0ef1044
#define P5DIR 0xa0ef1045
#define P6DIR 0xa0ef1046
#define P7DIR 0xa0ef1047
#define P0MOD 0xa0ef1060
#define P1MOD 0xa0ef1062
#define P2MOD 0xa0ef1064
#define P3MOD 0xa0ef1066
#define P4MOD 0xa0ef1068
#define P5MOD 0xa0ef106a
#define P6MOD 0xa0ef106c
#define P7MOD 0xa0ef106e
;
#define P0ODCR 0xa0ef1080
#define P1ODCR 0xa0ef1081
#define P2ODCR 0xa0ef1082
#define P3ODCR 0xa0ef1083
#define P4ODCR 0xa0ef1084
#define P5ODCR 0xa0ef1085
#define P6ODCR 0xa0ef1086
#define P7ODCR 0xa0ef1087
;;
;; WDT 0xa0ef2000
;;
#define WDTCR 0xa0ef2000
;;
;; CLK 0xa0ef4000
;;
#define CPUCLKCR 0xa0ef4000
#define CLKMOD 0xa0ef4004
#define PLLCR 0xa0ef4008
;;
;; BSEL 0xa0ef5000
;;
#define BSEL0CR 0xa0ef5000
#define BSEL1CR 0xa0ef5004
#define BSEL2CR 0xa0ef5008
#define BSEL3CR 0xa0ef500c
#define BSEL4CR 0xa0ef5010
#define BSEL5CR 0xa0ef5014
;;
;; SDRAMC 0xa0ef6000
;;
#define SDRF0 0xa0ef6000
#define SDRF1 0xa0ef6004
#define SDIR0 0xa0ef6008
#define SDIR1 0xa0ef600c
#define SDBR 0xa0ef6010
;; CH0
#define SD0ADR 0xa0ef6020
#define SD0SZ 0xa0ef6022
#define SD0ER 0xa0ef6024
#define SD0TR 0xa0ef6028
#define SD0MOD 0xa0ef602c
;; CH1
#define SD1ADR 0xa0ef6040
#define SD1SZ 0xa0ef6042
#define SD1ER 0xa0ef6044
#define SD1TR 0xa0ef6048
#define SD1MOD 0xa0ef604c
;;
;; DMAC 0xa0ef8000
;;
#define DMAEN 0xa0ef8000
#define DMAISTS 0xa0ef8004
#define DMAEDET 0xa0ef8008
#define DMAASTS 0xa0ef800c
;; CH0
#define DMA0CR0 0xa0ef8100
#define DMA0CR1 0xa0ef8104
#define DMA0CSA 0xa0ef8108
#define DMA0RSA 0xa0ef810c
#define DMA0CDA 0xa0ef8110
#define DMA0RDA 0xa0ef8114
#define DMA0CBCUT 0xa0ef8118
#define DMA0RBCUT 0xa0ef811c
;; CH1
#define DMA1CR0 0xa0ef8200
#define DMA1CR1 0xa0ef8204
#define DMA1CSA 0xa0ef8208
#define DMA1RSA 0xa0ef820c
#define DMA1CDA 0xa0ef8210
#define DMA1RDA 0xa0ef8214
#define DMA1CBCUT 0xa0ef8218
#define DMA1RBCUT 0xa0ef821c
;;
;; MFT 0xa0efc000
;;
#define MFTCR 0xa0efc000
#define MFTRPR 0xa0efc004
;; CH0
#define MFT0MOD 0xa0efc100
#define MFT0BOS 0xa0efc104
#define MFT0CUT 0xa0efc108
#define MFT0RLD 0xa0efc10c
#define MFT0CMPRLD 0xa0efc110
;; CH1
#define MFT1MOD 0xa0efc200
#define MFT1BOS 0xa0efc204
#define MFT1CUT 0xa0efc208
#define MFT1RLD 0xa0efc20c
#define MFT1CMPRLD 0xa0efc210
;; CH2
#define MFT2MOD 0xa0efc300
#define MFT2BOS 0xa0efc304
#define MFT2CUT 0xa0efc308
#define MFT2RLD 0xa0efc30c
#define MFT2CMPRLD 0xa0efc310
;; CH3
#define MFT3MOD 0xa0efc400
#define MFT3BOS 0xa0efc404
#define MFT3CUT 0xa0efc408
#define MFT3RLD 0xa0efc40c
#define MFT3CMPRLD 0xa0efc410
;; CH4
#define MFT4MOD 0xa0efc500
#define MFT4BOS 0xa0efc504
#define MFT4CUT 0xa0efc508
#define MFT4RLD 0xa0efc50c
#define MFT4CMPRLD 0xa0efc510
;; CH5
#define MFT5MOD 0xa0efc600
#define MFT5BOS 0xa0efc604
#define MFT5CUT 0xa0efc608
#define MFT5RLD 0xa0efc60c
#define MFT5CMPRLD 0xa0efc610
;;
;; SIO 0xa0efd000
;;
;; CH0
#define SIO0CR 0xa0efd000
#define SIO0MOD0 0xa0efd004
#define SIO0MOD1 0xa0efd008
#define SIO0STS 0xa0efd00c
#define SIO0IMASK 0xa0efd010
#define SIO0BAUR 0xa0efd014
#define SIO0RBAUR 0xa0efd018
#define SIO0TXB 0xa0efd01c
#define SIO0RXB 0xa0efd020
;; CH1
#define SIO1CR 0xa0efd100
#define SIO1MOD0 0xa0efd104
#define SIO1MOD1 0xa0efd108
#define SIO1STS 0xa0efd10c
#define SIO1IMASK 0xa0efd110
#define SIO1BAUR 0xa0efd114
#define SIO1RBAUR 0xa0efd118
#define SIO1TXB 0xa0efd11c
#define SIO1RXB 0xa0efd120
;; CH2
#define SIO2CR 0xa0efd200
#define SIO2MOD0 0xa0efd204
#define SIO2MOD1 0xa0efd208
#define SIO2STS 0xa0efd20c
#define SIO2IMASK 0xa0efd210
#define SIO2BAUR 0xa0efd214
#define SIO2RBAUR 0xa0efd218
#define SIO2TXB 0xa0efd21c
#define SIO2RXB 0xa0efd220
;; CH3
#define SIO3CR 0xa0efd300
#define SIO3MOD0 0xa0efd304
#define SIO3MOD1 0xa0efd308
#define SIO3STS 0xa0efd30c
#define SIO3IMASK 0xa0efd310
#define SIO3BAUR 0xa0efd314
#define SIO3RBAUR 0xa0efd318
#define SIO3TXB 0xa0efd31c
#define SIO3RXB 0xa0efd320
;; CH4
#define SIO4CR 0xa0efd400
#define SIO4MOD0 0xa0efd404
#define SIO4MOD1 0xa0efd408
#define SIO4STS 0xa0efd40c
#define SIO4IMASK 0xa0efd410
#define SIO4BAUR 0xa0efd414
#define SIO4RBAUR 0xa0efd418
#define SIO4TXB 0xa0efd41c
#define SIO4RXB 0xa0efd420
;;
;; ICU 0xa0eff000
;;
#define ICUISTS 0xa0eff004
#define ICUIREQ0 0xa0eff008
#define ICUIREQ1 0xa0eff00c
#define ICUSBICR 0xa0eff018
#define ICUIMASK 0xa0eff01c
#define ICUCR1 0xa0eff200
#define ICUCR2 0xa0eff204
#define ICUCR3 0xa0eff208
#define ICUCR4 0xa0eff20c
#define ICUCR5 0xa0eff210
#define ICUCR6 0xa0eff214
#define ICUCR7 0xa0eff218
#define ICUCR16 0xa0eff23c
#define ICUCR17 0xa0eff240
#define ICUCR18 0xa0eff244
#define ICUCR19 0xa0eff248
#define ICUCR20 0xa0eff24c
#define ICUCR21 0xa0eff250
#define ICUCR32 0xa0eff27c
#define ICUCR33 0xa0eff280
#define ICUCR48 0xa0eff2bc
#define ICUCR49 0xa0eff2c0
#define ICUCR50 0xa0eff2c4
#define ICUCR51 0xa0eff2c8
#define ICUCR52 0xa0eff2cc
#define ICUCR53 0xa0eff2d0
#define ICUCR54 0xa0eff2d4
#define ICUCR55 0xa0eff2d8
#define ICUCR56 0xa0eff2dc
#define ICUCR57 0xa0eff2e0
;;
;; CACHE
;;
#define MCCR 0xfffffffc
#endif /* __ASSEMBLY__ */

5
include/asm-m32r/m32r.h
View File

@@ -16,7 +16,6 @@
|| defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
|| defined(CONFIG_CHIP_OPSP)
#include <asm/m32102.h>
#include <asm/m32102peri.h>
#endif
/* Platform type */
@@ -36,6 +35,10 @@
#include <asm/mappi2/mappi2_pld.h>
#endif /* CONFIG_PLAT_MAPPI2 */
#if defined(CONFIG_PLAT_MAPPI3)
#include <asm/mappi3/mappi3_pld.h>
#endif /* CONFIG_PLAT_MAPPI3 */
#if defined(CONFIG_PLAT_USRV)
#include <asm/m32700ut/m32700ut_pld.h>
#endif

143
include/asm-m32r/mappi3/mappi3_pld.h Normal file
View File

@@ -0,0 +1,143 @@
/*
* include/asm/mappi3/mappi3_pld.h
*
* Definitions for Extended IO Logic on MAPPI3 board.
* based on m32700ut_pld.h
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file "COPYING" in the main directory of
* this archive for more details.
*
*/
#ifndef _MAPPI3_PLD_H
#define _MAPPI3_PLD_H
#ifndef __ASSEMBLY__
/* FIXME:
* Some C functions use non-cache address, so can't define non-cache address.
*/
#define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */)
#define __reg8 (volatile unsigned char *)
#define __reg16 (volatile unsigned short *)
#define __reg32 (volatile unsigned int *)
#else
#define PLD_BASE (0x1c000000 + NONCACHE_OFFSET)
#define __reg8
#define __reg16
#define __reg32
#endif /* __ASSEMBLY__ */
/* CFC */
#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
/* MMC */
#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
/* Power Control of MMC and CF */
#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
/*==== ICU ====*/
#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
#define M32R_IRQ_I2C (28) /* I2C-BUS */
#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */
#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert */
#define PLD_IRQ_CFC_EJECT (8) /* INT7 CFC Card Eject */
#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
#if 0
/* LED Control
*
* 1: DIP swich side
* 2: Reset switch side
*/
#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
#define PLD_IOLED_1_ON 0x001
#define PLD_IOLED_1_OFF 0x000
#define PLD_IOLED_2_ON 0x002
#define PLD_IOLED_2_OFF 0x000
/* DIP Switch
* 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
* 1: -
* 2: -
* 3: -
*/
#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
#define PLD_IOSWSTS_IOSW2 0x0200
#define PLD_IOSWSTS_IOSW1 0x0100
#define PLD_IOSWSTS_IOWP0 0x0001
#endif
/* CRC */
#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
#if 0
/* RTC */
#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
/* SIO0 */
#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
#define PLD_ESIO0CR_TXEN 0x0001
#define PLD_ESIO0CR_RXEN 0x0002
#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
#define PLD_ESIO0MOD0_CTSS 0x0040
#define PLD_ESIO0MOD0_RTSS 0x0080
#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
#define PLD_ESIO0MOD1_LMFS 0x0010
#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
#define PLD_ESIO0STS_TEMP 0x0001
#define PLD_ESIO0STS_TXCP 0x0002
#define PLD_ESIO0STS_RXCP 0x0004
#define PLD_ESIO0STS_TXSC 0x0100
#define PLD_ESIO0STS_RXSC 0x0200
#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
#define PLD_ESIO0INTCR_TXIEN 0x0002
#define PLD_ESIO0INTCR_RXCEN 0x0004
#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
/* SIM Card */
#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
#endif
#endif /* _MAPPI3_PLD.H */

2
include/asm-m32r/smp.h
View File

@@ -66,7 +66,7 @@ extern volatile int cpu_2_physid[NR_CPUS];
#define physid_to_cpu(physid) physid_2_cpu[physid]
#define cpu_to_physid(cpu_id) cpu_2_physid[cpu_id]
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
extern cpumask_t cpu_callout_map;
#define cpu_possible_map cpu_callout_map

2
include/asm-mips/smp.h
View File

@@ -21,7 +21,7 @@
#include <linux/cpumask.h>
#include <asm/atomic.h>
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
/* Map from cpu id to sequential logical cpu number. This will only
not be idempotent when cpus failed to come on-line. */

69
include/asm-mips/vr41xx/giu.h Normal file
View File

@@ -0,0 +1,69 @@
/*
* Include file for NEC VR4100 series General-purpose I/O Unit.
*
* Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __NEC_VR41XX_GIU_H
#define __NEC_VR41XX_GIU_H
typedef enum {
IRQ_TRIGGER_LEVEL,
IRQ_TRIGGER_EDGE,
IRQ_TRIGGER_EDGE_FALLING,
IRQ_TRIGGER_EDGE_RISING,
} irq_trigger_t;
typedef enum {
IRQ_SIGNAL_THROUGH,
IRQ_SIGNAL_HOLD,
} irq_signal_t;
extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_t signal);
typedef enum {
IRQ_LEVEL_LOW,
IRQ_LEVEL_HIGH,
} irq_level_t;
extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level);
typedef enum {
GPIO_DATA_LOW,
GPIO_DATA_HIGH,
GPIO_DATA_INVAL,
} gpio_data_t;
extern gpio_data_t vr41xx_gpio_get_pin(unsigned int pin);
extern int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data);
typedef enum {
GPIO_INPUT,
GPIO_OUTPUT,
GPIO_OUTPUT_DISABLE,
} gpio_direction_t;
extern int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir);
typedef enum {
GPIO_PULL_DOWN,
GPIO_PULL_UP,
GPIO_PULL_DISABLE,
} gpio_pull_t;
extern int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull);
#endif /* __NEC_VR41XX_GIU_H */

35
include/asm-mips/vr41xx/vr41xx.h
View File

@@ -126,7 +126,6 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
#define GIU_IRQ_BASE 40
#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
#define GIU_IRQ_LAST GIU_IRQ(31)
#define GIU_IRQ_TO_PIN(x) ((x) - GIU_IRQ_BASE) /* Pin 0-31 */
extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
@@ -197,38 +196,4 @@ extern void vr41xx_disable_csiint(uint16_t mask);
extern void vr41xx_enable_bcuint(void);
extern void vr41xx_disable_bcuint(void);
/*
* General-Purpose I/O Unit
*/
enum {
TRIGGER_LEVEL,
TRIGGER_EDGE,
TRIGGER_EDGE_FALLING,
TRIGGER_EDGE_RISING
};
enum {
SIGNAL_THROUGH,
SIGNAL_HOLD
};
extern void vr41xx_set_irq_trigger(int pin, int trigger, int hold);
enum {
LEVEL_LOW,
LEVEL_HIGH
};
extern void vr41xx_set_irq_level(int pin, int level);
enum {
PIO_INPUT,
PIO_OUTPUT
};
enum {
DATA_LOW,
DATA_HIGH
};
#endif /* __NEC_VR41XX_H */

2
include/asm-parisc/smp.h
View File

@@ -51,7 +51,7 @@ extern void smp_send_reschedule(int cpu);
extern unsigned long cpu_present_mask;
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
#endif /* CONFIG_SMP */

34
include/asm-ppc/irq.h
View File

@@ -176,7 +176,7 @@ static __inline__ int irq_canonicalize(int irq)
*/
#include <asm/mpc85xx.h>
/* The MPC8560 openpic has 32 internal interrupts and 12 external
/* The MPC8548 openpic has 48 internal interrupts and 12 external
* interrupts.
*
* We are "flattening" the interrupt vectors of the cascaded CPM
@@ -184,7 +184,7 @@ static __inline__ int irq_canonicalize(int irq)
* single integer.
*/
#define NR_CPM_INTS 64
#define NR_EPIC_INTS 44
#define NR_EPIC_INTS 60
#ifndef NR_8259_INTS
#define NR_8259_INTS 0
#endif
@@ -223,9 +223,15 @@ static __inline__ int irq_canonicalize(int irq)
#define MPC85xx_IRQ_RIO_RX (12 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC1_TX (13 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC1_RX (14 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC3_TX (15 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC3_RX (16 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC3_ERROR (17 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC2_TX (19 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC2_RX (20 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC4_TX (21 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC4_RX (22 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC4_ERROR (23 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_FEC (25 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET)
@@ -235,18 +241,18 @@ static __inline__ int irq_canonicalize(int irq)
#define MPC85xx_IRQ_CPM (30 + MPC85xx_OPENPIC_IRQ_OFFSET)
/* The 12 external interrupt lines */
#define MPC85xx_IRQ_EXT0 (32 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT1 (33 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT2 (34 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT3 (35 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT4 (36 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT5 (37 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT6 (38 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT7 (39 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT8 (40 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT9 (41 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT10 (42 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT11 (43 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT0 (48 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT1 (49 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT2 (50 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT3 (51 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT4 (52 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT5 (53 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT6 (54 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT7 (55 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT8 (56 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT9 (57 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT10 (58 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_EXT11 (59 + MPC85xx_OPENPIC_IRQ_OFFSET)
/* CPM related interrupts */
#define SIU_INT_ERROR ((uint)0x00+CPM_IRQ_OFFSET)

6
include/asm-ppc/mpc10x.h
View File

@@ -159,6 +159,12 @@ extern unsigned long ioremap_base;
#define MPC10X_MAPA_EUMB_BASE (ioremap_base - MPC10X_EUMB_SIZE)
#define MPC10X_MAPB_EUMB_BASE MPC10X_MAPA_EUMB_BASE
enum ppc_sys_devices {
MPC10X_IIC1,
MPC10X_DMA0,
MPC10X_DMA1,
MPC10X_DUART,
};
int mpc10x_bridge_init(struct pci_controller *hose,
uint current_map,

60
include/asm-ppc/mpc85xx.h
View File

@@ -25,7 +25,7 @@
#ifdef CONFIG_MPC8540_ADS
#include <platforms/85xx/mpc8540_ads.h>
#endif
#ifdef CONFIG_MPC8555_CDS
#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
#include <platforms/85xx/mpc8555_cds.h>
#endif
#ifdef CONFIG_MPC8560_ADS
@@ -74,7 +74,7 @@ extern unsigned char __res[];
#define MPC85xx_GUTS_OFFSET (0xe0000)
#define MPC85xx_GUTS_SIZE (0x01000)
#define MPC85xx_IIC1_OFFSET (0x03000)
#define MPC85xx_IIC1_SIZE (0x01000)
#define MPC85xx_IIC1_SIZE (0x00100)
#define MPC85xx_OPENPIC_OFFSET (0x40000)
#define MPC85xx_OPENPIC_SIZE (0x40000)
#define MPC85xx_PCI1_OFFSET (0x08000)
@@ -127,8 +127,64 @@ enum ppc_sys_devices {
MPC85xx_CPM_MCC2,
MPC85xx_CPM_SMC1,
MPC85xx_CPM_SMC2,
MPC85xx_eTSEC1,
MPC85xx_eTSEC2,
MPC85xx_eTSEC3,
MPC85xx_eTSEC4,
MPC85xx_IIC2,
};
/* Internal interrupts are all Level Sensitive, and Positive Polarity */
#define MPC85XX_INTERNAL_IRQ_SENSES \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 0 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 1 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 2 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 3 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 4 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 5 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 6 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 7 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 8 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 9 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 10 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 11 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 12 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 13 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 14 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 15 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 16 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 17 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 18 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 19 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 20 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 21 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 22 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 23 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 24 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 25 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 26 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 27 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 28 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 29 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 30 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 31 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 32 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 33 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 34 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 35 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 36 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 37 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 38 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 39 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 40 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 41 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 42 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 43 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 44 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 45 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 46 */ \
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE) /* Internal 47 */
#endif /* CONFIG_85xx */
#endif /* __ASM_MPC85xx_H__ */
#endif /* __KERNEL__ */

2
include/asm-ppc/pgtable.h
View File

@@ -267,8 +267,6 @@ extern unsigned long ioremap_bot, ioremap_base;
#define _PMD_PRESENT_MASK (PAGE_MASK)
#define _PMD_BAD (~PAGE_MASK)
#define NUM_TLBCAMS (16)
#elif defined(CONFIG_8xx)
/* Definitions for 8xx embedded chips. */
#define _PAGE_PRESENT 0x0001 /* Page is valid */

2
include/asm-ppc/ppc_sys.h
View File

@@ -27,6 +27,8 @@
#include <asm/mpc85xx.h>
#elif defined(CONFIG_PPC_MPC52xx)
#include <asm/mpc52xx.h>
#elif defined(CONFIG_MPC10X_BRIDGE)
#include <asm/mpc10x.h>
#else
#error "need definition of ppc_sys_devices"
#endif

2
include/asm-ppc/smp.h
View File

@@ -44,7 +44,7 @@ extern void smp_message_recv(int, struct pt_regs *);
#define NO_PROC_ID 0xFF /* No processor magic marker */
#define PROC_CHANGE_PENALTY 20
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
extern int __cpu_up(unsigned int cpu);

3
include/asm-ppc64/dma.h
View File

@@ -27,6 +27,8 @@
/* Doesn't really apply... */
#define MAX_DMA_ADDRESS (~0UL)
#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
#define dma_outb outb
#define dma_inb inb
@@ -323,4 +325,5 @@ extern int isa_dma_bridge_buggy;
#else
#define isa_dma_bridge_buggy (0)
#endif
#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
#endif /* _ASM_DMA_H */

158
include/asm-ppc64/iSeries/HvCall.h
View File

@@ -1,84 +1,36 @@
/*
* HvCall.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
//===========================================================================
//
// This file contains the "hypervisor call" interface which is used to
// drive the hypervisor from the OS.
//
//===========================================================================
/*
* This file contains the "hypervisor call" interface which is used to
* drive the hypervisor from the OS.
*/
#ifndef _HVCALL_H
#define _HVCALL_H
//-------------------------------------------------------------------
// Standard Includes
//-------------------------------------------------------------------
#include <asm/iSeries/HvCallSc.h>
#include <asm/iSeries/HvTypes.h>
#include <asm/paca.h>
/*
enum HvCall_ReturnCode
{
HvCall_Good = 0,
HvCall_Partial = 1,
HvCall_NotOwned = 2,
HvCall_NotFreed = 3,
HvCall_UnspecifiedError = 4
};
enum HvCall_TypeOfSIT
{
HvCall_ReduceOnly = 0,
HvCall_Unconditional = 1
};
enum HvCall_TypeOfYield
{
HvCall_YieldTimed = 0, // Yield until specified time
HvCall_YieldToActive = 1, // Yield until all active procs have run
HvCall_YieldToProc = 2 // Yield until the specified processor has run
};
enum HvCall_InterruptMasks
{
HvCall_MaskIPI = 0x00000001,
HvCall_MaskLpEvent = 0x00000002,
HvCall_MaskLpProd = 0x00000004,
HvCall_MaskTimeout = 0x00000008
};
enum HvCall_VaryOffChunkRc
{
HvCall_VaryOffSucceeded = 0,
HvCall_VaryOffWithdrawn = 1,
HvCall_ChunkInLoadArea = 2,
HvCall_ChunkInHPT = 3,
HvCall_ChunkNotAccessible = 4,
HvCall_ChunkInUse = 5
};
*/
/* Type of yield for HvCallBaseYieldProcessor */
#define HvCall_YieldTimed 0 // Yield until specified time (tb)
#define HvCall_YieldToActive 1 // Yield until all active procs have run
#define HvCall_YieldToProc 2 // Yield until the specified processor has run
#define HvCall_YieldTimed 0 /* Yield until specified time (tb) */
#define HvCall_YieldToActive 1 /* Yield until all active procs have run */
#define HvCall_YieldToProc 2 /* Yield until the specified processor has run */
/* interrupt masks for setEnabledInterrupts */
#define HvCall_MaskIPI 0x00000001
@@ -86,7 +38,7 @@ enum HvCall_VaryOffChunkRc
#define HvCall_MaskLpProd 0x00000004
#define HvCall_MaskTimeout 0x00000008
/* Log buffer formats */
/* Log buffer formats */
#define HvCall_LogBuffer_ASCII 0
#define HvCall_LogBuffer_EBCDIC 1
@@ -95,7 +47,7 @@ enum HvCall_VaryOffChunkRc
#define HvCallBaseGetHwPatch HvCallBase + 2
#define HvCallBaseReIplSpAttn HvCallBase + 3
#define HvCallBaseSetASR HvCallBase + 4
#define HvCallBaseSetASRAndRfi HvCallBase + 5
#define HvCallBaseSetASRAndRfi HvCallBase + 5
#define HvCallBaseSetIMR HvCallBase + 6
#define HvCallBaseSendIPI HvCallBase + 7
#define HvCallBaseTerminateMachine HvCallBase + 8
@@ -115,91 +67,47 @@ enum HvCall_VaryOffChunkRc
#define HvCallBaseGetLogBufferCodePage HvCallBase + 22
#define HvCallBaseGetLogBufferFormat HvCallBase + 23
#define HvCallBaseGetLogBufferLength HvCallBase + 24
#define HvCallBaseReadLogBuffer HvCallBase + 25
#define HvCallBaseReadLogBuffer HvCallBase + 25
#define HvCallBaseSetLogBufferFormatAndCodePage HvCallBase + 26
#define HvCallBaseWriteLogBuffer HvCallBase + 27
#define HvCallBaseWriteLogBuffer HvCallBase + 27
#define HvCallBaseRouter28 HvCallBase + 28
#define HvCallBaseRouter29 HvCallBase + 29
#define HvCallBaseRouter30 HvCallBase + 30
#define HvCallBaseSetDebugBus HvCallBase + 31
#define HvCallBaseSetDebugBus HvCallBase + 31
#define HvCallCcSetDABR HvCallCc + 7
#define HvCallCcSetDABR HvCallCc + 7
//=====================================================================================
static inline void HvCall_setVirtualDecr(void)
static inline void HvCall_setVirtualDecr(void)
{
/* Ignore any error return codes - most likely means that the target value for the
* LP has been increased and this vary off would bring us below the new target. */
/*
* Ignore any error return codes - most likely means that the
* target value for the LP has been increased and this vary off
* would bring us below the new target.
*/
HvCall0(HvCallBaseSetVirtualDecr);
}
//=====================================================================
static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm)
static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm)
{
HvCall2( HvCallBaseYieldProcessor, typeOfYield, yieldParm );
}
//=====================================================================
static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts)
{
HvCall1(HvCallBaseSetEnabledInterrupts,enabledInterrupts);
HvCall2(HvCallBaseYieldProcessor, typeOfYield, yieldParm);
}
//=====================================================================
static inline void HvCall_clearLogBuffer(HvLpIndex lpindex)
static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts)
{
HvCall1(HvCallBaseClearLogBuffer,lpindex);
HvCall1(HvCallBaseSetEnabledInterrupts, enabledInterrupts);
}
//=====================================================================
static inline u32 HvCall_getLogBufferCodePage(HvLpIndex lpindex)
static inline void HvCall_setLogBufferFormatAndCodepage(int format,
u32 codePage)
{
u32 retVal = HvCall1(HvCallBaseGetLogBufferCodePage,lpindex);
return retVal;
HvCall2(HvCallBaseSetLogBufferFormatAndCodePage, format, codePage);
}
//=====================================================================
static inline int HvCall_getLogBufferFormat(HvLpIndex lpindex)
{
int retVal = HvCall1(HvCallBaseGetLogBufferFormat,lpindex);
return retVal;
}
extern void HvCall_writeLogBuffer(const void *buffer, u64 bufLen);
//=====================================================================
static inline u32 HvCall_getLogBufferLength(HvLpIndex lpindex)
static inline void HvCall_sendIPI(struct paca_struct *targetPaca)
{
u32 retVal = HvCall1(HvCallBaseGetLogBufferLength,lpindex);
return retVal;
}
//=====================================================================
static inline void HvCall_setLogBufferFormatAndCodepage(int format, u32 codePage)
{
HvCall2(HvCallBaseSetLogBufferFormatAndCodePage,format, codePage);
}
//=====================================================================
int HvCall_readLogBuffer(HvLpIndex lpindex, void *buffer, u64 bufLen);
void HvCall_writeLogBuffer(const void *buffer, u64 bufLen);
//=====================================================================
static inline void HvCall_sendIPI(struct paca_struct * targetPaca)
{
HvCall1( HvCallBaseSendIPI, targetPaca->paca_index );
}
//=====================================================================
static inline void HvCall_terminateMachineSrc(void)
{
HvCall0( HvCallBaseTerminateMachineSrc );
}
static inline void HvCall_setDABR(unsigned long val)
{
HvCall1(HvCallCcSetDABR, val);
}
static inline void HvCall_setDebugBus(unsigned long val)
{
HvCall1(HvCallBaseSetDebugBus, val);
HvCall1(HvCallBaseSendIPI, targetPaca->paca_index);
}
#endif /* _HVCALL_H */

213
include/asm-ppc64/iSeries/HvCallCfg.h
View File

@@ -1,213 +0,0 @@
/*
* HvCallCfg.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
//=====================================================================================
//
// This file contains the "hypervisor call" interface which is used to
// drive the hypervisor from the OS.
//
//=====================================================================================
#ifndef _HVCALLCFG_H
#define _HVCALLCFG_H
//-------------------------------------------------------------------
// Standard Includes
//-------------------------------------------------------------------
#include <asm/iSeries/HvCallSc.h>
#include <asm/iSeries/HvTypes.h>
//-------------------------------------------------------------------------------------
// Constants
//-------------------------------------------------------------------------------------
enum HvCallCfg_ReqQual
{
HvCallCfg_Cur = 0,
HvCallCfg_Init = 1,
HvCallCfg_Max = 2,
HvCallCfg_Min = 3
};
#define HvCallCfgGetLps HvCallCfg + 0
#define HvCallCfgGetActiveLpMap HvCallCfg + 1
#define HvCallCfgGetLpVrmIndex HvCallCfg + 2
#define HvCallCfgGetLpMinSupportedPlicVrmIndex HvCallCfg + 3
#define HvCallCfgGetLpMinCompatablePlicVrmIndex HvCallCfg + 4
#define HvCallCfgGetLpVrmName HvCallCfg + 5
#define HvCallCfgGetSystemPhysicalProcessors HvCallCfg + 6
#define HvCallCfgGetPhysicalProcessors HvCallCfg + 7
#define HvCallCfgGetSystemMsChunks HvCallCfg + 8
#define HvCallCfgGetMsChunks HvCallCfg + 9
#define HvCallCfgGetInteractivePercentage HvCallCfg + 10
#define HvCallCfgIsBusDedicated HvCallCfg + 11
#define HvCallCfgGetBusOwner HvCallCfg + 12
#define HvCallCfgGetBusAllocation HvCallCfg + 13
#define HvCallCfgGetBusUnitOwner HvCallCfg + 14
#define HvCallCfgGetBusUnitAllocation HvCallCfg + 15
#define HvCallCfgGetVirtualBusPool HvCallCfg + 16
#define HvCallCfgGetBusUnitInterruptProc HvCallCfg + 17
#define HvCallCfgGetConfiguredBusUnitsForIntProc HvCallCfg + 18
#define HvCallCfgGetRioSanBusPool HvCallCfg + 19
#define HvCallCfgGetSharedPoolIndex HvCallCfg + 20
#define HvCallCfgGetSharedProcUnits HvCallCfg + 21
#define HvCallCfgGetNumProcsInSharedPool HvCallCfg + 22
#define HvCallCfgRouter23 HvCallCfg + 23
#define HvCallCfgRouter24 HvCallCfg + 24
#define HvCallCfgRouter25 HvCallCfg + 25
#define HvCallCfgRouter26 HvCallCfg + 26
#define HvCallCfgRouter27 HvCallCfg + 27
#define HvCallCfgGetMinRuntimeMsChunks HvCallCfg + 28
#define HvCallCfgSetMinRuntimeMsChunks HvCallCfg + 29
#define HvCallCfgGetVirtualLanIndexMap HvCallCfg + 30
#define HvCallCfgGetLpExecutionMode HvCallCfg + 31
#define HvCallCfgGetHostingLpIndex HvCallCfg + 32
//====================================================================
static inline HvLpIndex HvCallCfg_getLps(void)
{
HvLpIndex retVal = HvCall0(HvCallCfgGetLps);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//====================================================================
static inline int HvCallCfg_isBusDedicated(u64 busIndex)
{
int retVal = HvCall1(HvCallCfgIsBusDedicated,busIndex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//====================================================================
static inline HvLpIndex HvCallCfg_getBusOwner(u64 busIndex)
{
HvLpIndex retVal = HvCall1(HvCallCfgGetBusOwner,busIndex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//====================================================================
static inline HvLpIndexMap HvCallCfg_getBusAllocation(u64 busIndex)
{
HvLpIndexMap retVal = HvCall1(HvCallCfgGetBusAllocation,busIndex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//====================================================================
static inline HvLpIndexMap HvCallCfg_getActiveLpMap(void)
{
HvLpIndexMap retVal = HvCall0(HvCallCfgGetActiveLpMap);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//====================================================================
static inline HvLpVirtualLanIndexMap HvCallCfg_getVirtualLanIndexMap(HvLpIndex lp)
{
// This is a new function in V5R1 so calls to this on older
// hypervisors will return -1
u64 retVal = HvCall1(HvCallCfgGetVirtualLanIndexMap, lp);
if(retVal == -1)
retVal = 0;
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//===================================================================
static inline u64 HvCallCfg_getSystemMsChunks(void)
{
u64 retVal = HvCall0(HvCallCfgGetSystemMsChunks);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//===================================================================
static inline u64 HvCallCfg_getMsChunks(HvLpIndex lp,enum HvCallCfg_ReqQual qual)
{
u64 retVal = HvCall2(HvCallCfgGetMsChunks,lp,qual);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//===================================================================
static inline u64 HvCallCfg_getMinRuntimeMsChunks(HvLpIndex lp)
{
// NOTE: This function was added in v5r1 so older hypervisors will return a -1 value
u64 retVal = HvCall1(HvCallCfgGetMinRuntimeMsChunks,lp);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//===================================================================
static inline u64 HvCallCfg_setMinRuntimeMsChunks(u64 chunks)
{
u64 retVal = HvCall1(HvCallCfgSetMinRuntimeMsChunks,chunks);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//===================================================================
static inline u64 HvCallCfg_getSystemPhysicalProcessors(void)
{
u64 retVal = HvCall0(HvCallCfgGetSystemPhysicalProcessors);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//===================================================================
static inline u64 HvCallCfg_getPhysicalProcessors(HvLpIndex lp,enum HvCallCfg_ReqQual qual)
{
u64 retVal = HvCall2(HvCallCfgGetPhysicalProcessors,lp,qual);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//===================================================================
static inline u64 HvCallCfg_getConfiguredBusUnitsForInterruptProc(HvLpIndex lp,
u16 hvLogicalProcIndex)
{
u64 retVal = HvCall2(HvCallCfgGetConfiguredBusUnitsForIntProc,lp,hvLogicalProcIndex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//==================================================================
static inline HvLpSharedPoolIndex HvCallCfg_getSharedPoolIndex(HvLpIndex lp)
{
HvLpSharedPoolIndex retVal =
HvCall1(HvCallCfgGetSharedPoolIndex,lp);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//==================================================================
static inline u64 HvCallCfg_getSharedProcUnits(HvLpIndex lp,enum HvCallCfg_ReqQual qual)
{
u64 retVal = HvCall2(HvCallCfgGetSharedProcUnits,lp,qual);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//==================================================================
static inline u64 HvCallCfg_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
{
u16 retVal = HvCall1(HvCallCfgGetNumProcsInSharedPool,sPI);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//==================================================================
static inline HvLpIndex HvCallCfg_getHostingLpIndex(HvLpIndex lp)
{
u64 retVal = HvCall1(HvCallCfgGetHostingLpIndex,lp);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
#endif /* _HVCALLCFG_H */

94
include/asm-ppc64/iSeries/HvCallEvent.h
View File

@@ -1,32 +1,28 @@
/*
* HvCallEvent.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* This file contains the "hypervisor call" interface which is used to
* drive the hypervisor from the OS.
* This file contains the "hypervisor call" interface which is used to
* drive the hypervisor from the OS.
*/
#ifndef _HVCALLEVENT_H
#define _HVCALLEVENT_H
/*
* Standard Includes
*/
#include <asm/iSeries/HvCallSc.h>
#include <asm/iSeries/HvTypes.h>
#include <asm/abs_addr.h>
@@ -71,7 +67,7 @@ typedef u64 HvLpDma_Rc;
#define HvCallEventCloseLpEventPath HvCallEvent + 2
#define HvCallEventDmaBufList HvCallEvent + 3
#define HvCallEventDmaSingle HvCallEvent + 4
#define HvCallEventDmaToSp HvCallEvent + 5
#define HvCallEventDmaToSp HvCallEvent + 5
#define HvCallEventGetOverflowLpEvents HvCallEvent + 6
#define HvCallEventGetSourceLpInstanceId HvCallEvent + 7
#define HvCallEventGetTargetLpInstanceId HvCallEvent + 8
@@ -85,14 +81,12 @@ typedef u64 HvLpDma_Rc;
static inline void HvCallEvent_getOverflowLpEvents(u8 queueIndex)
{
HvCall1(HvCallEventGetOverflowLpEvents,queueIndex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
HvCall1(HvCallEventGetOverflowLpEvents, queueIndex);
}
static inline void HvCallEvent_setInterLpQueueIndex(u8 queueIndex)
{
HvCall1(HvCallEventSetInterLpQueueIndex,queueIndex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
HvCall1(HvCallEventSetInterLpQueueIndex, queueIndex);
}
static inline void HvCallEvent_setLpEventStack(u8 queueIndex,
@@ -103,7 +97,6 @@ static inline void HvCallEvent_setLpEventStack(u8 queueIndex,
abs_addr = virt_to_abs(eventStackAddr);
HvCall3(HvCallEventSetLpEventStack, queueIndex, abs_addr,
eventStackSize);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex,
@@ -111,22 +104,18 @@ static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex,
{
HvCall2(HvCallEventSetLpEventQueueInterruptProc, queueIndex,
lpLogicalProcIndex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
static inline HvLpEvent_Rc HvCallEvent_signalLpEvent(struct HvLpEvent *event)
{
u64 abs_addr;
HvLpEvent_Rc retVal;
#ifdef DEBUG_SENDEVENT
printk("HvCallEvent_signalLpEvent: *event = %016lx\n ",
(unsigned long)event);
#endif
abs_addr = virt_to_abs(event);
retVal = (HvLpEvent_Rc)HvCall1(HvCallEventSignalLpEvent, abs_addr);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall1(HvCallEventSignalLpEvent, abs_addr);
}
static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
@@ -136,9 +125,7 @@ static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
u64 eventData1, u64 eventData2, u64 eventData3,
u64 eventData4, u64 eventData5)
{
HvLpEvent_Rc retVal;
// Pack the misc bits into a single Dword to pass to PLIC
/* Pack the misc bits into a single Dword to pass to PLIC */
union {
struct HvCallEvent_PackedParms parms;
u64 dword;
@@ -152,67 +139,49 @@ static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp,
packed.parms.xSourceInstId = sourceInstanceId;
packed.parms.xTargetInstId = targetInstanceId;
retVal = (HvLpEvent_Rc)HvCall7(HvCallEventSignalLpEventParms,
packed.dword, correlationToken, eventData1,eventData2,
eventData3,eventData4, eventData5);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall7(HvCallEventSignalLpEventParms, packed.dword,
correlationToken, eventData1, eventData2,
eventData3, eventData4, eventData5);
}
static inline HvLpEvent_Rc HvCallEvent_ackLpEvent(struct HvLpEvent *event)
{
u64 abs_addr;
HvLpEvent_Rc retVal;
abs_addr = virt_to_abs(event);
retVal = (HvLpEvent_Rc)HvCall1(HvCallEventAckLpEvent, abs_addr);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall1(HvCallEventAckLpEvent, abs_addr);
}
static inline HvLpEvent_Rc HvCallEvent_cancelLpEvent(struct HvLpEvent *event)
{
u64 abs_addr;
HvLpEvent_Rc retVal;
abs_addr = virt_to_abs(event);
retVal = (HvLpEvent_Rc)HvCall1(HvCallEventCancelLpEvent, abs_addr);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall1(HvCallEventCancelLpEvent, abs_addr);
}
static inline HvLpInstanceId HvCallEvent_getSourceLpInstanceId(
HvLpIndex targetLp, HvLpEvent_Type type)
{
HvLpInstanceId retVal;
retVal = HvCall2(HvCallEventGetSourceLpInstanceId, targetLp, type);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall2(HvCallEventGetSourceLpInstanceId, targetLp, type);
}
static inline HvLpInstanceId HvCallEvent_getTargetLpInstanceId(
HvLpIndex targetLp, HvLpEvent_Type type)
{
HvLpInstanceId retVal;
retVal = HvCall2(HvCallEventGetTargetLpInstanceId, targetLp, type);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall2(HvCallEventGetTargetLpInstanceId, targetLp, type);
}
static inline void HvCallEvent_openLpEventPath(HvLpIndex targetLp,
HvLpEvent_Type type)
{
HvCall2(HvCallEventOpenLpEventPath, targetLp, type);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
static inline void HvCallEvent_closeLpEventPath(HvLpIndex targetLp,
HvLpEvent_Type type)
{
HvCall2(HvCallEventCloseLpEventPath, targetLp, type);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
@@ -224,8 +193,7 @@ static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
/* Do these need to be converted to absolute addresses? */
u64 localBufList, u64 remoteBufList, u32 transferLength)
{
HvLpDma_Rc retVal;
// Pack the misc bits into a single Dword to pass to PLIC
/* Pack the misc bits into a single Dword to pass to PLIC */
union {
struct HvCallEvent_PackedDmaParms parms;
u64 dword;
@@ -241,11 +209,8 @@ static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type,
packed.parms.xLocalInstId = localInstanceId;
packed.parms.xRemoteInstId = remoteInstanceId;
retVal = (HvLpDma_Rc)HvCall4(HvCallEventDmaBufList,
packed.dword, localBufList, remoteBufList,
transferLength);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall4(HvCallEventDmaBufList, packed.dword, localBufList,
remoteBufList, transferLength);
}
static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
@@ -256,8 +221,7 @@ static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
HvLpDma_AddressType remoteAddressType,
u64 localAddrOrTce, u64 remoteAddrOrTce, u32 transferLength)
{
HvLpDma_Rc retVal;
// Pack the misc bits into a single Dword to pass to PLIC
/* Pack the misc bits into a single Dword to pass to PLIC */
union {
struct HvCallEvent_PackedDmaParms parms;
u64 dword;
@@ -273,25 +237,17 @@ static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type,
packed.parms.xLocalInstId = localInstanceId;
packed.parms.xRemoteInstId = remoteInstanceId;
retVal = (HvLpDma_Rc)HvCall4(HvCallEventDmaSingle,
packed.dword, localAddrOrTce, remoteAddrOrTce,
transferLength);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return (HvLpDma_Rc)HvCall4(HvCallEventDmaSingle, packed.dword,
localAddrOrTce, remoteAddrOrTce, transferLength);
}
static inline HvLpDma_Rc HvCallEvent_dmaToSp(void* local, u32 remote,
static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote,
u32 length, HvLpDma_Direction dir)
{
u64 abs_addr;
HvLpDma_Rc retVal;
abs_addr = virt_to_abs(local);
retVal = (HvLpDma_Rc)HvCall4(HvCallEventDmaToSp, abs_addr, remote,
length, dir);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir);
}
#endif /* _HVCALLEVENT_H */

122
include/asm-ppc64/iSeries/HvCallHpt.h
View File

@@ -1,17 +1,17 @@
/*
* HvCallHpt.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,21 +19,15 @@
#ifndef _HVCALLHPT_H
#define _HVCALLHPT_H
//============================================================================
//
// This file contains the "hypervisor call" interface which is used to
// drive the hypervisor from the OS.
//
//============================================================================
/*
* This file contains the "hypervisor call" interface which is used to
* drive the hypervisor from the OS.
*/
#include <asm/iSeries/HvCallSc.h>
#include <asm/iSeries/HvTypes.h>
#include <asm/mmu.h>
//-----------------------------------------------------------------------------
// Constants
//-----------------------------------------------------------------------------
#define HvCallHptGetHptAddress HvCallHpt + 0
#define HvCallHptGetHptPages HvCallHpt + 1
#define HvCallHptSetPp HvCallHpt + 5
@@ -47,81 +41,63 @@
#define HvCallHptInvalidateSetSwBitsGet HvCallHpt + 18
//============================================================================
static inline u64 HvCallHpt_getHptAddress(void)
static inline u64 HvCallHpt_getHptAddress(void)
{
u64 retval = HvCall0(HvCallHptGetHptAddress);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retval;
return HvCall0(HvCallHptGetHptAddress);
}
//============================================================================
static inline u64 HvCallHpt_getHptPages(void)
{
u64 retval = HvCall0(HvCallHptGetHptPages);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retval;
}
//=============================================================================
static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value)
static inline u64 HvCallHpt_getHptPages(void)
{
HvCall2( HvCallHptSetPp, hpteIndex, value );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return HvCall0(HvCallHptGetHptPages);
}
//=============================================================================
static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff )
static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value)
{
HvCall3( HvCallHptSetSwBits, hpteIndex, bitson, bitsoff );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
HvCall2(HvCallHptSetPp, hpteIndex, value);
}
//=============================================================================
static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex)
static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff)
{
HvCall1( HvCallHptInvalidateNoSyncICache, hpteIndex );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
HvCall3(HvCallHptSetSwBits, hpteIndex, bitson, bitsoff);
}
//=============================================================================
static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson, u8 bitsoff )
static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex)
{
HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
}
static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson,
u8 bitsoff)
{
u64 compressedStatus;
compressedStatus = HvCall4( HvCallHptInvalidateSetSwBitsGet, hpteIndex, bitson, bitsoff, 1 );
HvCall1( HvCallHptInvalidateNoSyncICache, hpteIndex );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
compressedStatus = HvCall4(HvCallHptInvalidateSetSwBitsGet,
hpteIndex, bitson, bitsoff, 1);
HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
return compressedStatus;
}
//=============================================================================
static inline u64 HvCallHpt_findValid( HPTE *hpte, u64 vpn )
static inline u64 HvCallHpt_findValid(HPTE *hpte, u64 vpn)
{
u64 retIndex = HvCall3Ret16( HvCallHptFindValid, hpte, vpn, 0, 0 );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retIndex;
}
//=============================================================================
static inline u64 HvCallHpt_findNextValid( HPTE *hpte, u32 hpteIndex, u8 bitson, u8 bitsoff )
{
u64 retIndex = HvCall3Ret16( HvCallHptFindNextValid, hpte, hpteIndex, bitson, bitsoff );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retIndex;
}
//=============================================================================
static inline void HvCallHpt_get( HPTE *hpte, u32 hpteIndex )
{
HvCall2Ret16( HvCallHptGet, hpte, hpteIndex, 0 );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
//============================================================================
static inline void HvCallHpt_addValidate( u32 hpteIndex,
u32 hBit,
HPTE *hpte )
{
HvCall4( HvCallHptAddValidate, hpteIndex,
hBit, (*((u64 *)hpte)), (*(((u64 *)hpte)+1)) );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0);
}
static inline u64 HvCallHpt_findNextValid(HPTE *hpte, u32 hpteIndex,
u8 bitson, u8 bitsoff)
{
return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex,
bitson, bitsoff);
}
//=============================================================================
static inline void HvCallHpt_get(HPTE *hpte, u32 hpteIndex)
{
HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0);
}
static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, HPTE *hpte)
{
HvCall4(HvCallHptAddValidate, hpteIndex, hBit, (*((u64 *)hpte)),
(*(((u64 *)hpte)+1)));
}
#endif /* _HVCALLHPT_H */

522
include/asm-ppc64/iSeries/HvCallPci.h
View File

@@ -1,26 +1,26 @@
/************************************************************************/
/* Provides the Hypervisor PCI calls for iSeries Linux Parition. */
/* Copyright (C) 2001 <Wayne G Holm> <IBM Corporation> */
/* */
/* This program is free software; you can redistribute it and/or modify */
/* it under the terms of the GNU General Public License as published by */
/* the Free Software Foundation; either version 2 of the License, or */
/* (at your option) any later version. */
/* */
/* This program is distributed in the hope that it will be useful, */
/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* GNU General Public License for more details. */
/* */
/* You should have received a copy of the GNU General Public License */
/* along with this program; if not, write to the: */
/* Free Software Foundation, Inc., */
/* 59 Temple Place, Suite 330, */
/* Boston, MA 02111-1307 USA */
/************************************************************************/
/* Change Activity: */
/* Created, Jan 9, 2001 */
/************************************************************************/
/*
* Provides the Hypervisor PCI calls for iSeries Linux Parition.
* Copyright (C) 2001 <Wayne G Holm> <IBM Corporation>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
* Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330,
* Boston, MA 02111-1307 USA
*
* Change Activity:
* Created, Jan 9, 2001
*/
#ifndef _HVCALLPCI_H
#define _HVCALLPCI_H
@@ -34,8 +34,8 @@
*/
struct HvCallPci_DsaAddr {
u16 busNumber; /* PHB index? */
u8 subBusNumber; /* PCI bus number? */
u8 deviceId; /* device and function? */
u8 subBusNumber; /* PCI bus number? */
u8 deviceId; /* device and function? */
u8 barNumber;
u8 reserved[3];
};
@@ -52,34 +52,37 @@ struct HvCallPci_LoadReturn {
enum HvCallPci_DeviceType {
HvCallPci_NodeDevice = 1,
HvCallPci_SpDevice = 2,
HvCallPci_IopDevice = 3,
HvCallPci_BridgeDevice = 4,
HvCallPci_MultiFunctionDevice = 5,
HvCallPci_IoaDevice = 6
HvCallPci_SpDevice = 2,
HvCallPci_IopDevice = 3,
HvCallPci_BridgeDevice = 4,
HvCallPci_MultiFunctionDevice = 5,
HvCallPci_IoaDevice = 6
};
struct HvCallPci_DeviceInfo {
u32 deviceType; // See DeviceType enum for values
u32 deviceType; /* See DeviceType enum for values */
};
struct HvCallPci_BusUnitInfo {
u32 sizeReturned; // length of data returned
u32 deviceType; // see DeviceType enum for values
u32 sizeReturned; /* length of data returned */
u32 deviceType; /* see DeviceType enum for values */
};
struct HvCallPci_BridgeInfo {
struct HvCallPci_BusUnitInfo busUnitInfo; // Generic bus unit info
u8 subBusNumber; // Bus number of secondary bus
u8 maxAgents; // Max idsels on secondary bus
u8 maxSubBusNumber; // Max Sub Bus
u8 logicalSlotNumber; // Logical Slot Number for IOA
struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */
u8 subBusNumber; /* Bus number of secondary bus */
u8 maxAgents; /* Max idsels on secondary bus */
u8 maxSubBusNumber; /* Max Sub Bus */
u8 logicalSlotNumber; /* Logical Slot Number for IOA */
};
// Maximum BusUnitInfo buffer size. Provided for clients so they can allocate
// a buffer big enough for any type of bus unit. Increase as needed.
/*
* Maximum BusUnitInfo buffer size. Provided for clients so
* they can allocate a buffer big enough for any type of bus
* unit. Increase as needed.
*/
enum {HvCallPci_MaxBusUnitInfoSize = 128};
struct HvCallPci_BarParms {
@@ -89,12 +92,12 @@ struct HvCallPci_BarParms {
u64 protectStart;
u64 protectEnd;
u64 relocationOffset;
u64 pciAddress;
u64 pciAddress;
u64 reserved[3];
};
};
enum HvCallPci_VpdType {
HvCallPci_BusVpd = 1,
HvCallPci_BusVpd = 1,
HvCallPci_BusAdapterVpd = 2
};
@@ -123,15 +126,13 @@ enum HvCallPci_VpdType {
#define HvCallPciUnmaskInterrupts HvCallPci + 49
#define HvCallPciGetBusUnitInfo HvCallPci + 50
//============================================================================
static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset,
u8 *value)
u8 deviceId, u32 offset, u8 *value)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
@@ -139,21 +140,18 @@ static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
*value = retVal.value;
return retVal.rc;
}
//============================================================================
static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset,
u16 *value)
u8 deviceId, u32 offset, u16 *value)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
@@ -161,21 +159,18 @@ static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
*value = retVal.value;
return retVal.rc;
}
//============================================================================
static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset,
u32 *value)
static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset, u32 *value)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
@@ -183,84 +178,61 @@ static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
*value = retVal.value;
return retVal.rc;
}
//============================================================================
static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset,
u8 value)
static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset, u8 value)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
dsa.deviceId = deviceId;
retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
}
//============================================================================
static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset,
u16 value)
static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset, u16 value)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
dsa.deviceId = deviceId;
retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
}
//============================================================================
static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset,
u32 value)
static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
u8 deviceId, u32 offset, u32 value)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
dsa.deviceId = deviceId;
retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
}
//============================================================================
static inline u64 HvCallPci_barLoad8(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u8 barNumberParm,
u64 offsetParm,
u8* valueParm)
static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
u8 *valueParm)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -269,24 +241,19 @@ static inline u64 HvCallPci_barLoad8(u16 busNumberParm,
HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
*valueParm = retVal.value;
return retVal.rc;
}
//============================================================================
static inline u64 HvCallPci_barLoad16(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u8 barNumberParm,
u64 offsetParm,
u16* valueParm)
static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
u16 *valueParm)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -295,24 +262,19 @@ static inline u64 HvCallPci_barLoad16(u16 busNumberParm,
HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
*valueParm = retVal.value;
return retVal.rc;
}
//============================================================================
static inline u64 HvCallPci_barLoad32(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u8 barNumberParm,
u64 offsetParm,
u32* valueParm)
static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
u32 *valueParm)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -321,24 +283,19 @@ static inline u64 HvCallPci_barLoad32(u16 busNumberParm,
HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
*valueParm = retVal.value;
return retVal.rc;
}
//============================================================================
static inline u64 HvCallPci_barLoad64(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u8 barNumberParm,
u64 offsetParm,
u64* valueParm)
static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
u64 *valueParm)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -347,112 +304,81 @@ static inline u64 HvCallPci_barLoad64(u16 busNumberParm,
HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
*valueParm = retVal.value;
return retVal.rc;
}
//============================================================================
static inline u64 HvCallPci_barStore8(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u8 barNumberParm,
u64 offsetParm,
u8 valueParm)
static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
u8 valueParm)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
dsa.barNumber = barNumberParm;
retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm,
valueParm, 0);
}
//============================================================================
static inline u64 HvCallPci_barStore16(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u8 barNumberParm,
u64 offsetParm,
u16 valueParm)
static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
u16 valueParm)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
dsa.barNumber = barNumberParm;
retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm,
valueParm, 0);
}
//============================================================================
static inline u64 HvCallPci_barStore32(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u8 barNumberParm,
u64 offsetParm,
u32 valueParm)
static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
u32 valueParm)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
dsa.barNumber = barNumberParm;
retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm,
valueParm, 0);
}
//============================================================================
static inline u64 HvCallPci_barStore64(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u8 barNumberParm,
u64 offsetParm,
u64 valueParm)
static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
u64 valueParm)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
dsa.barNumber = barNumberParm;
retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm,
valueParm, 0);
}
//============================================================================
static inline u64 HvCallPci_eoi(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm)
static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
@@ -465,20 +391,13 @@ static inline u64 HvCallPci_eoi(u16 busNumberParm,
HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal.rc;
}
//============================================================================
static inline u64 HvCallPci_getBarParms(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u8 barNumberParm,
u64 parms,
u32 sizeofParms)
static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
@@ -487,62 +406,13 @@ static inline u64 HvCallPci_getBarParms(u16 busNumberParm,
dsa.deviceId = deviceIdParm;
dsa.barNumber = barNumberParm;
retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
}
//============================================================================
static inline u64 HvCallPci_maskFisr(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u64 fisrMask)
static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u64 fisrMask)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//============================================================================
static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u64 fisrMask)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//============================================================================
static inline u64 HvCallPci_setSlotReset(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u64 onNotOff)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
@@ -550,21 +420,41 @@ static inline u64 HvCallPci_setSlotReset(u16 busNumberParm,
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
}
//============================================================================
static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm,
u8 subBusParm,
u8 deviceNumberParm,
u64 parms,
u32 sizeofParms)
static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u64 fisrMask)
{
struct HvCallPci_DsaAddr dsa;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
}
static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u64 onNotOff)
{
struct HvCallPci_DsaAddr dsa;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
return HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
}
static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
u8 deviceNumberParm, u64 parms, u32 sizeofParms)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
@@ -572,102 +462,72 @@ static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm,
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceNumberParm << 4;
retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
}
//============================================================================
static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u64 interruptMask)
static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u64 interruptMask)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
}
//============================================================================
static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u64 interruptMask)
static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u64 interruptMask)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
}
//============================================================================
static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm,
u8 subBusParm,
u8 deviceIdParm,
u64 parms,
u32 sizeofParms)
static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
u8 deviceIdParm, u64 parms, u32 sizeofParms)
{
struct HvCallPci_DsaAddr dsa;
u64 retVal;
*((u64*)&dsa) = 0;
*((u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms,
sizeofParms);
}
//============================================================================
static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm, u16 sizeParm)
static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
u16 sizeParm)
{
int xRetSize;
u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
sizeParm, HvCallPci_BusVpd);
if (xRc == -1)
xRetSize = -1;
return -1;
else
xRetSize = xRc & 0xFFFF;
return xRetSize;
return xRc & 0xFFFF;
}
//============================================================================
static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm, u16 sizeParm)
static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm,
u16 sizeParm)
{
int xRetSize;
u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
sizeParm, HvCallPci_BusAdapterVpd);
if (xRc == -1)
xRetSize = -1;
return -1;
else
xRetSize = xRc & 0xFFFF;
return xRetSize;
return xRc & 0xFFFF;
}
//============================================================================
#endif /* _HVCALLPCI_H */

40
include/asm-ppc64/iSeries/HvCallSc.h
View File

@@ -1,17 +1,17 @@
/*
* HvCallSc.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,7 +19,7 @@
#ifndef _HVCALLSC_H
#define _HVCALLSC_H
#include <asm/iSeries/HvTypes.h>
#include <linux/types.h>
#define HvCallBase 0x8000000000000000ul
#define HvCallCc 0x8001000000000000ul
@@ -30,22 +30,22 @@
#define HvCallSm 0x8007000000000000ul
#define HvCallXm 0x8009000000000000ul
u64 HvCall0( u64 );
u64 HvCall1( u64, u64 );
u64 HvCall2( u64, u64, u64 );
u64 HvCall3( u64, u64, u64, u64 );
u64 HvCall4( u64, u64, u64, u64, u64 );
u64 HvCall5( u64, u64, u64, u64, u64, u64 );
u64 HvCall6( u64, u64, u64, u64, u64, u64, u64 );
u64 HvCall7( u64, u64, u64, u64, u64, u64, u64, u64 );
extern u64 HvCall0(u64);
extern u64 HvCall1(u64, u64);
extern u64 HvCall2(u64, u64, u64);
extern u64 HvCall3(u64, u64, u64, u64);
extern u64 HvCall4(u64, u64, u64, u64, u64);
extern u64 HvCall5(u64, u64, u64, u64, u64, u64);
extern u64 HvCall6(u64, u64, u64, u64, u64, u64, u64);
extern u64 HvCall7(u64, u64, u64, u64, u64, u64, u64, u64);
u64 HvCall0Ret16( u64, void * );
u64 HvCall1Ret16( u64, void *, u64 );
u64 HvCall2Ret16( u64, void *, u64, u64 );
u64 HvCall3Ret16( u64, void *, u64, u64, u64 );
u64 HvCall4Ret16( u64, void *, u64, u64, u64, u64 );
u64 HvCall5Ret16( u64, void *, u64, u64, u64, u64, u64 );
u64 HvCall6Ret16( u64, void *, u64, u64, u64, u64, u64, u64 );
u64 HvCall7Ret16( u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64 );
extern u64 HvCall0Ret16(u64, void *);
extern u64 HvCall1Ret16(u64, void *, u64);
extern u64 HvCall2Ret16(u64, void *, u64, u64);
extern u64 HvCall3Ret16(u64, void *, u64, u64, u64);
extern u64 HvCall4Ret16(u64, void *, u64, u64, u64, u64);
extern u64 HvCall5Ret16(u64, void *, u64, u64, u64, u64, u64);
extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64);
extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64);
#endif /* _HVCALLSC_H */

36
include/asm-ppc64/iSeries/HvCallSm.h
View File

@@ -1,17 +1,17 @@
/*
* HvCallSm.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,34 +19,20 @@
#ifndef _HVCALLSM_H
#define _HVCALLSM_H
//============================================================================
//
// This file contains the "hypervisor call" interface which is used to
// drive the hypervisor from the OS.
//
//============================================================================
/*
* This file contains the "hypervisor call" interface which is used to
* drive the hypervisor from the OS.
*/
//-------------------------------------------------------------------
// Standard Includes
//-------------------------------------------------------------------
#include <asm/iSeries/HvCallSc.h>
#include <asm/iSeries/HvTypes.h>
//-----------------------------------------------------------------------------
// Constants
//-----------------------------------------------------------------------------
#define HvCallSmGet64BitsOfAccessMap HvCallSm + 11
//============================================================================
static inline u64 HvCallSm_get64BitsOfAccessMap(
HvLpIndex lpIndex, u64 indexIntoBitMap )
static inline u64 HvCallSm_get64BitsOfAccessMap(HvLpIndex lpIndex,
u64 indexIntoBitMap)
{
u64 retval = HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex,
indexIntoBitMap );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retval;
return HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, indexIntoBitMap);
}
//============================================================================
#endif /* _HVCALLSM_H */

127
include/asm-ppc64/iSeries/HvCallXm.h
View File

@@ -1,30 +1,13 @@
//============================================================================
// Header File Id
// Name______________: HvCallXm.H
//
// Description_______:
//
// This file contains the "hypervisor call" interface which is used to
// drive the hypervisor from SLIC.
//
//============================================================================
/*
* This file contains the "hypervisor call" interface which is used to
* drive the hypervisor from SLIC.
*/
#ifndef _HVCALLXM_H
#define _HVCALLXM_H
//-------------------------------------------------------------------
// Forward declarations
//-------------------------------------------------------------------
//-------------------------------------------------------------------
// Standard Includes
//-------------------------------------------------------------------
#include <asm/iSeries/HvCallSc.h>
#include <asm/iSeries/HvTypes.h>
//-----------------------------------------------------------------------------
// Constants
//-----------------------------------------------------------------------------
#define HvCallXmGetTceTableParms HvCallXm + 0
#define HvCallXmTestBus HvCallXm + 1
#define HvCallXmConnectBusUnit HvCallXm + 2
@@ -33,63 +16,63 @@
#define HvCallXmSetTce HvCallXm + 11
#define HvCallXmSetTces HvCallXm + 13
/*
* Structure passed to HvCallXm_getTceTableParms
*/
struct iommu_table_cb {
unsigned long itc_busno; /* Bus number for this tce table */
unsigned long itc_start; /* Will be NULL for secondary */
unsigned long itc_totalsize; /* Size (in pages) of whole table */
unsigned long itc_offset; /* Index into real tce table of the
start of our section */
unsigned long itc_size; /* Size (in pages) of our section */
unsigned long itc_index; /* Index of this tce table */
unsigned short itc_maxtables; /* Max num of tables for partition */
unsigned char itc_virtbus; /* Flag to indicate virtual bus */
unsigned char itc_slotno; /* IOA Tce Slot Index */
unsigned char itc_rsvd[4];
};
//============================================================================
static inline void HvCallXm_getTceTableParms(u64 cb)
static inline void HvCallXm_getTceTableParms(u64 cb)
{
HvCall1(HvCallXmGetTceTableParms, cb);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
}
//============================================================================
static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce)
{
u64 retval = HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retval;
}
//============================================================================
static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset, u64 numTces, u64 tce1, u64 tce2, u64 tce3, u64 tce4)
{
u64 retval = HvCall7(HvCallXmSetTces, tceTableToken, tceOffset, numTces,
tce1, tce2, tce3, tce4 );
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retval;
}
//=============================================================================
static inline u64 HvCallXm_testBus(u16 busNumber)
{
u64 retVal = HvCall1(HvCallXmTestBus, busNumber);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//=====================================================================================
static inline u64 HvCallXm_testBusUnit(u16 busNumber, u8 subBusNumber, u8 deviceId)
{
u64 busUnitNumber = (subBusNumber << 8) | deviceId;
u64 retVal = HvCall2(HvCallXmTestBusUnit, busNumber, busUnitNumber);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//=====================================================================================
static inline u64 HvCallXm_connectBusUnit(u16 busNumber, u8 subBusNumber, u8 deviceId,
u64 interruptToken)
{
u64 busUnitNumber = (subBusNumber << 8) | deviceId;
u64 queueIndex = 0; // HvLpConfig::mapDsaToQueueIndex(HvLpDSA(busNumber, xBoard, xCard));
u64 retVal = HvCall5(HvCallXmConnectBusUnit, busNumber, busUnitNumber,
interruptToken, 0, queueIndex);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
}
//=====================================================================================
static inline u64 HvCallXm_loadTod(void)
static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce)
{
u64 retVal = HvCall0(HvCallXmLoadTod);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
return retVal;
return HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce);
}
static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset,
u64 numTces, u64 tce1, u64 tce2, u64 tce3, u64 tce4)
{
return HvCall7(HvCallXmSetTces, tceTableToken, tceOffset, numTces,
tce1, tce2, tce3, tce4);
}
static inline u64 HvCallXm_testBus(u16 busNumber)
{
return HvCall1(HvCallXmTestBus, busNumber);
}
static inline u64 HvCallXm_testBusUnit(u16 busNumber, u8 subBusNumber,
u8 deviceId)
{
return HvCall2(HvCallXmTestBusUnit, busNumber,
(subBusNumber << 8) | deviceId);
}
static inline u64 HvCallXm_connectBusUnit(u16 busNumber, u8 subBusNumber,
u8 deviceId, u64 interruptToken)
{
return HvCall5(HvCallXmConnectBusUnit, busNumber,
(subBusNumber << 8) | deviceId, interruptToken, 0,
0 /* HvLpConfig::mapDsaToQueueIndex(HvLpDSA(busNumber, xBoard, xCard)) */);
}
static inline u64 HvCallXm_loadTod(void)
{
return HvCall0(HvCallXmLoadTod);
}
//=====================================================================================
#endif /* _HVCALLXM_H */

298
include/asm-ppc64/iSeries/HvLpConfig.h
View File

@@ -1,17 +1,17 @@
/*
* HvLpConfig.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,262 +19,120 @@
#ifndef _HVLPCONFIG_H
#define _HVLPCONFIG_H
//===========================================================================
//
// This file contains the interface to the LPAR configuration data
// to determine which resources should be allocated to each partition.
//
//===========================================================================
/*
* This file contains the interface to the LPAR configuration data
* to determine which resources should be allocated to each partition.
*/
#include <asm/iSeries/HvCallCfg.h>
#include <asm/iSeries/HvCallSc.h>
#include <asm/iSeries/HvTypes.h>
#include <asm/iSeries/ItLpNaca.h>
#include <asm/iSeries/LparData.h>
//-------------------------------------------------------------------
// Constants
//-------------------------------------------------------------------
enum {
HvCallCfg_Cur = 0,
HvCallCfg_Init = 1,
HvCallCfg_Max = 2,
HvCallCfg_Min = 3
};
#define HvCallCfgGetSystemPhysicalProcessors HvCallCfg + 6
#define HvCallCfgGetPhysicalProcessors HvCallCfg + 7
#define HvCallCfgGetMsChunks HvCallCfg + 9
#define HvCallCfgGetSharedPoolIndex HvCallCfg + 20
#define HvCallCfgGetSharedProcUnits HvCallCfg + 21
#define HvCallCfgGetNumProcsInSharedPool HvCallCfg + 22
#define HvCallCfgGetVirtualLanIndexMap HvCallCfg + 30
#define HvCallCfgGetHostingLpIndex HvCallCfg + 32
extern HvLpIndex HvLpConfig_getLpIndex_outline(void);
//===================================================================
static inline HvLpIndex HvLpConfig_getLpIndex(void)
{
return itLpNaca.xLpIndex;
}
//===================================================================
static inline HvLpIndex HvLpConfig_getPrimaryLpIndex(void)
{
return itLpNaca.xPrimaryLpIndex;
}
//=================================================================
static inline HvLpIndex HvLpConfig_getLps(void)
static inline u64 HvLpConfig_getMsChunks(void)
{
return HvCallCfg_getLps();
return HvCall2(HvCallCfgGetMsChunks, HvLpConfig_getLpIndex(),
HvCallCfg_Cur);
}
//=================================================================
static inline HvLpIndexMap HvLpConfig_getActiveLpMap(void)
static inline u64 HvLpConfig_getSystemPhysicalProcessors(void)
{
return HvCallCfg_getActiveLpMap();
return HvCall0(HvCallCfgGetSystemPhysicalProcessors);
}
//=================================================================
static inline u64 HvLpConfig_getSystemMsMegs(void)
static inline u64 HvLpConfig_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
{
return HvCallCfg_getSystemMsChunks() / HVCHUNKSPERMEG;
return (u16)HvCall1(HvCallCfgGetNumProcsInSharedPool, sPI);
}
//=================================================================
static inline u64 HvLpConfig_getSystemMsChunks(void)
static inline u64 HvLpConfig_getPhysicalProcessors(void)
{
return HvCallCfg_getSystemMsChunks();
return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(),
HvCallCfg_Cur);
}
//=================================================================
static inline u64 HvLpConfig_getSystemMsPages(void)
static inline HvLpSharedPoolIndex HvLpConfig_getSharedPoolIndex(void)
{
return HvCallCfg_getSystemMsChunks() * HVPAGESPERCHUNK;
return HvCall1(HvCallCfgGetSharedPoolIndex, HvLpConfig_getLpIndex());
}
//================================================================
static inline u64 HvLpConfig_getMsMegs(void)
static inline u64 HvLpConfig_getSharedProcUnits(void)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Cur) / HVCHUNKSPERMEG;
return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(),
HvCallCfg_Cur);
}
//================================================================
static inline u64 HvLpConfig_getMsChunks(void)
static inline u64 HvLpConfig_getMaxSharedProcUnits(void)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Cur);
return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(),
HvCallCfg_Max);
}
//================================================================
static inline u64 HvLpConfig_getMsPages(void)
static inline u64 HvLpConfig_getMaxPhysicalProcessors(void)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Cur) * HVPAGESPERCHUNK;
return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(),
HvCallCfg_Max);
}
//================================================================
static inline u64 HvLpConfig_getMinMsMegs(void)
static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMapForLp(
HvLpIndex lp)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Min) / HVCHUNKSPERMEG;
/*
* This is a new function in V5R1 so calls to this on older
* hypervisors will return -1
*/
u64 retVal = HvCall1(HvCallCfgGetVirtualLanIndexMap, lp);
if (retVal == -1)
retVal = 0;
return retVal;
}
//================================================================
static inline u64 HvLpConfig_getMinMsChunks(void)
static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMap(void)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Min);
return HvLpConfig_getVirtualLanIndexMapForLp(
HvLpConfig_getLpIndex_outline());
}
//================================================================
static inline u64 HvLpConfig_getMinMsPages(void)
static inline int HvLpConfig_doLpsCommunicateOnVirtualLan(HvLpIndex lp1,
HvLpIndex lp2)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Min) * HVPAGESPERCHUNK;
}
//================================================================
static inline u64 HvLpConfig_getMinRuntimeMsMegs(void)
{
return HvCallCfg_getMinRuntimeMsChunks(HvLpConfig_getLpIndex()) / HVCHUNKSPERMEG;
}
//===============================================================
static inline u64 HvLpConfig_getMinRuntimeMsChunks(void)
{
return HvCallCfg_getMinRuntimeMsChunks(HvLpConfig_getLpIndex());
}
//===============================================================
static inline u64 HvLpConfig_getMinRuntimeMsPages(void)
{
return HvCallCfg_getMinRuntimeMsChunks(HvLpConfig_getLpIndex()) * HVPAGESPERCHUNK;
}
//===============================================================
static inline u64 HvLpConfig_getMaxMsMegs(void)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Max) / HVCHUNKSPERMEG;
}
//===============================================================
static inline u64 HvLpConfig_getMaxMsChunks(void)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Max);
}
//===============================================================
static inline u64 HvLpConfig_getMaxMsPages(void)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Max) * HVPAGESPERCHUNK;
}
//===============================================================
static inline u64 HvLpConfig_getInitMsMegs(void)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Init) / HVCHUNKSPERMEG;
}
//===============================================================
static inline u64 HvLpConfig_getInitMsChunks(void)
{
return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Init);
}
//===============================================================
static inline u64 HvLpConfig_getInitMsPages(void)
{ return HvCallCfg_getMsChunks(HvLpConfig_getLpIndex(),HvCallCfg_Init) * HVPAGESPERCHUNK;
}
//===============================================================
static inline u64 HvLpConfig_getSystemPhysicalProcessors(void)
{
return HvCallCfg_getSystemPhysicalProcessors();
}
//===============================================================
static inline u64 HvLpConfig_getSystemLogicalProcessors(void)
{
return HvCallCfg_getSystemPhysicalProcessors() * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
}
//===============================================================
static inline u64 HvLpConfig_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI)
{
return HvCallCfg_getNumProcsInSharedPool(sPI);
}
//===============================================================
static inline u64 HvLpConfig_getPhysicalProcessors(void)
{
return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Cur);
}
//===============================================================
static inline u64 HvLpConfig_getLogicalProcessors(void)
{
return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Cur) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
}
//===============================================================
static inline HvLpSharedPoolIndex HvLpConfig_getSharedPoolIndex(void)
{
return HvCallCfg_getSharedPoolIndex(HvLpConfig_getLpIndex());
}
//===============================================================
static inline u64 HvLpConfig_getSharedProcUnits(void)
{
return HvCallCfg_getSharedProcUnits(HvLpConfig_getLpIndex(),HvCallCfg_Cur);
}
//===============================================================
static inline u64 HvLpConfig_getMinSharedProcUnits(void)
{
return HvCallCfg_getSharedProcUnits(HvLpConfig_getLpIndex(),HvCallCfg_Min);
}
//===============================================================
static inline u64 HvLpConfig_getMaxSharedProcUnits(void)
{
return HvCallCfg_getSharedProcUnits(HvLpConfig_getLpIndex(),HvCallCfg_Max);
}
//===============================================================
static inline u64 HvLpConfig_getMinPhysicalProcessors(void)
{
return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Min);
}
//===============================================================
static inline u64 HvLpConfig_getMinLogicalProcessors(void)
{
return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Min) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
}
//===============================================================
static inline u64 HvLpConfig_getMaxPhysicalProcessors(void)
{
return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Max);
}
//===============================================================
static inline u64 HvLpConfig_getMaxLogicalProcessors(void)
{
return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Max) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
}
//===============================================================
static inline u64 HvLpConfig_getInitPhysicalProcessors(void)
{
return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Init);
}
//===============================================================
static inline u64 HvLpConfig_getInitLogicalProcessors(void)
{
return HvCallCfg_getPhysicalProcessors(HvLpConfig_getLpIndex(),HvCallCfg_Init) * (/*getPaca()->getSecondaryThreadCount() +*/ 1);
}
//================================================================
static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMap(void)
{
return HvCallCfg_getVirtualLanIndexMap(HvLpConfig_getLpIndex_outline());
}
//===============================================================
static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMapForLp(HvLpIndex lp)
{
return HvCallCfg_getVirtualLanIndexMap(lp);
}
//================================================================
static inline HvLpIndex HvLpConfig_getBusOwner(HvBusNumber busNumber)
{
return HvCallCfg_getBusOwner(busNumber);
}
//===============================================================
static inline int HvLpConfig_isBusDedicated(HvBusNumber busNumber)
{
return HvCallCfg_isBusDedicated(busNumber);
}
//================================================================
static inline HvLpIndexMap HvLpConfig_getBusAllocation(HvBusNumber busNumber)
{
return HvCallCfg_getBusAllocation(busNumber);
}
//================================================================
// returns the absolute real address of the load area
static inline u64 HvLpConfig_getLoadAddress(void)
{
return itLpNaca.xLoadAreaAddr & 0x7fffffffffffffff;
}
//================================================================
static inline u64 HvLpConfig_getLoadPages(void)
{
return itLpNaca.xLoadAreaChunks * HVPAGESPERCHUNK;
}
//================================================================
static inline int HvLpConfig_isBusOwnedByThisLp(HvBusNumber busNumber)
{
HvLpIndex busOwner = HvLpConfig_getBusOwner(busNumber);
return (busOwner == HvLpConfig_getLpIndex());
}
//================================================================
static inline int HvLpConfig_doLpsCommunicateOnVirtualLan(HvLpIndex lp1, HvLpIndex lp2)
{
HvLpVirtualLanIndexMap virtualLanIndexMap1 = HvCallCfg_getVirtualLanIndexMap( lp1 );
HvLpVirtualLanIndexMap virtualLanIndexMap2 = HvCallCfg_getVirtualLanIndexMap( lp2 );
HvLpVirtualLanIndexMap virtualLanIndexMap1 =
HvLpConfig_getVirtualLanIndexMapForLp(lp1);
HvLpVirtualLanIndexMap virtualLanIndexMap2 =
HvLpConfig_getVirtualLanIndexMapForLp(lp2);
return ((virtualLanIndexMap1 & virtualLanIndexMap2) != 0);
}
//================================================================
static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp)
static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp)
{
return HvCallCfg_getHostingLpIndex(lp);
return HvCall1(HvCallCfgGetHostingLpIndex, lp);
}
//================================================================
#endif /* _HVLPCONFIG_H */

114
include/asm-ppc64/iSeries/HvLpEvent.h
View File

@@ -1,27 +1,24 @@
/*
* HvLpEvent.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
//======================================================================
//
// This file contains the class for HV events in the system.
//
//=====================================================================
/* This file contains the class for HV events in the system. */
#ifndef _HVLPEVENT_H
#define _HVLPEVENT_H
@@ -30,69 +27,70 @@
#include <asm/iSeries/HvTypes.h>
#include <asm/iSeries/HvCallEvent.h>
//=====================================================================
//
// HvLpEvent is the structure for Lp Event messages passed between
// partitions through PLIC.
//
//=====================================================================
/*
* HvLpEvent is the structure for Lp Event messages passed between
* partitions through PLIC.
*/
struct HvEventFlags
{
u8 xValid:1; // Indicates a valid request x00-x00
u8 xRsvd1:4; // Reserved ...
u8 xAckType:1; // Immediate or deferred ...
u8 xAckInd:1; // Indicates if ACK required ...
u8 xFunction:1; // Interrupt or Acknowledge ...
struct HvEventFlags {
u8 xValid:1; /* Indicates a valid request x00-x00 */
u8 xRsvd1:4; /* Reserved ... */
u8 xAckType:1; /* Immediate or deferred ... */
u8 xAckInd:1; /* Indicates if ACK required ... */
u8 xFunction:1; /* Interrupt or Acknowledge ... */
};
struct HvLpEvent
{
struct HvEventFlags xFlags; // Event flags x00-x00
u8 xType; // Type of message x01-x01
u16 xSubtype; // Subtype for event x02-x03
u8 xSourceLp; // Source LP x04-x04
u8 xTargetLp; // Target LP x05-x05
u8 xSizeMinus1; // Size of Derived class - 1 x06-x06
u8 xRc; // RC for Ack flows x07-x07
u16 xSourceInstanceId; // Source sides instance id x08-x09
u16 xTargetInstanceId; // Target sides instance id x0A-x0B
struct HvLpEvent {
struct HvEventFlags xFlags; /* Event flags x00-x00 */
u8 xType; /* Type of message x01-x01 */
u16 xSubtype; /* Subtype for event x02-x03 */
u8 xSourceLp; /* Source LP x04-x04 */
u8 xTargetLp; /* Target LP x05-x05 */
u8 xSizeMinus1; /* Size of Derived class - 1 x06-x06 */
u8 xRc; /* RC for Ack flows x07-x07 */
u16 xSourceInstanceId; /* Source sides instance id x08-x09 */
u16 xTargetInstanceId; /* Target sides instance id x0A-x0B */
union {
u32 xSubtypeData; // Data usable by the subtype x0C-x0F
u16 xSubtypeDataShort[2]; // Data as 2 shorts
u8 xSubtypeDataChar[4]; // Data as 4 chars
u32 xSubtypeData; /* Data usable by the subtype x0C-x0F */
u16 xSubtypeDataShort[2]; /* Data as 2 shorts */
u8 xSubtypeDataChar[4]; /* Data as 4 chars */
} x;
u64 xCorrelationToken; // Unique value for source/type x10-x17
u64 xCorrelationToken; /* Unique value for source/type x10-x17 */
};
// Lp Event handler function
typedef void (*LpEventHandler)(struct HvLpEvent *, struct pt_regs *);
// Register a handler for an event type
// returns 0 on success
extern int HvLpEvent_registerHandler( HvLpEvent_Type eventType, LpEventHandler hdlr);
/* Register a handler for an event type - returns 0 on success */
extern int HvLpEvent_registerHandler(HvLpEvent_Type eventType,
LpEventHandler hdlr);
// Unregister a handler for an event type
// This call will sleep until the handler being removed is guaranteed to
// be no longer executing on any CPU. Do not call with locks held.
//
// returns 0 on success
// Unregister will fail if there are any paths open for the type
extern int HvLpEvent_unregisterHandler( HvLpEvent_Type eventType );
/*
* Unregister a handler for an event type
*
* This call will sleep until the handler being removed is guaranteed to
* be no longer executing on any CPU. Do not call with locks held.
*
* returns 0 on success
* Unregister will fail if there are any paths open for the type
*/
extern int HvLpEvent_unregisterHandler(HvLpEvent_Type eventType);
// Open an Lp Event Path for an event type
// returns 0 on success
// openPath will fail if there is no handler registered for the event type.
// The lpIndex specified is the partition index for the target partition
// (for VirtualIo, VirtualLan and SessionMgr) other types specify zero)
extern int HvLpEvent_openPath( HvLpEvent_Type eventType, HvLpIndex lpIndex );
/*
* Open an Lp Event Path for an event type
* returns 0 on success
* openPath will fail if there is no handler registered for the event type.
* The lpIndex specified is the partition index for the target partition
* (for VirtualIo, VirtualLan and SessionMgr) other types specify zero)
*/
extern int HvLpEvent_openPath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
// Close an Lp Event Path for a type and partition
// returns 0 on sucess
extern int HvLpEvent_closePath( HvLpEvent_Type eventType, HvLpIndex lpIndex );
/*
* Close an Lp Event Path for a type and partition
* returns 0 on sucess
*/
extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
#define HvLpEvent_Type_Hypervisor 0
#define HvLpEvent_Type_MachineFac 1
@@ -141,4 +139,4 @@ extern int HvLpEvent_closePath( HvLpEvent_Type eventType, HvLpIndex lpIndex );
#define HvLpDma_Rc_InvalidAddress 4
#define HvLpDma_Rc_InvalidLength 5
#endif // _HVLPEVENT_H
#endif /* _HVLPEVENT_H */

78
include/asm-ppc64/iSeries/HvReleaseData.h
View File

@@ -1,17 +1,17 @@
/*
* HvReleaseData.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,47 +19,45 @@
#ifndef _HVRELEASEDATA_H
#define _HVRELEASEDATA_H
//=============================================================================
//
// This control block contains the critical information about the
// release so that it can be changed in the future (ie, the virtual
// address of the OS's NACA).
//
/*
* This control block contains the critical information about the
* release so that it can be changed in the future (ie, the virtual
* address of the OS's NACA).
*/
#include <asm/types.h>
#include <asm/naca.h>
//=============================================================================
//
// When we IPL a secondary partition, we will check if if the
// secondary xMinPlicVrmIndex > the primary xVrmIndex.
// If it is then this tells PLIC that this secondary is not
// supported running on this "old" of a level of PLIC.
//
// Likewise, we will compare the primary xMinSlicVrmIndex to
// the secondary xVrmIndex.
// If the primary xMinSlicVrmDelta > secondary xVrmDelta then we
// know that this PLIC does not support running an OS "that old".
//
//=============================================================================
/*
* When we IPL a secondary partition, we will check if if the
* secondary xMinPlicVrmIndex > the primary xVrmIndex.
* If it is then this tells PLIC that this secondary is not
* supported running on this "old" of a level of PLIC.
*
* Likewise, we will compare the primary xMinSlicVrmIndex to
* the secondary xVrmIndex.
* If the primary xMinSlicVrmDelta > secondary xVrmDelta then we
* know that this PLIC does not support running an OS "that old".
*/
struct HvReleaseData
{
u32 xDesc; // Descriptor "HvRD" ebcdic x00-x03
u16 xSize; // Size of this control block x04-x05
u16 xVpdAreasPtrOffset; // Offset in NACA of ItVpdAreas x06-x07
struct naca_struct * xSlicNacaAddr; // Virt addr of SLIC NACA x08-x0F
u32 xMsNucDataOffset; // Offset of Linux Mapping Data x10-x13
u32 xRsvd1; // Reserved x14-x17
u16 xTagsMode:1; // 0 == tags active, 1 == tags inactive
u16 xAddressSize:1; // 0 == 64-bit, 1 == 32-bit
u16 xNoSharedProcs:1; // 0 == shared procs, 1 == no shared
u16 xNoHMT:1; // 0 == allow HMT, 1 == no HMT
u16 xRsvd2:12; // Reserved x18-x19
u16 xVrmIndex; // VRM Index of OS image x1A-x1B
u16 xMinSupportedPlicVrmIndex;// Min PLIC level (soft) x1C-x1D
u16 xMinCompatablePlicVrmIndex;// Min PLIC levelP (hard) x1E-x1F
char xVrmName[12]; // Displayable name x20-x2B
char xRsvd3[20]; // Reserved x2C-x3F
struct HvReleaseData {
u32 xDesc; /* Descriptor "HvRD" ebcdic x00-x03 */
u16 xSize; /* Size of this control block x04-x05 */
u16 xVpdAreasPtrOffset; /* Offset in NACA of ItVpdAreas x06-x07 */
struct naca_struct *xSlicNacaAddr; /* Virt addr of SLIC NACA x08-x0F */
u32 xMsNucDataOffset; /* Offset of Linux Mapping Data x10-x13 */
u32 xRsvd1; /* Reserved x14-x17 */
u16 xTagsMode:1; /* 0 == tags active, 1 == tags inactive */
u16 xAddressSize:1; /* 0 == 64-bit, 1 == 32-bit */
u16 xNoSharedProcs:1; /* 0 == shared procs, 1 == no shared */
u16 xNoHMT:1; /* 0 == allow HMT, 1 == no HMT */
u16 xRsvd2:12; /* Reserved x18-x19 */
u16 xVrmIndex; /* VRM Index of OS image x1A-x1B */
u16 xMinSupportedPlicVrmIndex; /* Min PLIC level (soft) x1C-x1D */
u16 xMinCompatablePlicVrmIndex; /* Min PLIC levelP (hard) x1E-x1F */
char xVrmName[12]; /* Displayable name x20-x2B */
char xRsvd3[20]; /* Reserved x2C-x3F */
};
extern struct HvReleaseData hvReleaseData;
#endif /* _HVRELEASEDATA_H */

108
include/asm-ppc64/iSeries/HvTypes.h
View File

@@ -1,17 +1,17 @@
/*
* HvTypes.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,74 +19,60 @@
#ifndef _HVTYPES_H
#define _HVTYPES_H
//===========================================================================
// Header File Id
// Name______________: HvTypes.H
//
// Description_______:
//
// General typedefs for the hypervisor.
//
// Declared Class(es):
//
//===========================================================================
/*
* General typedefs for the hypervisor.
*/
#include <asm/types.h>
//-------------------------------------------------------------------
// Typedefs
//-------------------------------------------------------------------
typedef u8 HvLpIndex;
typedef u16 HvLpInstanceId;
typedef u64 HvLpTOD;
typedef u64 HvLpSystemSerialNum;
typedef u8 HvLpDeviceSerialNum[12];
typedef u16 HvLpSanHwSet;
typedef u16 HvLpBus;
typedef u16 HvLpBoard;
typedef u16 HvLpCard;
typedef u8 HvLpDeviceType[4];
typedef u8 HvLpDeviceModel[3];
typedef u64 HvIoToken;
typedef u8 HvLpName[8];
typedef u64 HvLpTOD;
typedef u64 HvLpSystemSerialNum;
typedef u8 HvLpDeviceSerialNum[12];
typedef u16 HvLpSanHwSet;
typedef u16 HvLpBus;
typedef u16 HvLpBoard;
typedef u16 HvLpCard;
typedef u8 HvLpDeviceType[4];
typedef u8 HvLpDeviceModel[3];
typedef u64 HvIoToken;
typedef u8 HvLpName[8];
typedef u32 HvIoId;
typedef u64 HvRealMemoryIndex;
typedef u32 HvLpIndexMap; // Must hold HvMaxArchitectedLps bits!!!
typedef u32 HvLpIndexMap; /* Must hold HVMAXARCHITECTEDLPS bits!!! */
typedef u16 HvLpVrmIndex;
typedef u32 HvXmGenerationId;
typedef u8 HvLpBusPool;
typedef u8 HvLpSharedPoolIndex;
typedef u8 HvLpBusPool;
typedef u8 HvLpSharedPoolIndex;
typedef u16 HvLpSharedProcUnitsX100;
typedef u8 HvLpVirtualLanIndex;
typedef u16 HvLpVirtualLanIndexMap; // Must hold HvMaxArchitectedVirtualLans bits!!!
typedef u16 HvBusNumber; // Hypervisor Bus Number
typedef u8 HvSubBusNumber; // Hypervisor SubBus Number
typedef u8 HvAgentId; // Hypervisor DevFn
typedef u16 HvLpVirtualLanIndexMap; /* Must hold HVMAXARCHITECTEDVIRTUALLANS bits!!! */
typedef u16 HvBusNumber; /* Hypervisor Bus Number */
typedef u8 HvSubBusNumber; /* Hypervisor SubBus Number */
typedef u8 HvAgentId; /* Hypervisor DevFn */
#define HVMAXARCHITECTEDLPS 32
#define HVMAXARCHITECTEDVIRTUALLANS 16
#define HVMAXARCHITECTEDVIRTUALDISKS 32
#define HVMAXARCHITECTEDVIRTUALCDROMS 8
#define HVMAXARCHITECTEDVIRTUALTAPES 8
#define HVCHUNKSIZE 256 * 1024
#define HVPAGESIZE 4 * 1024
#define HVLPMINMEGSPRIMARY 256
#define HVLPMINMEGSSECONDARY 64
#define HVCHUNKSPERMEG 4
#define HVPAGESPERMEG 256
#define HVPAGESPERCHUNK 64
#define HvMaxArchitectedLps ((HvLpIndex)HVMAXARCHITECTEDLPS)
#define HvMaxArchitectedVirtualLans ((HvLpVirtualLanIndex)16)
#define HVMAXARCHITECTEDLPS 32
#define HVMAXARCHITECTEDVIRTUALLANS 16
#define HVMAXARCHITECTEDVIRTUALDISKS 32
#define HVMAXARCHITECTEDVIRTUALCDROMS 8
#define HVMAXARCHITECTEDVIRTUALTAPES 8
#define HVCHUNKSIZE (256 * 1024)
#define HVPAGESIZE (4 * 1024)
#define HVLPMINMEGSPRIMARY 256
#define HVLPMINMEGSSECONDARY 64
#define HVCHUNKSPERMEG 4
#define HVPAGESPERMEG 256
#define HVPAGESPERCHUNK 64
#define HvLpIndexInvalid ((HvLpIndex)0xff)
//--------------------------------------------------------------------
// Enums for the sub-components under PLIC
// Used in HvCall and HvPrimaryCall
//--------------------------------------------------------------------
enum HvCallCompIds
{
/*
* Enums for the sub-components under PLIC
* Used in HvCall and HvPrimaryCall
*/
enum {
HvCallCompId = 0,
HvCallCpuCtlsCompId = 1,
HvCallCfgCompId = 2,
@@ -97,18 +83,18 @@ enum HvCallCompIds
HvCallSmCompId = 7,
HvCallSpdCompId = 8,
HvCallXmCompId = 9,
HvCallRioCompId = 10,
HvCallRioCompId = 10,
HvCallRsvd3CompId = 11,
HvCallRsvd2CompId = 12,
HvCallRsvd1CompId = 13,
HvCallMaxCompId = 14,
HvPrimaryCallCompId = 0,
HvPrimaryCallCompId = 0,
HvPrimaryCallCfgCompId = 1,
HvPrimaryCallPciCompId = 2,
HvPrimaryCallPciCompId = 2,
HvPrimaryCallSmCompId = 3,
HvPrimaryCallSpdCompId = 4,
HvPrimaryCallXmCompId = 5,
HvPrimaryCallRioCompId = 6,
HvPrimaryCallRioCompId = 6,
HvPrimaryCallRsvd7CompId = 7,
HvPrimaryCallRsvd6CompId = 8,
HvPrimaryCallRsvd5CompId = 9,
@@ -116,7 +102,7 @@ enum HvCallCompIds
HvPrimaryCallRsvd3CompId = 11,
HvPrimaryCallRsvd2CompId = 12,
HvPrimaryCallRsvd1CompId = 13,
HvPrimaryCallMaxCompId = HvCallMaxCompId
HvPrimaryCallMaxCompId = HvCallMaxCompId
};
struct HvLpBufferList {

33
include/asm-ppc64/iSeries/IoHriMainStore.h
View File

@@ -1,17 +1,17 @@
/*
* IoHriMainStore.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -21,7 +21,7 @@
#define _IOHRIMAINSTORE_H
/* Main Store Vpd for Condor,iStar,sStar */
struct IoHriMainStoreSegment4 {
struct IoHriMainStoreSegment4 {
u8 msArea0Exists:1;
u8 msArea1Exists:1;
u8 msArea2Exists:1;
@@ -51,7 +51,7 @@ struct IoHriMainStoreSegment4 {
u8 msArea1HasRiserVpd:1;
u8 msArea2HasRiserVpd:1;
u8 msArea3HasRiserVpd:1;
u8 reserved5:4;
u8 reserved5:4;
u8 reserved6;
u16 reserved7;
@@ -82,8 +82,8 @@ struct IoHriMainStoreVpdFruData {
};
struct IoHriMainStoreAdrRangeBlock {
void * blockStart __attribute((packed));
void * blockEnd __attribute((packed));
void *blockStart __attribute((packed));
void *blockEnd __attribute((packed));
u32 blockProcChipId __attribute((packed));
};
@@ -102,7 +102,7 @@ struct IoHriMainStoreArea4 {
u32 procNodeId __attribute((packed));
u32 numAdrRangeBlocks __attribute((packed));
struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed));
struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed));
struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed));
struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed));
@@ -113,17 +113,17 @@ struct IoHriMainStoreArea4 {
struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed));
struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed));
void * msRamAreaArray __attribute((packed));
void *msRamAreaArray __attribute((packed));
u32 msRamAreaArrayNumEntries __attribute((packed));
u32 msRamAreaArrayEntrySize __attribute((packed));
u32 numaDimmExists __attribute((packed));
u32 numaDimmFunctional __attribute((packed));
void * numaDimmArray __attribute((packed));
void *numaDimmArray __attribute((packed));
u32 numaDimmArrayNumEntries __attribute((packed));
u32 numaDimmArrayEntrySize __attribute((packed));
struct IoHriMainStoreVpdIdData idData __attribute((packed));
struct IoHriMainStoreVpdIdData idData __attribute((packed));
u64 powerData __attribute((packed));
u64 cardAssemblyPartNum __attribute((packed));
@@ -143,7 +143,7 @@ struct IoHriMainStoreArea4 {
};
struct IoHriMainStoreSegment5 {
struct IoHriMainStoreSegment5 {
u16 reserved1;
u8 reserved2;
u8 msVpdFormat;
@@ -151,17 +151,16 @@ struct IoHriMainStoreSegment5 {
u32 totalMainStore;
u64 maxConfiguredMsAdr;
struct IoHriMainStoreArea4* msAreaArray;
struct IoHriMainStoreArea4 *msAreaArray;
u32 msAreaArrayNumEntries;
u32 msAreaArrayEntrySize;
u32 msAreaExists;
u32 msAreaExists;
u32 msAreaFunctional;
u64 reserved3;
};
extern u64 xMsVpd[];
#endif // _IOHRIMAINSTORE_H
#endif /* _IOHRIMAINSTORE_H */

32
include/asm-ppc64/iSeries/IoHriProcessorVpd.h
View File

@@ -1,17 +1,17 @@
/*
* IoHriProcessorVpd.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,16 +19,12 @@
#ifndef _IOHRIPROCESSORVPD_H
#define _IOHRIPROCESSORVPD_H
//===================================================================
//
// This struct maps Processor Vpd that is DMAd to SLIC by CSP
//
#include <asm/types.h>
struct IoHriProcessorVpd
{
/*
* This struct maps Processor Vpd that is DMAd to SLIC by CSP
*/
struct IoHriProcessorVpd {
u8 xFormat; // VPD format indicator x00-x00
u8 xProcStatus:8; // Processor State x01-x01
u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02
@@ -40,12 +36,12 @@ struct IoHriProcessorVpd
u16 xRsvd2; // Reserved x06-x07
u32 xHwNodeId; // Hardware node id x08-x0B
u32 xHwProcId; // Hardware processor id x0C-x0F
u32 xTypeNum; // Card Type/CCIN number x10-x13
u32 xModelNum; // Model/Feature number x14-x17
u64 xSerialNum; // Serial number x18-x1F
char xPartNum[12]; // Book Part or FPU number x20-x2B
char xMfgID[4]; // Manufacturing ID x2C-x2F
char xPartNum[12]; // Book Part or FPU number x20-x2B
char xMfgID[4]; // Manufacturing ID x2C-x2F
u32 xProcFreq; // Processor Frequency x30-x33
u32 xTimeBaseFreq; // Time Base Frequency x34-x37
@@ -71,7 +67,7 @@ struct IoHriProcessorVpd
u32 xDataL3CacheSizeKB; // L3 data cache size in KB x80-x83
u32 xDataL3CacheLineSize; // L3 data cache block size x84-x87
u64 xRsvd6; // Reserved x88-x8F
u64 xFruLabel; // Card Location Label x90-x97
u8 xSlotsOnCard; // Slots on card (0=no slots) x98-x98
u8 xPartLocFlag; // Location flag (0-pluggable 1-imbedded) x99-x99
@@ -79,10 +75,12 @@ struct IoHriProcessorVpd
u8 xSmartCardPortNo; // Smart card port number x9C-x9C
u8 xRsvd7; // Reserved x9D-x9D
u16 xFrameIdAndRackUnit; // Frame ID and rack unit adr x9E-x9F
u8 xRsvd8[24]; // Reserved xA0-xB7
char xProcSrc[72]; // CSP format SRC xB8-xFF
char xProcSrc[72]; // CSP format SRC xB8-xFF
};
extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
#endif /* _IOHRIPROCESSORVPD_H */

54
include/asm-ppc64/iSeries/ItExtVpdPanel.h
View File

@@ -1,17 +1,17 @@
/*
* ItExtVpdPanel.h
* Copyright (C) 2002 Dave Boutcher IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -20,39 +20,33 @@
#define _ITEXTVPDPANEL_H
/*
*
* This struct maps the panel information
* This struct maps the panel information
*
* Warning:
* This data must match the architecture for the panel information
*
*/
/*-------------------------------------------------------------------
* Standard Includes
*-------------------------------------------------------------------
*/
#include <asm/types.h>
struct ItExtVpdPanel
{
// Definition of the Extended Vpd On Panel Data Area
char systemSerial[8];
char mfgID[4];
char reserved1[24];
char machineType[4];
char systemID[6];
char somUniqueCnt[4];
char serialNumberCount;
char reserved2[7];
u16 bbu3;
u16 bbu2;
u16 bbu1;
char xLocationLabel[8];
u8 xRsvd1[6];
u16 xFrameId;
u8 xRsvd2[48];
struct ItExtVpdPanel {
/* Definition of the Extended Vpd On Panel Data Area */
char systemSerial[8];
char mfgID[4];
char reserved1[24];
char machineType[4];
char systemID[6];
char somUniqueCnt[4];
char serialNumberCount;
char reserved2[7];
u16 bbu3;
u16 bbu2;
u16 bbu1;
char xLocationLabel[8];
u8 xRsvd1[6];
u16 xFrameId;
u8 xRsvd2[48];
};
#endif /* _ITEXTVPDPANEL_H */
extern struct ItExtVpdPanel xItExtVpdPanel;
#endif /* _ITEXTVPDPANEL_H */

99
include/asm-ppc64/iSeries/ItIplParmsReal.h
View File

@@ -1,17 +1,17 @@
/*
* ItIplParmsReal.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,58 +19,53 @@
#ifndef _ITIPLPARMSREAL_H
#define _ITIPLPARMSREAL_H
//==============================================================================
//
// This struct maps the IPL Parameters DMA'd from the SP.
//
// Warning:
// This data must map in exactly 64 bytes and match the architecture for
// the IPL parms
//
//=============================================================================
/*
* This struct maps the IPL Parameters DMA'd from the SP.
*
* Warning:
* This data must map in exactly 64 bytes and match the architecture for
* the IPL parms
*/
//-------------------------------------------------------------------
// Standard Includes
//-------------------------------------------------------------------
#include <asm/types.h>
struct ItIplParmsReal
{
u8 xFormat; // Defines format of IplParms x00-x00
u8 xRsvd01:6; // Reserved x01-x01
u8 xAlternateSearch:1; // Alternate search indicator ...
u8 xUaSupplied:1; // UA Supplied on programmed IPL ...
u8 xLsUaFormat; // Format byte for UA x02-x02
u8 xRsvd02; // Reserved x03-x03
u32 xLsUa; // LS UA x04-x07
u32 xUnusedLsLid; // First OS LID to load x08-x0B
u16 xLsBusNumber; // LS Bus Number x0C-x0D
u8 xLsCardAdr; // LS Card Address x0E-x0E
u8 xLsBoardAdr; // LS Board Address x0F-x0F
u32 xRsvd03; // Reserved x10-x13
u8 xSpcnPresent:1; // SPCN present x14-x14
u8 xCpmPresent:1; // CPM present ...
u8 xRsvd04:6; // Reserved ...
u8 xRsvd05:4; // Reserved x15-x15
u8 xKeyLock:4; // Keylock setting ...
u8 xRsvd06:6; // Reserved x16-x16
u8 xIplMode:2; // Ipl mode (A|B|C|D) ...
u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17
u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiated x18-x19
u16 xPowerOnResetIpl:1; // Indicate POR condition ...
u16 xMainStorePreserved:1; // Main Storage is preserved ...
u16 xRsvd07:13; // Reserved ...
u16 xIplSource:16; // Ipl source x1A-x1B
u8 xIplReason:8; // Reason for this IPL x1C-x1C
u8 xRsvd08; // Reserved x1D-x1D
u16 xRsvd09; // Reserved x1E-x1F
u16 xSysBoxType; // System Box Type x20-x21
u16 xSysProcType; // System Processor Type x22-x23
u32 xRsvd10; // Reserved x24-x27
u64 xRsvd11; // Reserved x28-x2F
u64 xRsvd12; // Reserved x30-x37
u64 xRsvd13; // Reserved x38-x3F
struct ItIplParmsReal {
u8 xFormat; // Defines format of IplParms x00-x00
u8 xRsvd01:6; // Reserved x01-x01
u8 xAlternateSearch:1; // Alternate search indicator ...
u8 xUaSupplied:1; // UA Supplied on programmed IPL...
u8 xLsUaFormat; // Format byte for UA x02-x02
u8 xRsvd02; // Reserved x03-x03
u32 xLsUa; // LS UA x04-x07
u32 xUnusedLsLid; // First OS LID to load x08-x0B
u16 xLsBusNumber; // LS Bus Number x0C-x0D
u8 xLsCardAdr; // LS Card Address x0E-x0E
u8 xLsBoardAdr; // LS Board Address x0F-x0F
u32 xRsvd03; // Reserved x10-x13
u8 xSpcnPresent:1; // SPCN present x14-x14
u8 xCpmPresent:1; // CPM present ...
u8 xRsvd04:6; // Reserved ...
u8 xRsvd05:4; // Reserved x15-x15
u8 xKeyLock:4; // Keylock setting ...
u8 xRsvd06:6; // Reserved x16-x16
u8 xIplMode:2; // Ipl mode (A|B|C|D) ...
u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17
u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiatedx18-x19
u16 xPowerOnResetIpl:1; // Indicate POR condition ...
u16 xMainStorePreserved:1; // Main Storage is preserved ...
u16 xRsvd07:13; // Reserved ...
u16 xIplSource:16; // Ipl source x1A-x1B
u8 xIplReason:8; // Reason for this IPL x1C-x1C
u8 xRsvd08; // Reserved x1D-x1D
u16 xRsvd09; // Reserved x1E-x1F
u16 xSysBoxType; // System Box Type x20-x21
u16 xSysProcType; // System Processor Type x22-x23
u32 xRsvd10; // Reserved x24-x27
u64 xRsvd11; // Reserved x28-x2F
u64 xRsvd12; // Reserved x30-x37
u64 xRsvd13; // Reserved x38-x3F
};
extern struct ItIplParmsReal xItIplParmsReal;
#endif /* _ITIPLPARMSREAL_H */

44
include/asm-ppc64/iSeries/ItLpNaca.h
View File

@@ -1,17 +1,17 @@
/*
* ItLpNaca.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,18 +19,15 @@
#ifndef _ITLPNACA_H
#define _ITLPNACA_H
//=============================================================================
//
// This control block contains the data that is shared between the
// hypervisor (PLIC) and the OS.
//
//=============================================================================
#include <linux/types.h>
struct ItLpNaca
{
//=============================================================================
/*
* This control block contains the data that is shared between the
* hypervisor (PLIC) and the OS.
*/
struct ItLpNaca {
// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
//=============================================================================
u32 xDesc; // Eye catcher x00-x03
u16 xSize; // Size of this class x04-x05
u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07
@@ -59,30 +56,25 @@ struct ItLpNaca
u64 xLoadAreaAddr; // ER address of load area x28-x2F
u32 xLoadAreaChunks; // Chunks for the load area x30-x33
u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37
// doing an ASR switch on PASE
// system call.
u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f
u8 xRsvd1_4[64]; // x40-x7F
//=============================================================================
// doing an ASR switch on PASE
// system call.
u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f
u8 xRsvd1_4[64]; // x40-x7F
// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
//=============================================================================
u8 xRsvd2_0[128]; // Reserved x00-x7F
//=============================================================================
// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
// NB: Padding required to keep xInterrruptHdlr at x300 which is required
// NB: Padding required to keep xInterrruptHdlr at x300 which is required
// for v4r4 PLIC.
//=============================================================================
u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F
u8 xRsvd3_0[384]; // Reserved 180-2FF
//=============================================================================
// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt
// handlers
//=============================================================================
u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF
};
//=============================================================================
extern struct ItLpNaca itLpNaca;
#endif /* _ITLPNACA_H */

84
include/asm-ppc64/iSeries/ItLpQueue.h
View File

@@ -1,17 +1,17 @@
/*
* ItLpQueue.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,54 +19,54 @@
#ifndef _ITLPQUEUE_H
#define _ITLPQUEUE_H
//=============================================================================
//
// This control block defines the simple LP queue structure that is
// shared between the hypervisor (PLIC) and the OS in order to send
// events to an LP.
//
/*
* This control block defines the simple LP queue structure that is
* shared between the hypervisor (PLIC) and the OS in order to send
* events to an LP.
*/
#include <asm/types.h>
#include <asm/ptrace.h>
struct HvLpEvent;
#define ITMaxLpQueues 8
#define ITMaxLpQueues 8
#define NotUsed 0 // Queue will not be used by PLIC
#define DedicatedIo 1 // Queue dedicated to IO processor specified
#define DedicatedLp 2 // Queue dedicated to LP specified
#define Shared 3 // Queue shared for both IO and LP
#define LpEventStackSize 4096
#define LpEventMaxSize 256
#define LpEventAlign 64
#define LpEventStackSize 4096
#define LpEventMaxSize 256
#define LpEventAlign 64
struct ItLpQueue
{
//
// The xSlicCurEventPtr is the pointer to the next event stack entry that will
// become valid. The OS must peek at this entry to determine if it is valid.
// PLIC will set the valid indicator as the very last store into that entry.
//
// When the OS has completed processing of the event then it will mark the event
// as invalid so that PLIC knows it can store into that event location again.
//
// If the event stack fills and there are overflow events, then PLIC will set
// the xPlicOverflowIntPending flag in which case the OS will have to fetch the
// additional LP events once they have drained the event stack.
//
// The first 16-bytes are known by both the OS and PLIC. The remainder of the
// cache line is for use by the OS.
//
//=============================================================================
struct ItLpQueue {
/*
* The xSlicCurEventPtr is the pointer to the next event stack entry
* that will become valid. The OS must peek at this entry to determine
* if it is valid. PLIC will set the valid indicator as the very last
* store into that entry.
*
* When the OS has completed processing of the event then it will mark
* the event as invalid so that PLIC knows it can store into that event
* location again.
*
* If the event stack fills and there are overflow events, then PLIC
* will set the xPlicOverflowIntPending flag in which case the OS will
* have to fetch the additional LP events once they have drained the
* event stack.
*
* The first 16-bytes are known by both the OS and PLIC. The remainder
* of the cache line is for use by the OS.
*/
u8 xPlicOverflowIntPending;// 0x00 Overflow events are pending
u8 xPlicStatus; // 0x01 DedicatedIo or DedicatedLp or NotUsed
u16 xSlicLogicalProcIndex; // 0x02 Logical Proc Index for correlation
u8 xPlicRsvd[12]; // 0x04
char* xSlicCurEventPtr; // 0x10
char* xSlicLastValidEventPtr; // 0x18
char* xSlicEventStackPtr; // 0x20
char *xSlicCurEventPtr; // 0x10
char *xSlicLastValidEventPtr; // 0x18
char *xSlicEventStackPtr; // 0x20
u8 xIndex; // 0x28 unique sequential index.
u8 xSlicRsvd[3]; // 0x29-2b
u32 xInUseWord; // 0x2C
@@ -76,17 +76,9 @@ struct ItLpQueue
extern struct ItLpQueue xItLpQueue;
extern struct HvLpEvent * ItLpQueue_getNextLpEvent( struct ItLpQueue * );
extern int ItLpQueue_isLpIntPending( struct ItLpQueue * );
extern unsigned ItLpQueue_process( struct ItLpQueue *, struct pt_regs * );
extern void ItLpQueue_clearValid( struct HvLpEvent * );
static __inline__ void process_iSeries_events( void )
{
__asm__ __volatile__ (
" li 0,0x5555 \n\
sc"
: : : "r0", "r3" );
}
extern struct HvLpEvent *ItLpQueue_getNextLpEvent(struct ItLpQueue *);
extern int ItLpQueue_isLpIntPending(struct ItLpQueue *);
extern unsigned ItLpQueue_process(struct ItLpQueue *, struct pt_regs *);
extern void ItLpQueue_clearValid(struct HvLpEvent *);
#endif /* _ITLPQUEUE_H */

41
include/asm-ppc64/iSeries/ItLpRegSave.h
View File

@@ -1,17 +1,17 @@
/*
* ItLpRegSave.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,33 +19,30 @@
#ifndef _ITLPREGSAVE_H
#define _ITLPREGSAVE_H
//=====================================================================================
//
// This control block contains the data that is shared between PLIC
// and the OS
//
//
/*
* This control block contains the data that is shared between PLIC
* and the OS
*/
struct ItLpRegSave
{
struct ItLpRegSave {
u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003
u16 xSize; // Size of this class 004-005
u8 xInUse; // Area is live 006-007
u8 xRsvd1[9]; // Reserved 007-00F
u8 xRsvd1[9]; // Reserved 007-00F
u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F
u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F
u32 xCTRL; // Control Register 170-173
u32 xDEC; // Decrementer 174-177
u32 xDEC; // Decrementer 174-177
u32 xFPSCR; // FP Status and Control Reg 178-17B
u32 xPVR; // Processor Version Number 17C-17F
u64 xMMCR0; // Monitor Mode Control Reg 0 180-187
u32 xPMC1; // Perf Monitor Counter 1 188-18B
u32 xPMC2; // Perf Monitor Counter 2 18C-18F
u32 xPMC3; // Perf Monitor Counter 3 190-193
u32 xPMC4; // Perf Monitor Counter 4 194-197
u32 xPIR; // Processor ID Reg 198-19B
u32 xMMCR1; // Monitor Mode Control Reg 1 19C-19F
u32 xMMCRA; // Monitor Mode Control Reg A 1A0-1A3
u32 xPMC5; // Perf Monitor Counter 5 1A4-1A7
@@ -57,17 +54,17 @@ struct ItLpRegSave
u32 xRsvd; // Reserved 1BC-1BF
u64 xACCR; // Address Compare Control Reg 1C0-1C7
u64 xIMR; // Instruction Match Register 1C8-1CF
u64 xSDR1; // Storage Description Reg 1 1D0-1D7
u64 xIMR; // Instruction Match Register 1C8-1CF
u64 xSDR1; // Storage Description Reg 1 1D0-1D7
u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF
u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7
u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF
u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7
u64 xTB; // Time Base Register 1F8-1FF
u64 xFPR[32]; // Floating Point Registers 200-2FF
u64 xMSR; // Machine State Register 300-307
u64 xMSR; // Machine State Register 300-307
u64 xNIA; // Next Instruction Address 308-30F
u64 xDABR; // Data Address Breakpoint Reg 310-317
@@ -76,8 +73,8 @@ struct ItLpRegSave
u64 xHID0; // HW Implementation Dependent0 320-327
u64 xHID4; // HW Implementation Dependent4 328-32F
u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337
u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F
u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337
u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F
u64 xSDAR; // Sample Data Address Register 340-347
u64 xSIAR; // Sample Inst Address Register 348-34F

10
include/asm-ppc64/iSeries/ItSpCommArea.h
View File

@@ -1,29 +1,27 @@
/*
* ItSpCommArea.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ITSPCOMMAREA_H
#define _ITSPCOMMAREA_H
struct SpCommArea
{
struct SpCommArea {
u32 xDesc; // Descriptor (only in new formats) 000-003
u8 xFormat; // Format (only in new formats) 004-004
u8 xRsvd1[11]; // Reserved 005-00F

129
include/asm-ppc64/iSeries/ItVpdAreas.h
View File

@@ -1,17 +1,17 @@
/*
* ItVpdAreas.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -19,78 +19,71 @@
#ifndef _ITVPDAREAS_H
#define _ITVPDAREAS_H
//=====================================================================================
//
// This file defines the address and length of all of the VPD area passed to
// the OS from PLIC (most of which start from the SP).
//
/*
* This file defines the address and length of all of the VPD area passed to
* the OS from PLIC (most of which start from the SP).
*/
#include <asm/types.h>
// VPD Entry index is carved in stone - cannot be changed (easily).
#define ItVpdCecVpd 0
#define ItVpdDynamicSpace 1
#define ItVpdExtVpd 2
#define ItVpdExtVpdOnPanel 3
#define ItVpdFirstPaca 4
#define ItVpdIoVpd 5
#define ItVpdIplParms 6
#define ItVpdMsVpd 7
#define ItVpdPanelVpd 8
#define ItVpdLpNaca 9
#define ItVpdBackplaneAndMaybeClockCardVpd 10
#define ItVpdRecoveryLogBuffer 11
#define ItVpdSpCommArea 12
#define ItVpdSpLogBuffer 13
#define ItVpdSpLogBufferSave 14
#define ItVpdSpCardVpd 15
#define ItVpdFirstProcVpd 16
#define ItVpdApModelVpd 17
#define ItVpdClockCardVpd 18
#define ItVpdBusExtCardVpd 19
#define ItVpdProcCapacityVpd 20
#define ItVpdInteractiveCapacityVpd 21
#define ItVpdFirstSlotLabel 22
#define ItVpdFirstLpQueue 23
#define ItVpdFirstL3CacheVpd 24
#define ItVpdFirstProcFruVpd 25
/* VPD Entry index is carved in stone - cannot be changed (easily). */
#define ItVpdCecVpd 0
#define ItVpdDynamicSpace 1
#define ItVpdExtVpd 2
#define ItVpdExtVpdOnPanel 3
#define ItVpdFirstPaca 4
#define ItVpdIoVpd 5
#define ItVpdIplParms 6
#define ItVpdMsVpd 7
#define ItVpdPanelVpd 8
#define ItVpdLpNaca 9
#define ItVpdBackplaneAndMaybeClockCardVpd 10
#define ItVpdRecoveryLogBuffer 11
#define ItVpdSpCommArea 12
#define ItVpdSpLogBuffer 13
#define ItVpdSpLogBufferSave 14
#define ItVpdSpCardVpd 15
#define ItVpdFirstProcVpd 16
#define ItVpdApModelVpd 17
#define ItVpdClockCardVpd 18
#define ItVpdBusExtCardVpd 19
#define ItVpdProcCapacityVpd 20
#define ItVpdInteractiveCapacityVpd 21
#define ItVpdFirstSlotLabel 22
#define ItVpdFirstLpQueue 23
#define ItVpdFirstL3CacheVpd 24
#define ItVpdFirstProcFruVpd 25
#define ItVpdMaxEntries 26
#define ItVpdMaxEntries 26
#define ItDmaMaxEntries 10
#define ItVpdAreasMaxSlotLabels 192
#define ItDmaMaxEntries 10
#define ItVpdAreasMaxSlotLabels 192
struct SlicVpdAdrs {
u32 pad1;
void * vpdAddr;
struct ItVpdAreas {
u32 xSlicDesc; // Descriptor 000-003
u16 xSlicSize; // Size of this control block 004-005
u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface006-007
u16 xRsvd1:15; // Reserved bits ...
u16 xSlicVpdEntries; // Number of VPD entries 008-009
u16 xSlicDmaEntries; // Number of DMA entries 00A-00B
u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D
u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F
u16 xSlicDmaToksOffset; // Offset into this of array 010-011
u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013
u16 xSlicDmaLensOffset; // Offset into this of array 014-015
u16 xSlicVpdLensOffset; // Offset into this of array 016-017
u16 xSlicMaxSlotLabels; // Maximum number of slot labels018-019
u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B
u8 xRsvd2[4]; // Reserved 01C-01F
u64 xRsvd3[12]; // Reserved 020-07F
u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7
u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF
u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F
void *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF
};
struct ItVpdAreas
{
u32 xSlicDesc; // Descriptor 000-003
u16 xSlicSize; // Size of this control block 004-005
u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface 006-007
u16 xRsvd1:15; // Reserved bits ...
u16 xSlicVpdEntries; // Number of VPD entries 008-009
u16 xSlicDmaEntries; // Number of DMA entries 00A-00B
u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D
u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F
u16 xSlicDmaToksOffset; // Offset into this of array 010-011
u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013
u16 xSlicDmaLensOffset; // Offset into this of array 014-015
u16 xSlicVpdLensOffset; // Offset into this of array 016-017
u16 xSlicMaxSlotLabels; // Maximum number of slot labels 018-019
u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B
u8 xRsvd2[4]; // Reserved 01C-01F
u64 xRsvd3[12]; // Reserved 020-07F
u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7
u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF
u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F
void * xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF
};
extern struct ItVpdAreas itVpdAreas;
#endif /* _ITVPDAREAS_H */

49
include/asm-ppc64/iSeries/LparData.h
View File

@@ -1,49 +0,0 @@
/*
* LparData.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _LPARDATA_H
#define _LPARDATA_H
#include <asm/types.h>
#include <asm/page.h>
#include <asm/abs_addr.h>
#include <asm/iSeries/ItLpNaca.h>
#include <asm/iSeries/ItLpRegSave.h>
#include <asm/iSeries/HvReleaseData.h>
#include <asm/iSeries/LparMap.h>
#include <asm/iSeries/ItVpdAreas.h>
#include <asm/iSeries/ItIplParmsReal.h>
#include <asm/iSeries/ItExtVpdPanel.h>
#include <asm/iSeries/ItLpQueue.h>
#include <asm/iSeries/IoHriProcessorVpd.h>
extern struct LparMap xLparMap;
extern struct HvReleaseData hvReleaseData;
extern struct ItLpNaca itLpNaca;
extern struct ItIplParmsReal xItIplParmsReal;
extern struct ItExtVpdPanel xItExtVpdPanel;
extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
extern struct ItLpQueue xItLpQueue;
extern struct ItVpdAreas itVpdAreas;
extern u64 xMsVpd[];
extern struct msChunks msChunks;
#endif /* _LPARDATA_H */

44
include/asm-ppc64/iSeries/LparMap.h
View File

@@ -1,17 +1,17 @@
/*
* LparMap.h
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -21,13 +21,14 @@
#include <asm/types.h>
/* The iSeries hypervisor will set up mapping for one or more
/*
* The iSeries hypervisor will set up mapping for one or more
* ESID/VSID pairs (in SLB/segment registers) and will set up
* mappings of one or more ranges of pages to VAs.
* We will have the hypervisor set up the ESID->VSID mapping
* for the four kernel segments (C-F). With shared processors,
* the hypervisor will clear all segment registers and reload
* these four whenever the processor is switched from one
* these four whenever the processor is switched from one
* partition to another.
*/
@@ -38,30 +39,31 @@
* need to be located within the load area (if the total partition size
* is 64 MB), but cannot be mapped. Typically, this should specify
* to map half (32 MB) of the load area.
*
* The hypervisor will set up page table entries for the number of
*
* The hypervisor will set up page table entries for the number of
* pages specified.
*
* In 32-bit mode, the hypervisor will load all four of the
* segment registers (identified by the low-order four bits of the
* segment registers (identified by the low-order four bits of the
* Esid field. In 64-bit mode, the hypervisor will load one SLB
* entry to map the Esid to the Vsid.
*/
// Hypervisor initially maps 32MB of the load area
#define HvPagesToMap 8192
/* Hypervisor initially maps 32MB of the load area */
#define HvPagesToMap 8192
struct LparMap
{
u64 xNumberEsids; // Number of ESID/VSID pairs (1)
u64 xNumberRanges; // Number of VA ranges to map (1)
u64 xSegmentTableOffs; // Page number within load area of seg table (0)
u64 xRsvd[5]; // Reserved (0)
u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000)
u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000)
u64 xPages; // Number of pages to be mapped (8192)
u64 xOffset; // Offset from start of load area (0)
u64 xVPN; // Virtual Page Number (0x000C000000000000)
struct LparMap {
u64 xNumberEsids; // Number of ESID/VSID pairs (1)
u64 xNumberRanges; // Number of VA ranges to map (1)
u64 xSegmentTableOffs; // Page number within load area of seg table (0)
u64 xRsvd[5];
u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000)
u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000)
u64 xPages; // Number of pages to be mapped (8192)
u64 xOffset; // Offset from start of load area (0)
u64 xVPN; // Virtual Page Number (0x000C000000000000)
};
extern struct LparMap xLparMap;
#endif /* _LPARMAP_H */

18
include/asm-ppc64/iSeries/XmPciLpEvent.h
View File

@@ -1,18 +0,0 @@
#ifndef __XMPCILPEVENT_H__
#define __XMPCILPEVENT_H__
#ifdef __cplusplus
extern "C" {
#endif
int XmPciLpEvent_init(void);
void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);
#ifdef __cplusplus
}
#endif
#endif /* __XMPCILPEVENT_H__ */

59
include/asm-ppc64/iSeries/iSeries_io.h
View File

@@ -5,32 +5,33 @@
#ifdef CONFIG_PPC_ISERIES
#include <linux/types.h>
/************************************************************************/
/* File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000. */
/************************************************************************/
/* Remaps the io.h for the iSeries Io */
/* Copyright (C) 20yy Allan H Trautman, IBM Corporation */
/* */
/* This program is free software; you can redistribute it and/or modify */
/* it under the terms of the GNU General Public License as published by */
/* the Free Software Foundation; either version 2 of the License, or */
/* (at your option) any later version. */
/* */
/* This program is distributed in the hope that it will be useful, */
/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* GNU General Public License for more details. */
/* */
/* You should have received a copy of the GNU General Public License */
/* along with this program; if not, write to the: */
/* Free Software Foundation, Inc., */
/* 59 Temple Place, Suite 330, */
/* Boston, MA 02111-1307 USA */
/************************************************************************/
/* Change Activity: */
/* Created December 28, 2000 */
/* End Change Activity */
/************************************************************************/
/*
* File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000.
*
* Remaps the io.h for the iSeries Io
* Copyright (C) 2000 Allan H Trautman, IBM Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
* Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330,
* Boston, MA 02111-1307 USA
*
* Change Activity:
* Created December 28, 2000
* End Change Activity
*/
extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress);
extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress);
extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress);
@@ -39,8 +40,10 @@ extern void iSeries_Write_Word(u16 IoData, volatile void __iomem * IoAddress);
extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress);
extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n);
extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source, size_t n);
extern void iSeries_memcpy_fromio(void *dest, const volatile void __iomem *source, size_t n);
extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source,
size_t n);
extern void iSeries_memcpy_fromio(void *dest,
const volatile void __iomem *source, size_t n);
#endif /* CONFIG_PPC_ISERIES */
#endif /* _ISERIES_IO_H */

17
include/asm-ppc64/iSeries/iSeries_irq.h
View File

@@ -1,19 +1,8 @@
#ifndef __ISERIES_IRQ_H__
#define __ISERIES_IRQ_H__
#ifdef __cplusplus
extern "C" {
#endif
void iSeries_init_IRQ(void);
int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
int iSeries_assign_IRQ(int, HvBusNumber, HvSubBusNumber, HvAgentId);
void iSeries_activate_IRQs(void);
int XmPciLpEvent_init(void);
#ifdef __cplusplus
}
#endif
extern void iSeries_init_IRQ(void);
extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
extern void iSeries_activate_IRQs(void);
#endif /* __ISERIES_IRQ_H__ */

142
include/asm-ppc64/iSeries/iSeries_pci.h
View File

@@ -1,112 +1,88 @@
#ifndef _ISERIES_64_PCI_H
#define _ISERIES_64_PCI_H
/************************************************************************/
/* File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001. */
/************************************************************************/
/* Define some useful macros for the iSeries pci routines. */
/* Copyright (C) 2001 Allan H Trautman, IBM Corporation */
/* */
/* This program is free software; you can redistribute it and/or modify */
/* it under the terms of the GNU General Public License as published by */
/* the Free Software Foundation; either version 2 of the License, or */
/* (at your option) any later version. */
/* */
/* This program is distributed in the hope that it will be useful, */
/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* GNU General Public License for more details. */
/* */
/* You should have received a copy of the GNU General Public License */
/* along with this program; if not, write to the: */
/* Free Software Foundation, Inc., */
/* 59 Temple Place, Suite 330, */
/* Boston, MA 02111-1307 USA */
/************************************************************************/
/* Change Activity: */
/* Created Feb 20, 2001 */
/* Added device reset, March 22, 2001 */
/* Ported to ppc64, May 25, 2001 */
/* End Change Activity */
/************************************************************************/
/*
* File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001.
*
* Define some useful macros for the iSeries pci routines.
* Copyright (C) 2001 Allan H Trautman, IBM Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
* Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330,
* Boston, MA 02111-1307 USA
*
* Change Activity:
* Created Feb 20, 2001
* Added device reset, March 22, 2001
* Ported to ppc64, May 25, 2001
* End Change Activity
*/
#include <asm/iSeries/HvCallPci.h>
#include <asm/abs_addr.h>
struct pci_dev; /* For Forward Reference */
struct pci_dev; /* For Forward Reference */
struct iSeries_Device_Node;
/************************************************************************/
/* Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure */
/************************************************************************/
/*
* Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure
*/
#define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber
#define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber
#define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId
#define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr
#define ISERIES_DEVFUN(DevPtr) DevPtr->DevFn
#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node*)PciDev->sysdata)
#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node *)PciDev->sysdata)
#define EADsMaxAgents 7
/************************************************************************/
/* Decodes Linux DevFn to iSeries DevFn, bridge device, or function. */
/* For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h */
/************************************************************************/
/*
* Decodes Linux DevFn to iSeries DevFn, bridge device, or function.
* For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h
*/
#define ISERIES_PCI_AGENTID(idsel,func) ((idsel & 0x0F) << 4) | (func & 0x07)
#define ISERIES_ENCODE_DEVICE(agentid) ((0x10) | ((agentid&0x20)>>2) | (agentid&07))
#define ISERIES_PCI_AGENTID(idsel, func) \
(((idsel & 0x0F) << 4) | (func & 0x07))
#define ISERIES_ENCODE_DEVICE(agentid) \
((0x10) | ((agentid & 0x20) >> 2) | (agentid & 0x07))
#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
/*
* N.B. the ISERIES_DECODE_* macros are not used anywhere, and I think
* the 0x71 (at least) must be wrong - 0x78 maybe? -- paulus.
* Converts Virtual Address to Real Address for Hypervisor calls
*/
#define ISERIES_DECODE_DEVFN(linuxdevfn) (((linuxdevfn & 0x71) << 1) | (linuxdevfn & 0x07))
#define ISERIES_DECODE_DEVICE(linuxdevfn) (((linuxdevfn & 0x38) >> 3) |(((linuxdevfn & 0x40) >> 2) + 0x10))
#define ISERIES_DECODE_FUNCTION(linuxdevfn) (linuxdevfn & 0x07)
/************************************************************************/
/* Converts Virtual Address to Real Address for Hypervisor calls */
/************************************************************************/
#define ISERIES_HV_ADDR(virtaddr) (0x8000000000000000 | virt_to_abs(virtaddr))
/************************************************************************/
/* iSeries Device Information */
/************************************************************************/
#define ISERIES_HV_ADDR(virtaddr) \
(0x8000000000000000 | virt_to_abs(virtaddr))
/*
* iSeries Device Information
*/
struct iSeries_Device_Node {
struct list_head Device_List;
struct pci_dev* PciDev; /* Pointer to pci_dev structure*/
union HvDsaMap DsaAddr; /* Direct Select Address */
/* busNumber,subBusNumber, */
/* deviceId, barNumber */
HvAgentId AgentId; /* Hypervisor DevFn */
int DevFn; /* Linux devfn */
int BarOffset;
int Irq; /* Assigned IRQ */
int ReturnCode; /* Return Code Holder */
int IoRetry; /* Current Retry Count */
int Flags; /* Possible flags(disable/bist)*/
u16 Vendor; /* Vendor ID */
u8 LogicalSlot; /* Hv Slot Index for Tces */
struct iommu_table* iommu_table;/* Device TCE Table */
u8 PhbId; /* Phb Card is on. */
u16 Board; /* Board Number */
u8 FrameId; /* iSeries spcn Frame Id */
char CardLocation[4];/* Char format of planar vpd */
char Location[20]; /* Frame 1, Card C10 */
struct pci_dev *PciDev;
union HvDsaMap DsaAddr; /* Direct Select Address */
/* busNumber, subBusNumber, */
/* deviceId, barNumber */
int DevFn; /* Linux devfn */
int Irq; /* Assigned IRQ */
int Flags; /* Possible flags(disable/bist)*/
u8 LogicalSlot; /* Hv Slot Index for Tces */
struct iommu_table *iommu_table;/* Device TCE Table */
};
/************************************************************************/
/* Functions */
/************************************************************************/
extern int iSeries_Device_Information(struct pci_dev*,char*, int);
extern void iSeries_Get_Location_Code(struct iSeries_Device_Node*);
extern int iSeries_Device_ToggleReset(struct pci_dev* PciDev, int AssertTime, int DelayTime);
extern void iSeries_Device_Information(struct pci_dev*, int);
#endif /* _ISERIES_64_PCI_H */

24
include/asm-ppc64/iSeries/iSeries_proc.h
View File

@@ -1,24 +0,0 @@
/*
* iSeries_proc.h
* Copyright (C) 2001 Kyle A. Lucke IBM Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ISERIES_PROC_H
#define _ISERIES_PROC_H
extern void iSeries_proc_early_init(void);
#endif /* _iSeries_PROC_H */

5
include/asm-ppc64/iSeries/mf.h
View File

@@ -9,17 +9,16 @@
* all partitions in the iSeries. It also provides miscellaneous low-level
* machine facility type operations.
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA

57
include/asm-ppc64/iSeries/vio.h
View File

@@ -8,32 +8,32 @@
* Colin Devilbiss <devilbis@us.ibm.com>
*
* (C) Copyright 2000 IBM Corporation
*
*
* This header file is used by the iSeries virtual I/O device
* drivers. It defines the interfaces to the common functions
* (implemented in drivers/char/viopath.h) as well as defining
* common functions and structures. Currently (at the time I
* common functions and structures. Currently (at the time I
* wrote this comment) the iSeries virtual I/O device drivers
* that use this are
* drivers/block/viodasd.c
* that use this are
* drivers/block/viodasd.c
* drivers/char/viocons.c
* drivers/char/viotape.c
* drivers/cdrom/viocd.c
*
* The iSeries virtual ethernet support (veth.c) uses a whole
* different set of functions.
*
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) anyu later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software Foundation,
* Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
@@ -44,39 +44,41 @@
#include <asm/iSeries/HvTypes.h>
#include <asm/iSeries/HvLpEvent.h>
/* iSeries virtual I/O events use the subtype field in
/*
* iSeries virtual I/O events use the subtype field in
* HvLpEvent to figure out what kind of vio event is coming
* in. We use a table to route these, and this defines
* the maximum number of distinct subtypes
*/
#define VIO_MAX_SUBTYPES 8
/* Each subtype can register a handler to process their events.
/*
* Each subtype can register a handler to process their events.
* The handler must have this interface.
*/
typedef void (vio_event_handler_t) (struct HvLpEvent * event);
int viopath_open(HvLpIndex remoteLp, int subtype, int numReq);
int viopath_close(HvLpIndex remoteLp, int subtype, int numReq);
int vio_setHandler(int subtype, vio_event_handler_t * beh);
int vio_clearHandler(int subtype);
int viopath_isactive(HvLpIndex lp);
HvLpInstanceId viopath_sourceinst(HvLpIndex lp);
HvLpInstanceId viopath_targetinst(HvLpIndex lp);
void vio_set_hostlp(void);
void *vio_get_event_buffer(int subtype);
void vio_free_event_buffer(int subtype, void *buffer);
extern int viopath_open(HvLpIndex remoteLp, int subtype, int numReq);
extern int viopath_close(HvLpIndex remoteLp, int subtype, int numReq);
extern int vio_setHandler(int subtype, vio_event_handler_t * beh);
extern int vio_clearHandler(int subtype);
extern int viopath_isactive(HvLpIndex lp);
extern HvLpInstanceId viopath_sourceinst(HvLpIndex lp);
extern HvLpInstanceId viopath_targetinst(HvLpIndex lp);
extern void vio_set_hostlp(void);
extern void *vio_get_event_buffer(int subtype);
extern void vio_free_event_buffer(int subtype, void *buffer);
extern HvLpIndex viopath_hostLp;
extern HvLpIndex viopath_ourLp;
#define VIOCHAR_MAX_DATA 200
#define VIOCHAR_MAX_DATA 200
#define VIOMAJOR_SUBTYPE_MASK 0xff00
#define VIOMINOR_SUBTYPE_MASK 0x00ff
#define VIOMAJOR_SUBTYPE_SHIFT 8
#define VIOMAJOR_SUBTYPE_MASK 0xff00
#define VIOMINOR_SUBTYPE_MASK 0x00ff
#define VIOMAJOR_SUBTYPE_SHIFT 8
#define VIOVERSION 0x0101
#define VIOVERSION 0x0101
/*
* This is the general structure for VIO errors; each module should have
@@ -89,8 +91,8 @@ struct vio_error_entry {
int errno;
const char *msg;
};
const struct vio_error_entry *vio_lookup_rc(const struct vio_error_entry
*local_table, u16 rc);
extern const struct vio_error_entry *vio_lookup_rc(
const struct vio_error_entry *local_table, u16 rc);
enum viosubtypes {
viomajorsubtype_monitor = 0x0100,
@@ -102,7 +104,6 @@ enum viosubtypes {
viomajorsubtype_scsi = 0x0700
};
enum vioconfigsubtype {
vioconfigget = 0x0001,
};

12
include/asm-ppc64/imalloc.h
View File

@@ -4,9 +4,9 @@
/*
* Define the address range of the imalloc VM area.
*/
#define PHBS_IO_BASE IOREGIONBASE
#define IMALLOC_BASE (IOREGIONBASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
#define IMALLOC_END (IOREGIONBASE + EADDR_MASK)
#define PHBS_IO_BASE VMALLOC_END
#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
#define IMALLOC_END (VMALLOC_START + EADDR_MASK)
/* imalloc region types */
@@ -18,7 +18,9 @@
extern struct vm_struct * im_get_free_area(unsigned long size);
extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
int region_type);
unsigned long im_free(void *addr);
int region_type);
extern void im_free(void *addr);
extern unsigned long ioremap_bot;
#endif /* _PPC64_IMALLOC_H */

25
include/asm-ppc64/iommu.h
View File

@@ -82,24 +82,6 @@ struct iommu_table {
unsigned long *it_map; /* A simple allocation bitmap for now */
};
#ifdef CONFIG_PPC_ISERIES
struct iommu_table_cb {
unsigned long itc_busno; /* Bus number for this tce table */
unsigned long itc_start; /* Will be NULL for secondary */
unsigned long itc_totalsize; /* Size (in pages) of whole table */
unsigned long itc_offset; /* Index into real tce table of the
start of our section */
unsigned long itc_size; /* Size (in pages) of our section */
unsigned long itc_index; /* Index of this tce table */
unsigned short itc_maxtables; /* Max num of tables for partition */
unsigned char itc_virtbus; /* Flag to indicate virtual bus */
unsigned char itc_slotno; /* IOA Tce Slot Index */
unsigned char itc_rsvd[4];
};
extern struct iommu_table vio_tce_table; /* Tce table for virtual bus */
#endif /* CONFIG_PPC_ISERIES */
struct scatterlist;
#ifdef CONFIG_PPC_MULTIPLATFORM
@@ -122,9 +104,6 @@ extern void iommu_devnode_init_pSeries(struct device_node *dn);
#ifdef CONFIG_PPC_ISERIES
/* Walks all buses and creates iommu tables */
extern void iommu_setup_iSeries(void);
/* Initializes tables for bio buses */
extern void __init iommu_vio_init(void);
@@ -158,8 +137,12 @@ extern void iommu_init_early_pSeries(void);
extern void iommu_init_early_iSeries(void);
extern void iommu_init_early_u3(void);
#ifdef CONFIG_PCI
extern void pci_iommu_init(void);
extern void pci_direct_iommu_init(void);
#else
static inline void pci_iommu_init(void) { }
#endif
extern void alloc_u3_dart_table(void);

2
include/asm-ppc64/paca.h
View File

@@ -20,13 +20,13 @@
#include <asm/types.h>
#include <asm/lppaca.h>
#include <asm/iSeries/ItLpRegSave.h>
#include <asm/iSeries/ItLpQueue.h>
#include <asm/mmu.h>
register struct paca_struct *local_paca asm("r13");
#define get_paca() local_paca
struct task_struct;
struct ItLpQueue;
/*
* Defines the layout of the paca.

2
include/asm-ppc64/page.h
View File

@@ -202,9 +202,7 @@ extern u64 ppc64_pft_size; /* Log 2 of page table size */
#define PAGE_OFFSET ASM_CONST(0xC000000000000000)
#define KERNELBASE PAGE_OFFSET
#define VMALLOCBASE ASM_CONST(0xD000000000000000)
#define IOREGIONBASE ASM_CONST(0xE000000000000000)
#define IO_REGION_ID (IOREGIONBASE >> REGION_SHIFT)
#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT)
#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT)
#define USER_REGION_ID (0UL)

9
include/asm-ppc64/pgtable.h
View File

@@ -53,7 +53,8 @@
* Define the address range of the vmalloc VM area.
*/
#define VMALLOC_START (0xD000000000000000ul)
#define VMALLOC_END (VMALLOC_START + EADDR_MASK)
#define VMALLOC_SIZE (0x10000000000UL)
#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
/*
* Bits in a linux-style PTE. These match the bits in the
@@ -239,9 +240,6 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
/* This now only contains the vmalloc pages */
#define pgd_offset_k(address) pgd_offset(&init_mm, address)
/* to find an entry in the ioremap page-table-directory */
#define pgd_offset_i(address) (ioremap_pgd + pgd_index(address))
/*
* The following only work if pte_present() is true.
* Undefined behaviour if not..
@@ -459,15 +457,12 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr,
#define __HAVE_ARCH_PTE_SAME
#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
extern unsigned long ioremap_bot, ioremap_base;
#define pmd_ERROR(e) \
printk("%s:%d: bad pmd %08x.\n", __FILE__, __LINE__, pmd_val(e))
#define pgd_ERROR(e) \
printk("%s:%d: bad pgd %08x.\n", __FILE__, __LINE__, pgd_val(e))
extern pgd_t swapper_pg_dir[];
extern pgd_t ioremap_dir[];
extern void paging_init(void);

10
include/asm-ppc64/processor.h
View File

@@ -429,16 +429,6 @@ struct thread_struct {
.fpexc_mode = MSR_FE0|MSR_FE1, \
}
/*
* Note: the vm_start and vm_end fields here should *not*
* be in kernel space. (Could vm_end == vm_start perhaps?)
*/
#define IOREMAP_MMAP { &ioremap_mm, 0, 0x1000, NULL, \
PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, \
1, NULL, NULL }
extern struct mm_struct ioremap_mm;
/*
* Return saved PC of a blocked thread. For now, this is the "user" PC
*/

2
include/asm-ppc64/smp.h
View File

@@ -45,7 +45,7 @@ void generic_cpu_die(unsigned int cpu);
void generic_mach_cpu_die(void);
#endif
#define __smp_processor_id() (get_paca()->paca_index)
#define raw_smp_processor_id() (get_paca()->paca_index)
#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
extern cpumask_t cpu_sibling_map[NR_CPUS];

2
include/asm-s390/smp.h
View File

@@ -47,7 +47,7 @@ extern int smp_call_function_on(void (*func) (void *info), void *info,
#define PROC_CHANGE_PENALTY 20 /* Schedule penalty */
#define smp_processor_id() (S390_lowcore.cpu_data.cpu_nr)
#define raw_smp_processor_id() (S390_lowcore.cpu_data.cpu_nr)
extern int smp_get_cpu(cpumask_t cpu_map);
extern void smp_put_cpu(int cpu);

1
include/asm-sh/page.h
View File

@@ -31,6 +31,7 @@
#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
#define HPAGE_MASK (~(HPAGE_SIZE-1))
#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
#define ARCH_HAS_SETCLEAR_HUGE_PTE
#endif
#ifdef __KERNEL__

1
include/asm-sh/pgtable.h
View File

@@ -196,6 +196,7 @@ static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _
static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
/*
* Macro and implementation to make a page protection as uncachable.

2
include/asm-sh/smp.h
View File

@@ -25,7 +25,7 @@ extern cpumask_t cpu_possible_map;
#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map)
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
/* I've no idea what the real meaning of this is */
#define PROC_CHANGE_PENALTY 20

1
include/asm-sh64/page.h
View File

@@ -41,6 +41,7 @@
#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
#define HPAGE_MASK (~(HPAGE_SIZE-1))
#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
#define ARCH_HAS_SETCLEAR_HUGE_PTE
#endif
#ifdef __KERNEL__

2
include/asm-sh64/pgtable.h
View File

@@ -430,6 +430,8 @@ extern inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) |
extern inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_EXECUTE)); return pte; }
extern inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
extern inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
extern inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
/*
* Conversion functions: convert a page and protection to a page entry.

2
include/asm-sparc/smp.h
View File

@@ -148,7 +148,7 @@ extern __inline__ int hard_smp_processor_id(void)
}
#endif
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
#define prof_counter(__cpu) cpu_data(__cpu).counter

2
include/asm-sparc64/page.h
View File

@@ -95,6 +95,8 @@ typedef unsigned long pgprot_t;
#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
#define HPAGE_MASK (~(HPAGE_SIZE - 1UL))
#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
#define ARCH_HAS_SETCLEAR_HUGE_PTE
#define ARCH_HAS_HUGETLB_PREFAULT_HOOK
#endif
#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \

1
include/asm-sparc64/pgtable.h
View File

@@ -286,6 +286,7 @@ static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R))
#define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_WRITE))
#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W))
#define pte_mkhuge(pte) (__pte(pte_val(pte) | _PAGE_SZHUGE))
/* to find an entry in a page-table-directory. */
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))

34
include/asm-sparc64/processor.h
View File

@@ -192,6 +192,40 @@ extern unsigned long get_wchan(struct task_struct *task);
#define cpu_relax() barrier()
/* Prefetch support. This is tuned for UltraSPARC-III and later.
* UltraSPARC-I will treat these as nops, and UltraSPARC-II has
* a shallower prefetch queue than later chips.
*/
#define ARCH_HAS_PREFETCH
#define ARCH_HAS_PREFETCHW
#define ARCH_HAS_SPINLOCK_PREFETCH
static inline void prefetch(const void *x)
{
/* We do not use the read prefetch mnemonic because that
* prefetches into the prefetch-cache which only is accessible
* by floating point operations in UltraSPARC-III and later.
* By contrast, "#one_write" prefetches into the L2 cache
* in shared state.
*/
__asm__ __volatile__("prefetch [%0], #one_write"
: /* no outputs */
: "r" (x));
}
static inline void prefetchw(const void *x)
{
/* The most optimal prefetch to use for writes is
* "#n_writes". This brings the cacheline into the
* L2 cache in "owned" state.
*/
__asm__ __volatile__("prefetch [%0], #n_writes"
: /* no outputs */
: "r" (x));
}
#define spin_lock_prefetch(x) prefetchw(x)
#endif /* !(__ASSEMBLY__) */
#endif /* !(__ASM_SPARC64_PROCESSOR_H) */

2
include/asm-sparc64/smp.h
View File

@@ -64,7 +64,7 @@ static __inline__ int hard_smp_processor_id(void)
}
}
#define smp_processor_id() (current_thread_info()->cpu)
#define raw_smp_processor_id() (current_thread_info()->cpu)
#endif /* !(__ASSEMBLY__) */

3
include/asm-um/smp.h
View File

@@ -8,7 +8,8 @@
#include "asm/current.h"
#include "linux/cpumask.h"
#define smp_processor_id() (current_thread->cpu)
#define raw_smp_processor_id() (current_thread->cpu)
#define cpu_logical_map(n) (n)
#define cpu_number_map(n) (n)
#define PROC_CHANGE_PENALTY 15 /* Pick a number, any number */

2
include/asm-x86_64/a.out.h
View File

@@ -21,7 +21,7 @@ struct exec
#ifdef __KERNEL__
#include <linux/thread_info.h>
#define STACK_TOP (test_thread_flag(TIF_IA32) ? IA32_PAGE_OFFSET : TASK_SIZE)
#define STACK_TOP TASK_SIZE
#endif
#endif /* __A_OUT_GNU_H__ */

1
include/asm-x86_64/page.h
View File

@@ -28,6 +28,7 @@
#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
#define HPAGE_MASK (~(HPAGE_SIZE - 1))
#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
#ifdef __KERNEL__
#ifndef __ASSEMBLY__

3
include/asm-x86_64/pgtable.h
View File

@@ -253,6 +253,7 @@ extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;
extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
extern inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
extern inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
extern inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
@@ -263,6 +264,7 @@ extern inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _
extern inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
extern inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
extern inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
extern inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | __LARGE_PTE)); return pte; }
struct vm_area_struct;
@@ -290,7 +292,6 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
*/
#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
static inline int pmd_large(pmd_t pte) {
return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE;
}

11
include/asm-x86_64/processor.h
View File

@@ -160,16 +160,17 @@ static inline void clear_in_cr4 (unsigned long mask)
/*
* User space process size. 47bits minus one guard page.
*/
#define TASK_SIZE (0x800000000000UL - 4096)
#define TASK_SIZE64 (0x800000000000UL - 4096)
/* This decides where the kernel will search for a free chunk of vm
* space during mmap's.
*/
#define IA32_PAGE_OFFSET ((current->personality & ADDR_LIMIT_3GB) ? 0xc0000000 : 0xFFFFe000)
#define TASK_UNMAPPED_32 PAGE_ALIGN(IA32_PAGE_OFFSET/3)
#define TASK_UNMAPPED_64 PAGE_ALIGN(TASK_SIZE/3)
#define TASK_UNMAPPED_BASE \
(test_thread_flag(TIF_IA32) ? TASK_UNMAPPED_32 : TASK_UNMAPPED_64)
#define TASK_SIZE (test_thread_flag(TIF_IA32) ? IA32_PAGE_OFFSET : TASK_SIZE64)
#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? IA32_PAGE_OFFSET : TASK_SIZE64)
#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE/3)
/*
* Size of io_bitmap.

2
include/asm-x86_64/smp.h
View File

@@ -68,7 +68,7 @@ static inline int num_booting_cpus(void)
return cpus_weight(cpu_callout_map);
}
#define __smp_processor_id() read_pda(cpunumber)
#define raw_smp_processor_id() read_pda(cpunumber)
extern __inline int hard_smp_processor_id(void)
{

8
include/linux/arcfb.h Normal file
View File

@@ -0,0 +1,8 @@
#ifndef __LINUX_ARCFB_H__
#define __LINUX_ARCFB_H__
#define FBIO_WAITEVENT _IO('F', 0x88)
#define FBIO_GETCONTROL2 _IOR('F', 0x89, size_t)
#endif

2
include/linux/auto_fs4.h
View File

@@ -23,7 +23,7 @@
#define AUTOFS_MIN_PROTO_VERSION 3
#define AUTOFS_MAX_PROTO_VERSION 4
#define AUTOFS_PROTO_SUBVERSION 6
#define AUTOFS_PROTO_SUBVERSION 7
/* Mask for expire behaviour */
#define AUTOFS_EXP_IMMEDIATE 1

19
include/linux/fb.h
View File

@@ -524,11 +524,11 @@ struct fb_pixmap {
u32 offset; /* current offset to buffer */
u32 buf_align; /* byte alignment of each bitmap */
u32 scan_align; /* alignment per scanline */
u32 access_align; /* alignment per read/write */
u32 access_align; /* alignment per read/write (bits) */
u32 flags; /* see FB_PIXMAP_* */
/* access methods */
void (*outbuf)(struct fb_info *info, u8 *addr, u8 *src, unsigned int size);
u8 (*inbuf) (struct fb_info *info, u8 *addr);
void (*writeio)(struct fb_info *info, void __iomem *dst, void *src, unsigned int size);
void (*readio) (struct fb_info *info, void *dst, void __iomem *src, unsigned int size);
};
@@ -816,18 +816,9 @@ extern int unregister_framebuffer(struct fb_info *fb_info);
extern int fb_prepare_logo(struct fb_info *fb_info);
extern int fb_show_logo(struct fb_info *fb_info);
extern char* fb_get_buffer_offset(struct fb_info *info, struct fb_pixmap *buf, u32 size);
extern void fb_iomove_buf_unaligned(struct fb_info *info, struct fb_pixmap *buf,
u8 *dst, u32 d_pitch, u8 *src, u32 idx,
extern void fb_pad_unaligned_buffer(u8 *dst, u32 d_pitch, u8 *src, u32 idx,
u32 height, u32 shift_high, u32 shift_low, u32 mod);
extern void fb_iomove_buf_aligned(struct fb_info *info, struct fb_pixmap *buf,
u8 *dst, u32 d_pitch, u8 *src, u32 s_pitch,
u32 height);
extern void fb_sysmove_buf_unaligned(struct fb_info *info, struct fb_pixmap *buf,
u8 *dst, u32 d_pitch, u8 *src, u32 idx,
u32 height, u32 shift_high, u32 shift_low, u32 mod);
extern void fb_sysmove_buf_aligned(struct fb_info *info, struct fb_pixmap *buf,
u8 *dst, u32 d_pitch, u8 *src, u32 s_pitch,
u32 height);
extern void fb_pad_aligned_buffer(u8 *dst, u32 d_pitch, u8 *src, u32 s_pitch, u32 height);
extern void fb_set_suspend(struct fb_info *info, int state);
extern int fb_get_color_depth(struct fb_var_screeninfo *var);
extern int fb_get_options(char *name, char **option);

26
include/linux/font.h
View File

@@ -25,19 +25,23 @@ struct font_desc {
#define VGA8x16_IDX 1
#define PEARL8x8_IDX 2
#define VGA6x11_IDX 3
#define SUN8x16_IDX 4
#define SUN12x22_IDX 5
#define ACORN8x8_IDX 6
#define MINI4x6_IDX 7
#define FONT7x14_IDX 4
#define FONT10x18_IDX 5
#define SUN8x16_IDX 6
#define SUN12x22_IDX 7
#define ACORN8x8_IDX 8
#define MINI4x6_IDX 9
extern struct font_desc font_vga_8x8,
font_vga_8x16,
font_pearl_8x8,
font_vga_6x11,
font_sun_8x16,
font_sun_12x22,
font_acorn_8x8,
font_mini_4x6;
font_vga_8x16,
font_pearl_8x8,
font_vga_6x11,
font_7x14,
font_10x18,
font_sun_8x16,
font_sun_12x22,
font_acorn_8x8,
font_mini_4x6;
/* Find a font with a specific name */

8
include/linux/fsl_devices.h
View File

@@ -51,6 +51,7 @@ struct gianfar_platform_data {
/* board specific information */
u32 board_flags;
u32 phy_flags;
u32 phyid;
u32 interruptPHY;
u8 mac_addr[6];
@@ -61,9 +62,14 @@ struct gianfar_platform_data {
#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002
#define FSL_GIANFAR_DEV_HAS_RMON 0x00000004
#define FSL_GIANFAR_DEV_HAS_MULTI_INTR 0x00000008
#define FSL_GIANFAR_DEV_HAS_CSUM 0x00000010
#define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020
#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040
#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080
/* Flags in gianfar_platform_data */
#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* if not set use a timer */
#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */
#define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */
struct fsl_i2c_platform_data {
/* device specific information */

40
include/linux/genalloc.h Normal file
View File

@@ -0,0 +1,40 @@
/*
* Basic general purpose allocator for managing special purpose memory
* not managed by the regular kmalloc/kfree interface.
* Uses for this includes on-device special memory, uncached memory
* etc.
*
* This code is based on the buddy allocator found in the sym53c8xx_2
* driver, adapted for general purpose use.
*
* This source code is licensed under the GNU General Public License,
* Version 2. See the file COPYING for more details.
*/
#include <linux/spinlock.h>
#define ALLOC_MIN_SHIFT 5 /* 32 bytes minimum */
/*
* Link between free memory chunks of a given size.
*/
struct gen_pool_link {
struct gen_pool_link *next;
};
/*
* Memory pool descriptor.
*/
struct gen_pool {
spinlock_t lock;
unsigned long (*get_new_chunk)(struct gen_pool *);
struct gen_pool *next;
struct gen_pool_link *h;
unsigned long private;
int max_chunk_shift;
};
unsigned long gen_pool_alloc(struct gen_pool *poolp, int size);
void gen_pool_free(struct gen_pool *mp, unsigned long ptr, int size);
struct gen_pool *gen_pool_create(int nr_chunks, int max_chunk_shift,
unsigned long (*fp)(struct gen_pool *),
unsigned long data);

8
include/linux/gfp.h
View File

@@ -39,6 +39,7 @@ struct vm_area_struct;
#define __GFP_COMP 0x4000u /* Add compound page metadata */
#define __GFP_ZERO 0x8000u /* Return zeroed page on success */
#define __GFP_NOMEMALLOC 0x10000u /* Don't use emergency reserves */
#define __GFP_NORECLAIM 0x20000u /* No realy zone reclaim during allocation */
#define __GFP_BITS_SHIFT 20 /* Room for 20 __GFP_FOO bits */
#define __GFP_BITS_MASK ((1 << __GFP_BITS_SHIFT) - 1)
@@ -47,7 +48,7 @@ struct vm_area_struct;
#define GFP_LEVEL_MASK (__GFP_WAIT|__GFP_HIGH|__GFP_IO|__GFP_FS| \
__GFP_COLD|__GFP_NOWARN|__GFP_REPEAT| \
__GFP_NOFAIL|__GFP_NORETRY|__GFP_NO_GROW|__GFP_COMP| \
__GFP_NOMEMALLOC)
__GFP_NOMEMALLOC|__GFP_NORECLAIM)
#define GFP_ATOMIC (__GFP_HIGH)
#define GFP_NOIO (__GFP_WAIT)
@@ -132,5 +133,10 @@ extern void FASTCALL(free_cold_page(struct page *page));
#define free_page(addr) free_pages((addr),0)
void page_alloc_init(void);
#ifdef CONFIG_NUMA
void drain_remote_pages(void);
#else
static inline void drain_remote_pages(void) { };
#endif
#endif /* __LINUX_GFP_H */

40
include/linux/hugetlb.h
View File

@@ -4,6 +4,7 @@
#ifdef CONFIG_HUGETLB_PAGE
#include <linux/mempolicy.h>
#include <asm/tlbflush.h>
struct ctl_table;
@@ -22,12 +23,6 @@ int hugetlb_report_meminfo(char *);
int hugetlb_report_node_meminfo(int, char *);
int is_hugepage_mem_enough(size_t);
unsigned long hugetlb_total_pages(void);
struct page *follow_huge_addr(struct mm_struct *mm, unsigned long address,
int write);
struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address,
pmd_t *pmd, int write);
int is_aligned_hugepage_range(unsigned long addr, unsigned long len);
int pmd_huge(pmd_t pmd);
struct page *alloc_huge_page(void);
void free_huge_page(struct page *);
@@ -35,6 +30,17 @@ extern unsigned long max_huge_pages;
extern const unsigned long hugetlb_zero, hugetlb_infinity;
extern int sysctl_hugetlb_shm_group;
/* arch callbacks */
pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr);
pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr);
struct page *follow_huge_addr(struct mm_struct *mm, unsigned long address,
int write);
struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address,
pmd_t *pmd, int write);
int is_aligned_hugepage_range(unsigned long addr, unsigned long len);
int pmd_huge(pmd_t pmd);
#ifndef ARCH_HAS_HUGEPAGE_ONLY_RANGE
#define is_hugepage_only_range(mm, addr, len) 0
#define hugetlb_free_pgd_range(tlb, addr, end, floor, ceiling) \
@@ -48,6 +54,28 @@ extern int sysctl_hugetlb_shm_group;
int prepare_hugepage_range(unsigned long addr, unsigned long len);
#endif
#ifndef ARCH_HAS_SETCLEAR_HUGE_PTE
#define set_huge_pte_at(mm, addr, ptep, pte) set_pte_at(mm, addr, ptep, pte)
#define huge_ptep_get_and_clear(mm, addr, ptep) ptep_get_and_clear(mm, addr, ptep)
#else
void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
pte_t *ptep, pte_t pte);
pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
pte_t *ptep);
#endif
#ifndef ARCH_HAS_HUGETLB_PREFAULT_HOOK
#define hugetlb_prefault_arch_hook(mm) do { } while (0)
#else
void hugetlb_prefault_arch_hook(struct mm_struct *mm);
#endif
#ifndef ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
#define hugetlb_clean_stale_pgtable(pte) BUG()
#else
void hugetlb_clean_stale_pgtable(pte_t *pte);
#endif
#else /* !CONFIG_HUGETLB_PAGE */
static inline int is_vm_hugetlb_page(struct vm_area_struct *vma)

179
include/linux/ioc4.h Normal file
View File

@@ -0,0 +1,179 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
*/
#ifndef _LINUX_IOC4_H
#define _LINUX_IOC4_H
#include <linux/interrupt.h>
/***************
* Definitions *
***************/
/* Miscellaneous values inherent to hardware */
#define IOC4_EXTINT_COUNT_DIVISOR 520 /* PCI clocks per COUNT tick */
/***********************************
* Structures needed by subdrivers *
***********************************/
/* This structure fully describes the IOC4 miscellaneous registers which
* appear at bar[0]+0x00000 through bar[0]+0x0005c. The corresponding
* PCI resource is managed by the main IOC4 driver because it contains
* registers of interest to many different IOC4 subdrivers.
*/
struct ioc4_misc_regs {
/* Miscellaneous IOC4 registers */
union ioc4_pci_err_addr_l {
uint32_t raw;
struct {
uint32_t valid:1; /* Address captured */
uint32_t master_id:4; /* Unit causing error
* 0/1: Serial port 0 TX/RX
* 2/3: Serial port 1 TX/RX
* 4/5: Serial port 2 TX/RX
* 6/7: Serial port 3 TX/RX
* 8: ATA/ATAPI
* 9-15: Undefined
*/
uint32_t mul_err:1; /* Multiple errors occurred */
uint32_t addr:26; /* Bits 31-6 of error addr */
} fields;
} pci_err_addr_l;
uint32_t pci_err_addr_h; /* Bits 63-32 of error addr */
union ioc4_sio_int {
uint32_t raw;
struct {
uint8_t tx_mt:1; /* TX ring buffer empty */
uint8_t rx_full:1; /* RX ring buffer full */
uint8_t rx_high:1; /* RX high-water exceeded */
uint8_t rx_timer:1; /* RX timer has triggered */
uint8_t delta_dcd:1; /* DELTA_DCD seen */
uint8_t delta_cts:1; /* DELTA_CTS seen */
uint8_t intr_pass:1; /* Interrupt pass-through */
uint8_t tx_explicit:1; /* TX, MCW, or delay complete */
} fields[4];
} sio_ir; /* Serial interrupt state */
union ioc4_other_int {
uint32_t raw;
struct {
uint32_t ata_int:1; /* ATA port passthru */
uint32_t ata_memerr:1; /* ATA halted by mem error */
uint32_t memerr:4; /* Serial halted by mem err */
uint32_t kbd_int:1; /* kbd/mouse intr asserted */
uint32_t reserved:16; /* zero */
uint32_t rt_int:1; /* INT_OUT section latch */
uint32_t gen_int:8; /* Intr. from generic pins */
} fields;
} other_ir; /* Other interrupt state */
union ioc4_sio_int sio_ies; /* Serial interrupt enable set */
union ioc4_other_int other_ies; /* Other interrupt enable set */
union ioc4_sio_int sio_iec; /* Serial interrupt enable clear */
union ioc4_other_int other_iec; /* Other interrupt enable clear */
union ioc4_sio_cr {
uint32_t raw;
struct {
uint32_t cmd_pulse:4; /* Bytebus strobe width */
uint32_t arb_diag:3; /* PCI bus requester */
uint32_t sio_diag_idle:1; /* Active ser req? */
uint32_t ata_diag_idle:1; /* Active ATA req? */
uint32_t ata_diag_active:1; /* ATA req is winner */
uint32_t reserved:22; /* zero */
} fields;
} sio_cr;
uint32_t unused1;
union ioc4_int_out {
uint32_t raw;
struct {
uint32_t count:16; /* Period control */
uint32_t mode:3; /* Output signal shape */
uint32_t reserved:11; /* zero */
uint32_t diag:1; /* Timebase control */
uint32_t int_out:1; /* Current value */
} fields;
} int_out; /* External interrupt output control */
uint32_t unused2;
union ioc4_gpcr {
uint32_t raw;
struct {
uint32_t dir:8; /* Pin direction */
uint32_t edge:8; /* Edge/level mode */
uint32_t reserved1:4; /* zero */
uint32_t int_out_en:1; /* INT_OUT enable */
uint32_t reserved2:11; /* zero */
} fields;
} gpcr_s; /* Generic PIO control set */
union ioc4_gpcr gpcr_c; /* Generic PIO control clear */
union ioc4_gpdr {
uint32_t raw;
struct {
uint32_t gen_pin:8; /* State of pins */
uint32_t reserved:24;
} fields;
} gpdr; /* Generic PIO data */
uint32_t unused3;
union ioc4_gppr {
uint32_t raw;
struct {
uint32_t gen_pin:1; /* Single pin state */
uint32_t reserved:31;
} fields;
} gppr[8]; /* Generic PIO pins */
};
/* Masks for GPCR DIR pins */
#define IOC4_GPCR_DIR_0 0x01 /* External interrupt output */
#define IOC4_GPCR_DIR_1 0x02 /* External interrupt input */
#define IOC4_GPCR_DIR_2 0x04
#define IOC4_GPCR_DIR_3 0x08 /* Keyboard/mouse presence */
#define IOC4_GPCR_DIR_4 0x10 /* Ser. port 0 xcvr select (0=232, 1=422) */
#define IOC4_GPCR_DIR_5 0x20 /* Ser. port 1 xcvr select (0=232, 1=422) */
#define IOC4_GPCR_DIR_6 0x40 /* Ser. port 2 xcvr select (0=232, 1=422) */
#define IOC4_GPCR_DIR_7 0x80 /* Ser. port 3 xcvr select (0=232, 1=422) */
/* Masks for GPCR EDGE pins */
#define IOC4_GPCR_EDGE_0 0x01
#define IOC4_GPCR_EDGE_1 0x02 /* External interrupt input */
#define IOC4_GPCR_EDGE_2 0x04
#define IOC4_GPCR_EDGE_3 0x08
#define IOC4_GPCR_EDGE_4 0x10
#define IOC4_GPCR_EDGE_5 0x20
#define IOC4_GPCR_EDGE_6 0x40
#define IOC4_GPCR_EDGE_7 0x80
/* One of these per IOC4 */
struct ioc4_driver_data {
struct list_head idd_list;
unsigned long idd_bar0;
struct pci_dev *idd_pdev;
const struct pci_device_id *idd_pci_id;
struct __iomem ioc4_misc_regs *idd_misc_regs;
unsigned long count_period;
void *idd_serial_data;
};
/* One per submodule */
struct ioc4_submodule {
struct list_head is_list;
char *is_name;
struct module *is_owner;
int (*is_probe) (struct ioc4_driver_data *);
int (*is_remove) (struct ioc4_driver_data *);
};
#define IOC4_NUM_CARDS 8 /* max cards per partition */
/**********************************
* Functions needed by submodules *
**********************************/
extern int ioc4_register_submodule(struct ioc4_submodule *);
extern void ioc4_unregister_submodule(struct ioc4_submodule *);
#endif /* _LINUX_IOC4_H */

21
include/linux/ioc4_common.h
View File

@@ -1,21 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
*/
#ifndef _LINUX_IOC4_COMMON_H
#define _LINUX_IOC4_COMMON_H
/* prototypes */
int ioc4_serial_init(void);
int ioc4_serial_attach_one(struct pci_dev *pdev, const struct
pci_device_id *pci_id);
int ioc4_ide_attach_one(struct pci_dev *pdev, const struct
pci_device_id *pci_id);
#endif /* _LINUX_IOC4_COMMON_H */

4
include/linux/irq.h
View File

@@ -47,6 +47,10 @@ struct hw_interrupt_type {
void (*ack)(unsigned int irq);
void (*end)(unsigned int irq);
void (*set_affinity)(unsigned int irq, cpumask_t dest);
/* Currently used only by UML, might disappear one day.*/
#ifdef CONFIG_IRQ_RELEASE_METHOD
void (*release)(unsigned int irq, void *dev_id);
#endif
};
typedef struct hw_interrupt_type hw_irq_controller;

6
include/linux/mm.h
View File

@@ -691,6 +691,12 @@ extern void show_mem(void);
extern void si_meminfo(struct sysinfo * val);
extern void si_meminfo_node(struct sysinfo *val, int nid);
#ifdef CONFIG_NUMA
extern void setup_per_cpu_pageset(void);
#else
static inline void setup_per_cpu_pageset(void) {}
#endif
/* prio_tree.c */
void vma_prio_tree_add(struct vm_area_struct *, struct vm_area_struct *old);
void vma_prio_tree_insert(struct vm_area_struct *, struct prio_tree_root *);

21
include/linux/mmzone.h
View File

@@ -63,6 +63,12 @@ struct per_cpu_pageset {
#endif
} ____cacheline_aligned_in_smp;
#ifdef CONFIG_NUMA
#define zone_pcp(__z, __cpu) ((__z)->pageset[(__cpu)])
#else
#define zone_pcp(__z, __cpu) (&(__z)->pageset[(__cpu)])
#endif
#define ZONE_DMA 0
#define ZONE_NORMAL 1
#define ZONE_HIGHMEM 2
@@ -122,8 +128,11 @@ struct zone {
*/
unsigned long lowmem_reserve[MAX_NR_ZONES];
#ifdef CONFIG_NUMA
struct per_cpu_pageset *pageset[NR_CPUS];
#else
struct per_cpu_pageset pageset[NR_CPUS];
#endif
/*
* free areas of different sizes
*/
@@ -144,6 +153,14 @@ struct zone {
unsigned long pages_scanned; /* since last reclaim */
int all_unreclaimable; /* All pages pinned */
/*
* Does the allocator try to reclaim pages from the zone as soon
* as it fails a watermark_ok() in __alloc_pages?
*/
int reclaim_pages;
/* A count of how many reclaimers are scanning this zone */
atomic_t reclaim_in_progress;
/*
* prev_priority holds the scanning priority for this zone. It is
* defined as the scanning priority at which we achieved our reclaim
@@ -381,7 +398,7 @@ int lowmem_reserve_ratio_sysctl_handler(struct ctl_table *, int, struct file *,
#include <linux/topology.h>
/* Returns the number of the current Node. */
#define numa_node_id() (cpu_to_node(_smp_processor_id()))
#define numa_node_id() (cpu_to_node(raw_smp_processor_id()))
#ifndef CONFIG_DISCONTIGMEM

6
include/linux/netfilter_ipv4.h
View File

@@ -75,12 +75,6 @@ enum nf_ip_hook_priorities {
#define SO_ORIGINAL_DST 80
#ifdef __KERNEL__
#ifdef CONFIG_NETFILTER_DEBUG
void nf_debug_ip_local_deliver(struct sk_buff *skb);
void nf_debug_ip_loopback_xmit(struct sk_buff *newskb);
void nf_debug_ip_finish_output2(struct sk_buff *skb);
#endif /*CONFIG_NETFILTER_DEBUG*/
extern int ip_route_me_harder(struct sk_buff **pskb);
/* Call this before modifying an existing IP packet: ensures it is

Some files were not shown because too many files have changed in this diff Show More