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cxl: Introduce to_{ram,pmem}_{res,perf}() helpers

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In preparation for consolidating all DPA partition information into an
array of DPA metadata, introduce helpers that hide the layout of the
current data. I.e. make the eventual replacement of ->ram_res,
->pmem_res, ->ram_perf, and ->pmem_perf with a new DPA metadata array a
no-op for code paths that consume that information, and reduce the noise
of follow-on patches.

The end goal is to consolidate all DPA information in 'struct
cxl_dev_state', but for now the helpers just make it appear that all DPA
metadata is relative to @cxlds.

As the conversion to generic partition metadata walking is completed,
these helpers will naturally be eliminated, or reduced in scope.

Cc: Alejandro Lucero <alucerop@amd.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Tested-by: Alejandro Lucero <alucerop@amd.com>
Link: https://patch.msgid.link/173864305238.668823.16553986866633608541.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
This commit is contained in:
Dan Williams
2025-02-03 20:24:12 -08:00
committed by Dave Jiang
parent 188e9529a6
commit d77ca6c2b5
8 changed files with 162 additions and 90 deletions
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25
tools/testing/cxl/test/cxl.c
View File

@@ -1000,25 +1000,28 @@ static void mock_cxl_endpoint_parse_cdat(struct cxl_port *port)
find_cxl_root(port);
struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev);
struct cxl_dev_state *cxlds = cxlmd->cxlds;
struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlds);
struct access_coordinate ep_c[ACCESS_COORDINATE_MAX];
struct range pmem_range = {
.start = cxlds->pmem_res.start,
.end = cxlds->pmem_res.end,
const struct resource *partition[] = {
to_ram_res(cxlds),
to_pmem_res(cxlds),
};
struct range ram_range = {
.start = cxlds->ram_res.start,
.end = cxlds->ram_res.end,
struct cxl_dpa_perf *perf[] = {
to_ram_perf(cxlds),
to_pmem_perf(cxlds),
};
if (!cxl_root)
return;
if (range_len(&ram_range))
dpa_perf_setup(port, &ram_range, &mds->ram_perf);
for (int i = 0; i < ARRAY_SIZE(partition); i++) {
const struct resource *res = partition[i];
struct range range = {
.start = res->start,
.end = res->end,
};
if (range_len(&pmem_range))
dpa_perf_setup(port, &pmem_range, &mds->pmem_perf);
dpa_perf_setup(port, &range, perf[i]);
}
cxl_memdev_update_perf(cxlmd);