mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-02-09 02:42:01 -05:00
Merge branch 'topic/asoc' into for-linus
Conflicts: sound/soc/codecs/ad1938.c
This commit is contained in:
Takashi Iwai
@@ -569,9 +569,9 @@ struct twl4030_codec_data {
|
||||
struct twl4030_codec_audio_data *audio;
|
||||
struct twl4030_codec_vibra_data *vibra;
|
||||
|
||||
/* twl6030 */
|
||||
int audpwron_gpio; /* audio power-on gpio */
|
||||
int naudint_irq; /* audio interrupt */
|
||||
/* twl6040 */
|
||||
int audpwron_gpio; /* audio power-on gpio */
|
||||
int naudint_irq; /* audio interrupt */
|
||||
};
|
||||
|
||||
struct twl4030_platform_data {
|
||||
|
||||
126
include/linux/mfd/davinci_voicecodec.h
Normal file
126
include/linux/mfd/davinci_voicecodec.h
Normal file
@@ -0,0 +1,126 @@
|
||||
/*
|
||||
* DaVinci Voice Codec Core Interface for TI platforms
|
||||
*
|
||||
* Copyright (C) 2010 Texas Instruments, Inc
|
||||
*
|
||||
* Author: Miguel Aguilar <miguel.aguilar@ridgerun.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_MFD_DAVINCI_VOICECODEC_H_
|
||||
#define __LINUX_MFD_DAVINIC_VOICECODEC_H_
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mfd/core.h>
|
||||
|
||||
#include <mach/edma.h>
|
||||
|
||||
/*
|
||||
* Register values.
|
||||
*/
|
||||
#define DAVINCI_VC_PID 0x00
|
||||
#define DAVINCI_VC_CTRL 0x04
|
||||
#define DAVINCI_VC_INTEN 0x08
|
||||
#define DAVINCI_VC_INTSTATUS 0x0c
|
||||
#define DAVINCI_VC_INTCLR 0x10
|
||||
#define DAVINCI_VC_EMUL_CTRL 0x14
|
||||
#define DAVINCI_VC_RFIFO 0x20
|
||||
#define DAVINCI_VC_WFIFO 0x24
|
||||
#define DAVINCI_VC_FIFOSTAT 0x28
|
||||
#define DAVINCI_VC_TST_CTRL 0x2C
|
||||
#define DAVINCI_VC_REG05 0x94
|
||||
#define DAVINCI_VC_REG09 0xA4
|
||||
#define DAVINCI_VC_REG12 0xB0
|
||||
|
||||
/* DAVINCI_VC_CTRL bit fields */
|
||||
#define DAVINCI_VC_CTRL_MASK 0x5500
|
||||
#define DAVINCI_VC_CTRL_RSTADC BIT(0)
|
||||
#define DAVINCI_VC_CTRL_RSTDAC BIT(1)
|
||||
#define DAVINCI_VC_CTRL_RD_BITS_8 BIT(4)
|
||||
#define DAVINCI_VC_CTRL_RD_UNSIGNED BIT(5)
|
||||
#define DAVINCI_VC_CTRL_WD_BITS_8 BIT(6)
|
||||
#define DAVINCI_VC_CTRL_WD_UNSIGNED BIT(7)
|
||||
#define DAVINCI_VC_CTRL_RFIFOEN BIT(8)
|
||||
#define DAVINCI_VC_CTRL_RFIFOCL BIT(9)
|
||||
#define DAVINCI_VC_CTRL_RFIFOMD_WORD_1 BIT(10)
|
||||
#define DAVINCI_VC_CTRL_WFIFOEN BIT(12)
|
||||
#define DAVINCI_VC_CTRL_WFIFOCL BIT(13)
|
||||
#define DAVINCI_VC_CTRL_WFIFOMD_WORD_1 BIT(14)
|
||||
|
||||
/* DAVINCI_VC_INT bit fields */
|
||||
#define DAVINCI_VC_INT_MASK 0x3F
|
||||
#define DAVINCI_VC_INT_RDRDY_MASK BIT(0)
|
||||
#define DAVINCI_VC_INT_RERROVF_MASK BIT(1)
|
||||
#define DAVINCI_VC_INT_RERRUDR_MASK BIT(2)
|
||||
#define DAVINCI_VC_INT_WDREQ_MASK BIT(3)
|
||||
#define DAVINCI_VC_INT_WERROVF_MASKBIT BIT(4)
|
||||
#define DAVINCI_VC_INT_WERRUDR_MASK BIT(5)
|
||||
|
||||
/* DAVINCI_VC_REG05 bit fields */
|
||||
#define DAVINCI_VC_REG05_PGA_GAIN 0x07
|
||||
|
||||
/* DAVINCI_VC_REG09 bit fields */
|
||||
#define DAVINCI_VC_REG09_MUTE 0x40
|
||||
#define DAVINCI_VC_REG09_DIG_ATTEN 0x3F
|
||||
|
||||
/* DAVINCI_VC_REG12 bit fields */
|
||||
#define DAVINCI_VC_REG12_POWER_ALL_ON 0xFD
|
||||
#define DAVINCI_VC_REG12_POWER_ALL_OFF 0x00
|
||||
|
||||
#define DAVINCI_VC_CELLS 2
|
||||
|
||||
enum davinci_vc_cells {
|
||||
DAVINCI_VC_VCIF_CELL,
|
||||
DAVINCI_VC_CQ93VC_CELL,
|
||||
};
|
||||
|
||||
struct davinci_vcif {
|
||||
struct platform_device *pdev;
|
||||
u32 dma_tx_channel;
|
||||
u32 dma_rx_channel;
|
||||
dma_addr_t dma_tx_addr;
|
||||
dma_addr_t dma_rx_addr;
|
||||
};
|
||||
|
||||
struct cq93vc {
|
||||
struct platform_device *pdev;
|
||||
struct snd_soc_codec *codec;
|
||||
u32 sysclk;
|
||||
};
|
||||
|
||||
struct davinci_vc;
|
||||
|
||||
struct davinci_vc {
|
||||
/* Device data */
|
||||
struct device *dev;
|
||||
struct platform_device *pdev;
|
||||
struct clk *clk;
|
||||
|
||||
/* Memory resources */
|
||||
void __iomem *base;
|
||||
resource_size_t pbase;
|
||||
size_t base_size;
|
||||
|
||||
/* MFD cells */
|
||||
struct mfd_cell cells[DAVINCI_VC_CELLS];
|
||||
|
||||
/* Client devices */
|
||||
struct davinci_vcif davinci_vcif;
|
||||
struct cq93vc cq93vc;
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -492,6 +492,8 @@
|
||||
*/
|
||||
#define WM8350_JACK_L_LVL 0x0800
|
||||
#define WM8350_JACK_R_LVL 0x0400
|
||||
#define WM8350_JACK_MICSCD_LVL 0x0200
|
||||
#define WM8350_JACK_MICSD_LVL 0x0100
|
||||
|
||||
/*
|
||||
* WM8350 Platform setup
|
||||
|
||||
@@ -15,14 +15,38 @@
|
||||
#ifndef __MFD_WM8994_CORE_H__
|
||||
#define __MFD_WM8994_CORE_H__
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
struct regulator_dev;
|
||||
struct regulator_bulk_data;
|
||||
|
||||
#define WM8994_NUM_GPIO_REGS 11
|
||||
#define WM8994_NUM_LDO_REGS 2
|
||||
#define WM8994_NUM_LDO_REGS 2
|
||||
#define WM8994_NUM_IRQ_REGS 2
|
||||
|
||||
#define WM8994_IRQ_TEMP_SHUT 0
|
||||
#define WM8994_IRQ_MIC1_DET 1
|
||||
#define WM8994_IRQ_MIC1_SHRT 2
|
||||
#define WM8994_IRQ_MIC2_DET 3
|
||||
#define WM8994_IRQ_MIC2_SHRT 4
|
||||
#define WM8994_IRQ_FLL1_LOCK 5
|
||||
#define WM8994_IRQ_FLL2_LOCK 6
|
||||
#define WM8994_IRQ_SRC1_LOCK 7
|
||||
#define WM8994_IRQ_SRC2_LOCK 8
|
||||
#define WM8994_IRQ_AIF1DRC1_SIG_DET 9
|
||||
#define WM8994_IRQ_AIF1DRC2_SIG_DET 10
|
||||
#define WM8994_IRQ_AIF2DRC_SIG_DET 11
|
||||
#define WM8994_IRQ_FIFOS_ERR 12
|
||||
#define WM8994_IRQ_WSEQ_DONE 13
|
||||
#define WM8994_IRQ_DCS_DONE 14
|
||||
#define WM8994_IRQ_TEMP_WARN 15
|
||||
|
||||
/* GPIOs in the chip are numbered from 1-11 */
|
||||
#define WM8994_IRQ_GPIO(x) (x + WM8994_IRQ_TEMP_WARN)
|
||||
|
||||
struct wm8994 {
|
||||
struct mutex io_lock;
|
||||
struct mutex irq_lock;
|
||||
|
||||
struct device *dev;
|
||||
int (*read_dev)(struct wm8994 *wm8994, unsigned short reg,
|
||||
@@ -33,6 +57,11 @@ struct wm8994 {
|
||||
void *control_data;
|
||||
|
||||
int gpio_base;
|
||||
int irq_base;
|
||||
|
||||
int irq;
|
||||
u16 irq_masks_cur[WM8994_NUM_IRQ_REGS];
|
||||
u16 irq_masks_cache[WM8994_NUM_IRQ_REGS];
|
||||
|
||||
/* Used over suspend/resume */
|
||||
u16 ldo_regs[WM8994_NUM_LDO_REGS];
|
||||
@@ -51,4 +80,26 @@ int wm8994_set_bits(struct wm8994 *wm8994, unsigned short reg,
|
||||
int wm8994_bulk_read(struct wm8994 *wm8994, unsigned short reg,
|
||||
int count, u16 *buf);
|
||||
|
||||
|
||||
/* Helper to save on boilerplate */
|
||||
static inline int wm8994_request_irq(struct wm8994 *wm8994, int irq,
|
||||
irq_handler_t handler, const char *name,
|
||||
void *data)
|
||||
{
|
||||
if (!wm8994->irq_base)
|
||||
return -EINVAL;
|
||||
return request_threaded_irq(wm8994->irq_base + irq, NULL, handler,
|
||||
IRQF_TRIGGER_RISING, name,
|
||||
data);
|
||||
}
|
||||
static inline void wm8994_free_irq(struct wm8994 *wm8994, int irq, void *data)
|
||||
{
|
||||
if (!wm8994->irq_base)
|
||||
return;
|
||||
free_irq(wm8994->irq_base + irq, data);
|
||||
}
|
||||
|
||||
int wm8994_irq_init(struct wm8994 *wm8994);
|
||||
void wm8994_irq_exit(struct wm8994 *wm8994);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -70,6 +70,7 @@ struct wm8994_pdata {
|
||||
|
||||
struct wm8994_ldo_pdata ldo[WM8994_NUM_LDO];
|
||||
|
||||
int irq_base; /** Base IRQ number for WM8994, required for IRQs */
|
||||
|
||||
int num_drc_cfgs;
|
||||
struct wm8994_drc_cfg *drc_cfgs;
|
||||
|
||||
Reference in New Issue
Block a user