From d2bfe35f840d9fdfe76efcd4ffab185abad44046 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Mon, 8 Dec 2025 20:26:28 +0200 Subject: [PATCH] drm/i915/de: Simplify intel_de_read8() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit intel_de_read8() is only needed for VGA register MMIO access by the CRT code on gen2/3. Remove the redundant wakelock stuff, and add a platform check to make sure this won't get used on any platform where MMIO VGA register accesses don't work. Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20251208182637.334-11-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_de.h | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h index a7ce3b875e06..5c1b37d30045 100644 --- a/drivers/gpu/drm/i915/display/intel_de.h +++ b/drivers/gpu/drm/i915/display/intel_de.h @@ -6,6 +6,8 @@ #ifndef __INTEL_DE_H__ #define __INTEL_DE_H__ +#include + #include "intel_display_core.h" #include "intel_dmc_wl.h" #include "intel_dsb.h" @@ -34,15 +36,10 @@ intel_de_read(struct intel_display *display, i915_reg_t reg) static inline u8 intel_de_read8(struct intel_display *display, i915_reg_t reg) { - u8 val; + /* this is only used on VGA registers (possible on pre-g4x) */ + drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x); - intel_dmc_wl_get(display, reg); - - val = intel_uncore_read8(__to_uncore(display), reg); - - intel_dmc_wl_put(display, reg); - - return val; + return intel_uncore_read8(__to_uncore(display), reg); } static inline u64