From 6f1b5605f3d0b6325c69c2be288a93c5d5c294dc Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Thu, 29 Jan 2015 18:10:47 +0000 Subject: [PATCH 1/7] ARM: bcm2835: dt: Add vendor prefix for Raspberry Pi Since the prefix is already in use, we need to add it in the vendor list. Reviewed-by: Stephen Warren Acked-by: Rob Herring Signed-off-by: Stefan Wahren Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 80339192c93e..3fc90ac4f801 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -159,6 +159,7 @@ radxa Radxa raidsonic RaidSonic Technology GmbH ralink Mediatek/Ralink Technology Corp. ramtron Ramtron International +raspberrypi Raspberry Pi Foundation realtek Realtek Semiconductor Corp. renesas Renesas Electronics Corporation ricoh Ricoh Co. Ltd. From 4c059b0b2b59b16c1d053b781056b7e934a36121 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Thu, 29 Jan 2015 18:10:48 +0000 Subject: [PATCH 2/7] ARM: bcm2835: dt: Add root properties for Raspberry Pi This patch adds root compatible properties for the following boards: - Raspberry Pi Model A - Raspberry Pi Model A+ - Raspberry Pi Model B - Raspberry Pi Model B (no P5) - Raspberry Pi Model B rev2 - Raspberry Pi Model B+ - Raspberry Pi Compute Module Reviewed-by: Stephen Warren Acked-by: Rob Herring Signed-off-by: Stefan Wahren Signed-off-by: Lee Jones --- .../bindings/arm/bcm/brcm,bcm2835.txt | 31 +++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt index ac683480c486..c78576bb7729 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt @@ -1,8 +1,35 @@ Broadcom BCM2835 device tree bindings ------------------------------------------- -Boards with the BCM2835 SoC shall have the following properties: +Raspberry Pi Model A +Required root node properties: +compatible = "raspberrypi,model-a", "brcm,bcm2835"; -Required root node property: +Raspberry Pi Model A+ +Required root node properties: +compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; +Raspberry Pi Model B +Required root node properties: +compatible = "raspberrypi,model-b", "brcm,bcm2835"; + +Raspberry Pi Model B (no P5) +early model B with I2C0 rather than I2C1 routed to the expansion header +Required root node properties: +compatible = "raspberrypi,model-b-i2c0", "brcm,bcm2835"; + +Raspberry Pi Model B rev2 +Required root node properties: +compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; + +Raspberry Pi Model B+ +Required root node properties: +compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; + +Raspberry Pi Compute Module +Required root node properties: +compatible = "raspberrypi,compute-module", "brcm,bcm2835"; + +Generic BCM2835 board +Required root node properties: compatible = "brcm,bcm2835"; From 62c69d7635d6f12377897429f98baf504a6d000f Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Thu, 29 Jan 2015 18:10:49 +0000 Subject: [PATCH 3/7] ARM: bcm2835: dt: Add header file for pinctrl constants This new header file defines pincontrol constants to use from bcm2835 DTS files for pincontrol properties option. Reviewed-by: Stephen Warren Signed-off-by: Stefan Wahren Signed-off-by: Lee Jones --- include/dt-bindings/pinctrl/bcm2835.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 include/dt-bindings/pinctrl/bcm2835.h diff --git a/include/dt-bindings/pinctrl/bcm2835.h b/include/dt-bindings/pinctrl/bcm2835.h new file mode 100644 index 000000000000..6f0bc37af39c --- /dev/null +++ b/include/dt-bindings/pinctrl/bcm2835.h @@ -0,0 +1,27 @@ +/* + * Header providing constants for bcm2835 pinctrl bindings. + * + * Copyright (C) 2015 Stefan Wahren + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __DT_BINDINGS_PINCTRL_BCM2835_H__ +#define __DT_BINDINGS_PINCTRL_BCM2835_H__ + +/* brcm,function property */ +#define BCM2835_FSEL_GPIO_IN 0 +#define BCM2835_FSEL_GPIO_OUT 1 +#define BCM2835_FSEL_ALT5 2 +#define BCM2835_FSEL_ALT4 3 +#define BCM2835_FSEL_ALT0 4 +#define BCM2835_FSEL_ALT1 5 +#define BCM2835_FSEL_ALT2 6 +#define BCM2835_FSEL_ALT3 7 + +#endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */ From 120911120911e0f84eea4fd7d1e9d6c4c65f1586 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Thu, 29 Jan 2015 18:10:50 +0000 Subject: [PATCH 4/7] ARM: bcm2835: dt: Use pinctrl header This patch converts all bcm2835 dts and dtsi files to use the pinctrl header file. Reviewed-by: Stephen Warren Signed-off-by: Stefan Wahren Signed-off-by: Lee Jones --- arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 4 ++-- arch/arm/boot/dts/bcm2835-rpi-b.dts | 4 ++-- arch/arm/boot/dts/bcm2835-rpi.dtsi | 8 ++++---- arch/arm/boot/dts/bcm2835.dtsi | 3 ++- 4 files changed, 10 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts index e479515099c3..668442b1bda5 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts @@ -1,5 +1,5 @@ /dts-v1/; -/include/ "bcm2835-rpi.dtsi" +#include "bcm2835-rpi.dtsi" / { compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; @@ -25,6 +25,6 @@ &gpio { /* I2S interface */ i2s_alt0: i2s_alt0 { brcm,pins = <18 19 20 21>; - brcm,function = <4>; /* alt0 */ + brcm,function = ; }; }; diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts index bafa46fc226a..ee89b79426cf 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-b.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts @@ -1,5 +1,5 @@ /dts-v1/; -/include/ "bcm2835-rpi.dtsi" +#include "bcm2835-rpi.dtsi" / { compatible = "raspberrypi,model-b", "brcm,bcm2835"; @@ -18,6 +18,6 @@ &gpio { /* I2S interface */ i2s_alt2: i2s_alt2 { brcm,pins = <28 29 30 31>; - brcm,function = <6>; /* alt2 */ + brcm,function = ; }; }; diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi index c7064487017d..46780bb48bbf 100644 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi @@ -1,4 +1,4 @@ -/include/ "bcm2835.dtsi" +#include "bcm2835.dtsi" / { memory { @@ -21,17 +21,17 @@ &gpio { gpioout: gpioout { brcm,pins = <6>; - brcm,function = <1>; /* GPIO out */ + brcm,function = ; }; alt0: alt0 { brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>; - brcm,function = <4>; /* alt0 */ + brcm,function = ; }; alt3: alt3 { brcm,pins = <48 49 50 51 52 53>; - brcm,function = <7>; /* alt3 */ + brcm,function = ; }; }; diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 3342cb1407bc..be9c91439bcf 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -1,4 +1,5 @@ -/include/ "skeleton.dtsi" +#include +#include "skeleton.dtsi" / { compatible = "brcm,bcm2835"; From 64146f20eb05bb193060ba50dddacaf0d7a48f83 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Wed, 18 Mar 2015 11:00:22 +0200 Subject: [PATCH 5/7] ARM: bcm2835: dt: Fix i2c0 node name Device tree node names should contain the node's reg property address value. The i2c0 node was apparently forgotten in commit 25b2f1bd0b7e0 (ARM: bcm2835: node name unit address cleanup). Acked-by: Stephen Warren Signed-off-by: Baruch Siach Signed-off-by: Lee Jones --- arch/arm/boot/dts/bcm2835.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index be9c91439bcf..4d4c1294c082 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -113,7 +113,7 @@ spi: spi@7e204000 { status = "disabled"; }; - i2c0: i2c@20205000 { + i2c0: i2c@7e205000 { compatible = "brcm,bcm2835-i2c"; reg = <0x7e205000 0x1000>; interrupts = <2 21>; From 05b682b7a3b28dfd27f810cbb509f7211c208b1f Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 5 May 2015 13:27:46 -0700 Subject: [PATCH 6/7] ARM: bcm2835: dt: Add the mailbox to the device tree Signed-off-by: Eric Anholt Acked-by: Lee Jones Acked-by: Stephen Warren Signed-off-by: Lee Jones --- arch/arm/boot/dts/bcm2835.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 4d4c1294c082..4ff1b83191a6 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -61,6 +61,13 @@ rng@7e104000 { reg = <0x7e104000 0x10>; }; + mailbox: mailbox@7e00b800 { + compatible = "brcm,bcm2835-mbox"; + reg = <0x7e00b880 0x40>; + interrupts = <0 1>; + #mbox-cells = <0>; + }; + gpio: gpio@7e200000 { compatible = "brcm,bcm2835-gpio"; reg = <0x7e200000 0xb4>; From 1215baa7a391713dd1d015c209bd87c0a5d89db6 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 5 May 2015 13:10:11 -0700 Subject: [PATCH 7/7] ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There exists a tiny MMU, configurable only by the VC (running the closed firmware), which maps from the ARM's physical addresses to bus addresses. These bus addresses determine the caching behavior in the VC's L1/L2 (note: separate from the ARM's L1/L2) according to the top 2 bits. The bits in the bus address mean: From the VideoCore processor: 0x0... L1 and L2 cache allocating and coherent 0x4... L1 non-allocating, but coherent. L2 allocating and coherent 0x8... L1 non-allocating, but coherent. L2 non-allocating, but coherent 0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent From the GPU peripherals (note: all peripherals bypass the L1 cache. The ARM will see this view once through the VC MMU): 0x0... Do not use 0x4... L1 non-allocating, and incoherent. L2 allocating and coherent. 0x8... L1 non-allocating, and incoherent. L2 non-allocating, but coherent 0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent The 2835 firmware always configures the MMU to turn ARM physical addresses with 0x0 top bits to 0x4, meaning present in L2 but incoherent with L1. However, any bus addresses we were generating in the kernel to be passed to a device had 0x0 bits. That would be a reserved (possibly totally incoherent) value if sent to a GPU peripheral like USB, or L1 allocating if sent to the VC (like a firmware property request). By setting dma-ranges, all of the devices below it get a dev->dma_pfn_offset, so that dma_alloc_coherent() and friends return addresses with 0x4 bits and avoid cache incoherency. This matches the behavior in the downstream 2708 kernel (see BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h). Signed-off-by: Eric Anholt Tested-by: Noralf Trønnes Acked-by: Stephen Warren Signed-off-by: Lee Jones --- arch/arm/boot/dts/bcm2835.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 4ff1b83191a6..301c73f4ca33 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -15,6 +15,7 @@ soc { #address-cells = <1>; #size-cells = <1>; ranges = <0x7e000000 0x20000000 0x02000000>; + dma-ranges = <0x40000000 0x00000000 0x20000000>; timer@7e003000 { compatible = "brcm,bcm2835-system-timer";