diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig index 58a9590c9db6..47ecf9ad4d51 100644 --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig @@ -45,25 +45,25 @@ menuconfig FB device-aware may cause unexpected results. If unsure, say N. config FIRMWARE_EDID - bool "Enable firmware EDID" - depends on FB - ---help--- - This enables access to the EDID transferred from the firmware. - On the i386, this is from the Video BIOS. Enable this if DDC/I2C - transfers do not work for your driver and if you are using - nvidiafb, i810fb or savagefb. + bool "Enable firmware EDID" + depends on FB + ---help--- + This enables access to the EDID transferred from the firmware. + On the i386, this is from the Video BIOS. Enable this if DDC/I2C + transfers do not work for your driver and if you are using + nvidiafb, i810fb or savagefb. - In general, choosing Y for this option is safe. If you - experience extremely long delays while booting before you get - something on your display, try setting this to N. Matrox cards in - combination with certain motherboards and monitors are known to - suffer from this problem. + In general, choosing Y for this option is safe. If you + experience extremely long delays while booting before you get + something on your display, try setting this to N. Matrox cards in + combination with certain motherboards and monitors are known to + suffer from this problem. config FB_DDC - tristate - depends on FB - select I2C_ALGOBIT - select I2C + tristate + depends on FB + select I2C_ALGOBIT + select I2C config FB_BOOT_VESA_SUPPORT bool @@ -160,8 +160,8 @@ config FB_LITTLE_ENDIAN endchoice config FB_SYS_FOPS - tristate - depends on FB + tristate + depends on FB config FB_DEFERRED_IO bool @@ -180,8 +180,8 @@ config FB_SVGALIB cards. config FB_MACMODES - tristate - depends on FB + tristate + depends on FB config FB_BACKLIGHT tristate @@ -190,31 +190,31 @@ config FB_BACKLIGHT select BACKLIGHT_CLASS_DEVICE config FB_MODE_HELPERS - bool "Enable Video Mode Handling Helpers" - depends on FB + bool "Enable Video Mode Handling Helpers" + depends on FB ---help--- This enables functions for handling video modes using the Generalized Timing Formula and the EDID parser. A few drivers rely - on this feature such as the radeonfb, rivafb, and the i810fb. If + on this feature such as the radeonfb, rivafb, and the i810fb. If your driver does not take advantage of this feature, choosing Y will just increase the kernel size by about 5K. config FB_TILEBLITTING - bool "Enable Tile Blitting Support" - depends on FB - ---help--- - This enables tile blitting. Tile blitting is a drawing technique - where the screen is divided into rectangular sections (tiles), whereas - the standard blitting divides the screen into pixels. Because the - default drawing element is a tile, drawing functions will be passed - parameters in terms of number of tiles instead of number of pixels. - For example, to draw a single character, instead of using bitmaps, - an index to an array of bitmaps will be used. To clear or move a - rectangular section of a screen, the rectangle will be described in - terms of number of tiles in the x- and y-axis. + bool "Enable Tile Blitting Support" + depends on FB + ---help--- + This enables tile blitting. Tile blitting is a drawing technique + where the screen is divided into rectangular sections (tiles), whereas + the standard blitting divides the screen into pixels. Because the + default drawing element is a tile, drawing functions will be passed + parameters in terms of number of tiles instead of number of pixels. + For example, to draw a single character, instead of using bitmaps, + an index to an array of bitmaps will be used. To clear or move a + rectangular section of a screen, the rectangle will be described in + terms of number of tiles in the x- and y-axis. - This is particularly important to one driver, matroxfb. If - unsure, say N. + This is particularly important to one driver, matroxfb. If + unsure, say N. comment "Frame buffer hardware drivers" depends on FB @@ -226,7 +226,7 @@ config FB_GRVGA select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT ---help--- - This enables support for the SVGACTRL framebuffer in the GRLIB IP library from Aeroflex Gaisler. + This enables support for the SVGACTRL framebuffer in the GRLIB IP library from Aeroflex Gaisler. config FB_CIRRUS tristate "Cirrus Logic support" @@ -293,14 +293,6 @@ config FB_ARMCLCD here and read . The module will be called amba-clcd. -# Helper logic selected only by the ARM Versatile platform family. -config PLAT_VERSATILE_CLCD - def_bool ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS || ARCH_INTEGRATOR - depends on ARM - depends on FB_ARMCLCD && FB=y - select REGMAP - select MFD_SYSCON - config FB_ACORN bool "Acorn VIDC support" depends on (FB = y) && ARM && ARCH_ACORN @@ -655,17 +647,17 @@ config FB_EFI using the EFI framebuffer as your console. config FB_N411 - tristate "N411 Apollo/Hecuba devkit support" - depends on FB && X86 && MMU - select FB_SYS_FILLRECT - select FB_SYS_COPYAREA - select FB_SYS_IMAGEBLIT - select FB_SYS_FOPS - select FB_DEFERRED_IO - select FB_HECUBA - help - This enables support for the Apollo display controller in its - Hecuba form using the n411 devkit. + tristate "N411 Apollo/Hecuba devkit support" + depends on FB && X86 && MMU + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + select FB_SYS_FOPS + select FB_DEFERRED_IO + select FB_HECUBA + help + This enables support for the Apollo display controller in its + Hecuba form using the n411 devkit. config FB_HGA tristate "Hercules mono graphics support" @@ -685,7 +677,7 @@ config FB_GBE select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - help + help This is the frame buffer device driver for SGI Graphics Backend. This chip is used in SGI O2 and Visual Workstation 320/540. @@ -866,8 +858,8 @@ config FB_S1D13XXX config FB_ATMEL - tristate "AT91/AT32 LCD Controller support" - depends on FB && HAVE_FB_ATMEL + tristate "AT91 LCD Controller support" + depends on FB && OF && HAVE_FB_ATMEL select FB_BACKLIGHT select FB_CFB_FILLRECT select FB_CFB_COPYAREA @@ -875,7 +867,7 @@ config FB_ATMEL select FB_MODE_HELPERS select VIDEOMODE_HELPERS help - This enables support for the AT91/AT32 LCD Controller. + This enables support for the AT91 LCD Controller. config FB_NVIDIA tristate "nVidia Framebuffer Support" @@ -897,10 +889,10 @@ config FB_NVIDIA module will be called nvidiafb. config FB_NVIDIA_I2C - bool "Enable DDC Support" - depends on FB_NVIDIA - select FB_DDC - help + bool "Enable DDC Support" + depends on FB_NVIDIA + select FB_DDC + help This enables I2C support for nVidia Chipsets. This is used only for getting EDID information from the attached display allowing for robust video mode handling and switching. @@ -943,10 +935,10 @@ config FB_RIVA module will be called rivafb. config FB_RIVA_I2C - bool "Enable DDC Support" - depends on FB_RIVA - select FB_DDC - help + bool "Enable DDC Support" + depends on FB_RIVA + select FB_DDC + help This enables I2C support for nVidia Chipsets. This is used only for getting EDID information from the attached display allowing for robust video mode handling and switching. @@ -991,37 +983,37 @@ config FB_I810 select FB_CFB_IMAGEBLIT select VGASTATE help - This driver supports the on-board graphics built in to the Intel 810 - and 815 chipsets. Say Y if you have and plan to use such a board. + This driver supports the on-board graphics built in to the Intel 810 + and 815 chipsets. Say Y if you have and plan to use such a board. - To compile this driver as a module, choose M here: the + To compile this driver as a module, choose M here: the module will be called i810fb. - For more information, please read + For more information, please read config FB_I810_GTF bool "use VESA Generalized Timing Formula" depends on FB_I810 help - If you say Y, then the VESA standard, Generalized Timing Formula - or GTF, will be used to calculate the required video timing values - per video mode. Since the GTF allows nondiscrete timings - (nondiscrete being a range of values as opposed to discrete being a - set of values), you'll be able to use any combination of horizontal + If you say Y, then the VESA standard, Generalized Timing Formula + or GTF, will be used to calculate the required video timing values + per video mode. Since the GTF allows nondiscrete timings + (nondiscrete being a range of values as opposed to discrete being a + set of values), you'll be able to use any combination of horizontal and vertical resolutions, and vertical refresh rates without having to specify your own timing parameters. This is especially useful - to maximize the performance of an aging display, or if you just - have a display with nonstandard dimensions. A VESA compliant + to maximize the performance of an aging display, or if you just + have a display with nonstandard dimensions. A VESA compliant monitor is recommended, but can still work with non-compliant ones. - If you need or want this, then select this option. The timings may - not be compliant with Intel's recommended values. Use at your own + If you need or want this, then select this option. The timings may + not be compliant with Intel's recommended values. Use at your own risk. - If you say N, the driver will revert to discrete video timings + If you say N, the driver will revert to discrete video timings using a set recommended by Intel in their documentation. - - If unsure, say N. + + If unsure, say N. config FB_I810_I2C bool "Enable DDC Support" @@ -1060,8 +1052,8 @@ config FB_INTEL depends on !DRM_I915 help This driver supports the on-board graphics built in to the Intel - 830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets. - Say Y if you have and plan to use such a board. + 830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets. + Say Y if you have and plan to use such a board. To make FB_INTEL=Y work you need to say AGP_INTEL=y too. @@ -1142,10 +1134,10 @@ config FB_MATROX_G G450/G550 secondary head and digital output are supported without additional modules. - The driver starts in monitor mode. You must use the matroxset tool - (available at ) to - swap primary and secondary head outputs, or to change output mode. - Secondary head driver always start in 640x480 resolution and you + The driver starts in monitor mode. You must use the matroxset tool + (available at ) to + swap primary and secondary head outputs, or to change output mode. + Secondary head driver always start in 640x480 resolution and you must use fbset to change it. Do not forget that second head supports only 16 and 32 bpp @@ -1228,7 +1220,7 @@ config FB_RADEON_I2C select FB_DDC default y help - Say Y here if you want DDC/I2C support for your Radeon board. + Say Y here if you want DDC/I2C support for your Radeon board. config FB_RADEON_BACKLIGHT bool "Support for backlight control" @@ -1357,10 +1349,10 @@ config FB_SAVAGE will be called savagefb. config FB_SAVAGE_I2C - bool "Enable DDC2 Support" - depends on FB_SAVAGE - select FB_DDC - help + bool "Enable DDC2 Support" + depends on FB_SAVAGE + select FB_DDC + help This enables I2C support for S3 Savage Chipsets. This is used only for getting EDID information from the attached display allowing for robust video mode handling and switching. @@ -1370,12 +1362,12 @@ config FB_SAVAGE_I2C here. config FB_SAVAGE_ACCEL - bool "Enable Console Acceleration" - depends on FB_SAVAGE - help - This option will compile in console acceleration support. If - the resulting framebuffer console has bothersome glitches, then - choose N here. + bool "Enable Console Acceleration" + depends on FB_SAVAGE + help + This option will compile in console acceleration support. If + the resulting framebuffer console has bothersome glitches, then + choose N here. config FB_SIS tristate "SiS/XGI display support" @@ -1408,17 +1400,17 @@ config FB_SIS_315 as XGI V3XT, V5, V8 and Z7. config FB_VIA - tristate "VIA UniChrome (Pro) and Chrome9 display support" - depends on FB && PCI && GPIOLIB && I2C && (X86 || COMPILE_TEST) - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - select I2C_ALGOBIT - help + tristate "VIA UniChrome (Pro) and Chrome9 display support" + depends on FB && PCI && GPIOLIB && I2C && (X86 || COMPILE_TEST) + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + select I2C_ALGOBIT + help This is the frame buffer device driver for Graphics chips of VIA UniChrome (Pro) Family (CLE266,PM800/CN400,P4M800CE/P4M800Pro/ CN700/VN800,CX700/VX700,P4M890) and Chrome9 Family (K8M890,CN896 - /P4M900,VX800) + /P4M900,VX800) Say Y if you have a VIA UniChrome graphics board. To compile this driver as a module, choose M here: the @@ -1455,7 +1447,7 @@ config FB_NEOMAGIC select VGASTATE help This driver supports notebooks with NeoMagic PCI chips. - Say Y if you have such a graphics card. + Say Y if you have such a graphics card. To compile this driver as a module, choose M here: the module will be called neofb. @@ -1510,7 +1502,7 @@ config FB_VOODOO1 select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT ---help--- - Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or + Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or Voodoo2 (cvg) based graphics card. To compile this driver as a module, choose M here: the @@ -1679,9 +1671,9 @@ config FB_HIT config FB_PMAG_AA tristate "PMAG-AA TURBOchannel framebuffer support" depends on FB && TC - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT help Support for the PMAG-AA TURBOchannel framebuffer card (1280x1024x1) used mainly in the MIPS-based DECstation series. @@ -1689,9 +1681,9 @@ config FB_PMAG_AA config FB_PMAG_BA tristate "PMAG-BA TURBOchannel framebuffer support" depends on FB && TC - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT help Support for the PMAG-BA TURBOchannel framebuffer card (1024x864x8) used mainly in the MIPS-based DECstation series. @@ -1699,9 +1691,9 @@ config FB_PMAG_BA config FB_PMAGB_B tristate "PMAGB-B TURBOchannel framebuffer support" depends on FB && TC - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT help Support for the PMAGB-B TURBOchannel framebuffer card used mainly in the MIPS-based DECstation series. The card is currently only @@ -1710,9 +1702,9 @@ config FB_PMAGB_B config FB_MAXINE bool "Maxine (Personal DECstation) onboard framebuffer support" depends on (FB = y) && MACH_DECSTATION - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT help Support for the onboard framebuffer (1024x768x8) in the Personal DECstation series (Personal DECstation 5000/20, /25, /33, /50, @@ -1721,9 +1713,9 @@ config FB_MAXINE config FB_G364 bool "G364 frame buffer support" depends on (FB = y) && (MIPS_MAGNUM_4000 || OLIVETTI_M700) - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT help The G364 driver is the framebuffer used in MIPS Magnum 4000 and Olivetti M700-10 systems. @@ -1731,9 +1723,9 @@ config FB_G364 config FB_68328 bool "Motorola 68328 native frame buffer support" depends on (FB = y) && (M68328 || M68EZ328 || M68VZ328) - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT help Say Y here if you want to support the built-in frame buffer of the Motorola 68328 CPU family. @@ -1812,13 +1804,13 @@ config FB_MBX Accelerator config FB_MBX_DEBUG - bool "Enable debugging info via debugfs" - depends on FB_MBX && DEBUG_FS - ---help--- - Enable this if you want debugging information using the debug - filesystem (debugfs) + bool "Enable debugging info via debugfs" + depends on FB_MBX && DEBUG_FS + ---help--- + Enable this if you want debugging information using the debug + filesystem (debugfs) - If unsure, say N. + If unsure, say N. config FB_FSL_DIU tristate "Freescale DIU framebuffer support" @@ -1834,9 +1826,9 @@ config FB_FSL_DIU config FB_W100 tristate "W100 frame buffer support" depends on FB && ARCH_PXA - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT ---help--- Frame buffer driver for the w100 as found on the Sharp SL-Cxx series. It can also drive the w3220 chip found on iPAQ hx4700. @@ -1901,10 +1893,10 @@ config FB_S3C Currently the support is only for the S3C6400 and S3C6410 SoCs. config FB_S3C_DEBUG_REGWRITE - bool "Debug register writes" - depends on FB_S3C - ---help--- - Show all register writes via pr_debug() + bool "Debug register writes" + depends on FB_S3C + ---help--- + Show all register writes via pr_debug() config FB_S3C2410 tristate "S3C2410 LCD framebuffer support" @@ -1930,18 +1922,18 @@ config FB_S3C2410_DEBUG through sysfs config FB_NUC900 - tristate "NUC900 LCD framebuffer support" - depends on FB && ARCH_W90X900 - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - ---help--- - Frame buffer driver for the built-in LCD controller in the Nuvoton - NUC900 processor + tristate "NUC900 LCD framebuffer support" + depends on FB && ARCH_W90X900 + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + ---help--- + Frame buffer driver for the built-in LCD controller in the Nuvoton + NUC900 processor config GPM1040A0_320X240 - bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD" - depends on FB_NUC900 + bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD" + depends on FB_NUC900 config FB_SM501 tristate "Silicon Motion SM501 framebuffer support" @@ -2183,7 +2175,7 @@ config FB_EP93XX config FB_PRE_INIT_FB bool "Don't reinitialize, use bootloader's GDC/Display configuration" - depends on FB && FB_MB862XX_LIME + depends on FB && (FB_MB862XX_LIME || FB_MXS) ---help--- Select this option if display contents should be inherited as set by the bootloader. diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile index 846b0c9ea9db..655f2537cac1 100644 --- a/drivers/video/fbdev/Makefile +++ b/drivers/video/fbdev/Makefile @@ -76,8 +76,6 @@ obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o obj-$(CONFIG_FB_PVR2) += pvr2fb.o obj-$(CONFIG_FB_VOODOO1) += sstfb.o obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o -obj-$(CONFIG_ARCH_NOMADIK) += amba-clcd-nomadik.o -obj-$(CONFIG_PLAT_VERSATILE_CLCD) += amba-clcd-versatile.o obj-$(CONFIG_FB_GOLDFISH) += goldfishfb.o obj-$(CONFIG_FB_68328) += 68328fb.o obj-$(CONFIG_FB_GBE) += gbefb.o diff --git a/drivers/video/fbdev/amba-clcd-nomadik.c b/drivers/video/fbdev/amba-clcd-nomadik.c deleted file mode 100644 index cd2db1113e67..000000000000 --- a/drivers/video/fbdev/amba-clcd-nomadik.c +++ /dev/null @@ -1,251 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "amba-clcd-nomadik.h" - -static struct gpio_desc *grestb; -static struct gpio_desc *scen; -static struct gpio_desc *scl; -static struct gpio_desc *sda; - -static u8 tpg110_readwrite_reg(bool write, u8 address, u8 outval) -{ - int i; - u8 inval = 0; - - /* Assert SCEN */ - gpiod_set_value_cansleep(scen, 1); - ndelay(150); - /* Hammer out the address */ - for (i = 5; i >= 0; i--) { - if (address & BIT(i)) - gpiod_set_value_cansleep(sda, 1); - else - gpiod_set_value_cansleep(sda, 0); - ndelay(150); - /* Send an SCL pulse */ - gpiod_set_value_cansleep(scl, 1); - ndelay(160); - gpiod_set_value_cansleep(scl, 0); - ndelay(160); - } - - if (write) { - /* WRITE */ - gpiod_set_value_cansleep(sda, 0); - } else { - /* READ */ - gpiod_set_value_cansleep(sda, 1); - } - ndelay(150); - /* Send an SCL pulse */ - gpiod_set_value_cansleep(scl, 1); - ndelay(160); - gpiod_set_value_cansleep(scl, 0); - ndelay(160); - - if (!write) - /* HiZ turn-around cycle */ - gpiod_direction_input(sda); - ndelay(150); - /* Send an SCL pulse */ - gpiod_set_value_cansleep(scl, 1); - ndelay(160); - gpiod_set_value_cansleep(scl, 0); - ndelay(160); - - /* Hammer in/out the data */ - for (i = 7; i >= 0; i--) { - int value; - - if (write) { - value = !!(outval & BIT(i)); - gpiod_set_value_cansleep(sda, value); - } else { - value = gpiod_get_value(sda); - if (value) - inval |= BIT(i); - } - ndelay(150); - /* Send an SCL pulse */ - gpiod_set_value_cansleep(scl, 1); - ndelay(160); - gpiod_set_value_cansleep(scl, 0); - ndelay(160); - } - - gpiod_direction_output(sda, 0); - /* Deassert SCEN */ - gpiod_set_value_cansleep(scen, 0); - /* Satisfies SCEN pulse width */ - udelay(1); - - return inval; -} - -static u8 tpg110_read_reg(u8 address) -{ - return tpg110_readwrite_reg(false, address, 0); -} - -static void tpg110_write_reg(u8 address, u8 outval) -{ - tpg110_readwrite_reg(true, address, outval); -} - -static void tpg110_startup(struct device *dev) -{ - u8 val; - - dev_info(dev, "TPG110 display enable\n"); - /* De-assert the reset signal */ - gpiod_set_value_cansleep(grestb, 0); - mdelay(1); - dev_info(dev, "de-asserted GRESTB\n"); - - /* Test display communication */ - tpg110_write_reg(0x00, 0x55); - val = tpg110_read_reg(0x00); - if (val == 0x55) - dev_info(dev, "passed communication test\n"); - val = tpg110_read_reg(0x01); - dev_info(dev, "TPG110 chip ID: %d version: %d\n", - val>>4, val&0x0f); - - /* Show display resolution */ - val = tpg110_read_reg(0x02); - val &= 7; - switch (val) { - case 0x0: - dev_info(dev, "IN 400x240 RGB -> OUT 800x480 RGB (dual scan)"); - break; - case 0x1: - dev_info(dev, "IN 480x272 RGB -> OUT 800x480 RGB (dual scan)"); - break; - case 0x4: - dev_info(dev, "480x640 RGB"); - break; - case 0x5: - dev_info(dev, "480x272 RGB"); - break; - case 0x6: - dev_info(dev, "640x480 RGB"); - break; - case 0x7: - dev_info(dev, "800x480 RGB"); - break; - default: - dev_info(dev, "ILLEGAL RESOLUTION"); - break; - } - - val = tpg110_read_reg(0x03); - dev_info(dev, "resolution is controlled by %s\n", - (val & BIT(7)) ? "software" : "hardware"); -} - -static void tpg110_enable(struct clcd_fb *fb) -{ - struct device *dev = &fb->dev->dev; - static bool startup; - u8 val; - - if (!startup) { - tpg110_startup(dev); - startup = true; - } - - /* Take chip out of standby */ - val = tpg110_read_reg(0x03); - val |= BIT(0); - tpg110_write_reg(0x03, val); -} - -static void tpg110_disable(struct clcd_fb *fb) -{ - u8 val; - - dev_info(&fb->dev->dev, "TPG110 display disable\n"); - val = tpg110_read_reg(0x03); - /* Put into standby */ - val &= ~BIT(0); - tpg110_write_reg(0x03, val); -} - -static void tpg110_init(struct device *dev, struct device_node *np, - struct clcd_board *board) -{ - dev_info(dev, "TPG110 display init\n"); - - /* This asserts the GRESTB signal, putting the display into reset */ - grestb = devm_fwnode_get_gpiod_from_child(dev, "grestb", &np->fwnode, - GPIOD_OUT_HIGH, "grestb"); - if (IS_ERR(grestb)) { - dev_err(dev, "no GRESTB GPIO\n"); - return; - } - scen = devm_fwnode_get_gpiod_from_child(dev, "scen", &np->fwnode, - GPIOD_OUT_LOW, "scen"); - if (IS_ERR(scen)) { - dev_err(dev, "no SCEN GPIO\n"); - return; - } - scl = devm_fwnode_get_gpiod_from_child(dev, "scl", &np->fwnode, - GPIOD_OUT_LOW, "scl"); - if (IS_ERR(scl)) { - dev_err(dev, "no SCL GPIO\n"); - return; - } - sda = devm_fwnode_get_gpiod_from_child(dev, "sda", &np->fwnode, - GPIOD_OUT_LOW, "sda"); - if (IS_ERR(sda)) { - dev_err(dev, "no SDA GPIO\n"); - return; - } - board->enable = tpg110_enable; - board->disable = tpg110_disable; -} - -int nomadik_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel) -{ - if (of_device_is_compatible(panel, "tpo,tpg110")) - tpg110_init(&fb->dev->dev, panel, fb->board); - else - dev_info(&fb->dev->dev, "unknown panel\n"); - - /* Unknown panel, fall through */ - return 0; -} -EXPORT_SYMBOL_GPL(nomadik_clcd_init_panel); - -#define PMU_CTRL_OFFSET 0x0000 -#define PMU_CTRL_LCDNDIF BIT(26) - -int nomadik_clcd_init_board(struct amba_device *adev, - struct clcd_board *board) -{ - struct regmap *pmu_regmap; - - dev_info(&adev->dev, "Nomadik CLCD board init\n"); - pmu_regmap = - syscon_regmap_lookup_by_compatible("stericsson,nomadik-pmu"); - if (IS_ERR(pmu_regmap)) { - dev_err(&adev->dev, "could not find PMU syscon regmap\n"); - return PTR_ERR(pmu_regmap); - } - regmap_update_bits(pmu_regmap, - PMU_CTRL_OFFSET, - PMU_CTRL_LCDNDIF, - 0); - dev_info(&adev->dev, "set PMU mux to CLCD mode\n"); - - return 0; -} -EXPORT_SYMBOL_GPL(nomadik_clcd_init_board); diff --git a/drivers/video/fbdev/amba-clcd-nomadik.h b/drivers/video/fbdev/amba-clcd-nomadik.h deleted file mode 100644 index 462c31381fa1..000000000000 --- a/drivers/video/fbdev/amba-clcd-nomadik.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _AMBA_CLCD_NOMADIK_H -#define _AMBA_CLCD_NOMADIK_H - -#include - -#ifdef CONFIG_ARCH_NOMADIK -int nomadik_clcd_init_board(struct amba_device *adev, - struct clcd_board *board); -int nomadik_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel); -#else -static inline int nomadik_clcd_init_board(struct amba_device *adev, - struct clcd_board *board) -{ - return 0; -} -static inline int nomadik_clcd_init_panel(struct clcd_fb *fb, - struct device_node *panel) -{ - return 0; -} -#endif - -#endif /* inclusion guard */ diff --git a/drivers/video/fbdev/amba-clcd-versatile.c b/drivers/video/fbdev/amba-clcd-versatile.c deleted file mode 100644 index d42047dc4e4e..000000000000 --- a/drivers/video/fbdev/amba-clcd-versatile.c +++ /dev/null @@ -1,567 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "amba-clcd-versatile.h" - -static struct clcd_panel vga = { - .mode = { - .name = "VGA", - .refresh = 60, - .xres = 640, - .yres = 480, - .pixclock = 39721, - .left_margin = 40, - .right_margin = 24, - .upper_margin = 32, - .lower_margin = 11, - .hsync_len = 96, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888, - .bpp = 16, -}; - -static struct clcd_panel xvga = { - .mode = { - .name = "XVGA", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15748, - .left_margin = 152, - .right_margin = 48, - .upper_margin = 23, - .lower_margin = 3, - .hsync_len = 104, - .vsync_len = 4, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888, - .bpp = 16, -}; - -/* Sanyo TM38QV67A02A - 3.8 inch QVGA (320x240) Color TFT */ -static struct clcd_panel sanyo_tm38qv67a02a = { - .mode = { - .name = "Sanyo TM38QV67A02A", - .refresh = 116, - .xres = 320, - .yres = 240, - .pixclock = 100000, - .left_margin = 6, - .right_margin = 6, - .upper_margin = 5, - .lower_margin = 5, - .hsync_len = 6, - .vsync_len = 6, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .caps = CLCD_CAP_5551, - .bpp = 16, -}; - -static struct clcd_panel sanyo_2_5_in = { - .mode = { - .name = "Sanyo QVGA Portrait", - .refresh = 116, - .xres = 240, - .yres = 320, - .pixclock = 100000, - .left_margin = 20, - .right_margin = 10, - .upper_margin = 2, - .lower_margin = 2, - .hsync_len = 10, - .vsync_len = 2, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .caps = CLCD_CAP_5551, - .bpp = 16, -}; - -/* Epson L2F50113T00 - 2.2 inch 176x220 Color TFT */ -static struct clcd_panel epson_l2f50113t00 = { - .mode = { - .name = "Epson L2F50113T00", - .refresh = 390, - .xres = 176, - .yres = 220, - .pixclock = 62500, - .left_margin = 3, - .right_margin = 2, - .upper_margin = 1, - .lower_margin = 0, - .hsync_len = 3, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .caps = CLCD_CAP_5551, - .bpp = 16, -}; - -static struct clcd_panel *panels[] = { - &vga, - &xvga, - &sanyo_tm38qv67a02a, - &sanyo_2_5_in, - &epson_l2f50113t00, -}; - -struct clcd_panel *versatile_clcd_get_panel(const char *name) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(panels); i++) - if (strcmp(panels[i]->mode.name, name) == 0) - break; - - if (i < ARRAY_SIZE(panels)) - return panels[i]; - - pr_err("CLCD: couldn't get parameters for panel %s\n", name); - - return NULL; -} - -int versatile_clcd_setup_dma(struct clcd_fb *fb, unsigned long framesize) -{ - dma_addr_t dma; - - fb->fb.screen_base = dma_alloc_wc(&fb->dev->dev, framesize, &dma, - GFP_KERNEL); - if (!fb->fb.screen_base) { - pr_err("CLCD: unable to map framebuffer\n"); - return -ENOMEM; - } - - fb->fb.fix.smem_start = dma; - fb->fb.fix.smem_len = framesize; - - return 0; -} - -int versatile_clcd_mmap_dma(struct clcd_fb *fb, struct vm_area_struct *vma) -{ - return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base, - fb->fb.fix.smem_start, fb->fb.fix.smem_len); -} - -void versatile_clcd_remove_dma(struct clcd_fb *fb) -{ - dma_free_wc(&fb->dev->dev, fb->fb.fix.smem_len, fb->fb.screen_base, - fb->fb.fix.smem_start); -} - -#ifdef CONFIG_OF - -static struct regmap *versatile_syscon_map; -static struct regmap *versatile_ib2_map; - -/* - * We detect the different syscon types from the compatible strings. - */ -enum versatile_clcd { - INTEGRATOR_CLCD_CM, - VERSATILE_CLCD, - REALVIEW_CLCD_EB, - REALVIEW_CLCD_PB1176, - REALVIEW_CLCD_PB11MP, - REALVIEW_CLCD_PBA8, - REALVIEW_CLCD_PBX, -}; - -static const struct of_device_id versatile_clcd_of_match[] = { - { - .compatible = "arm,core-module-integrator", - .data = (void *)INTEGRATOR_CLCD_CM, - }, - { - .compatible = "arm,versatile-sysreg", - .data = (void *)VERSATILE_CLCD, - }, - { - .compatible = "arm,realview-eb-syscon", - .data = (void *)REALVIEW_CLCD_EB, - }, - { - .compatible = "arm,realview-pb1176-syscon", - .data = (void *)REALVIEW_CLCD_PB1176, - }, - { - .compatible = "arm,realview-pb11mp-syscon", - .data = (void *)REALVIEW_CLCD_PB11MP, - }, - { - .compatible = "arm,realview-pba8-syscon", - .data = (void *)REALVIEW_CLCD_PBA8, - }, - { - .compatible = "arm,realview-pbx-syscon", - .data = (void *)REALVIEW_CLCD_PBX, - }, - {}, -}; - -/* - * Core module CLCD control on the Integrator/CP, bits - * 8 thru 19 of the CM_CONTROL register controls a bunch - * of CLCD settings. - */ -#define INTEGRATOR_HDR_CTRL_OFFSET 0x0C -#define INTEGRATOR_CLCD_LCDBIASEN BIT(8) -#define INTEGRATOR_CLCD_LCDBIASUP BIT(9) -#define INTEGRATOR_CLCD_LCDBIASDN BIT(10) -/* Bits 11,12,13 controls the LCD type */ -#define INTEGRATOR_CLCD_LCDMUX_MASK (BIT(11)|BIT(12)|BIT(13)) -#define INTEGRATOR_CLCD_LCDMUX_LCD24 BIT(11) -#define INTEGRATOR_CLCD_LCDMUX_VGA565 BIT(12) -#define INTEGRATOR_CLCD_LCDMUX_SHARP (BIT(11)|BIT(12)) -#define INTEGRATOR_CLCD_LCDMUX_VGA555 BIT(13) -#define INTEGRATOR_CLCD_LCDMUX_VGA24 (BIT(11)|BIT(12)|BIT(13)) -#define INTEGRATOR_CLCD_LCD0_EN BIT(14) -#define INTEGRATOR_CLCD_LCD1_EN BIT(15) -/* R/L flip on Sharp */ -#define INTEGRATOR_CLCD_LCD_STATIC1 BIT(16) -/* U/D flip on Sharp */ -#define INTEGRATOR_CLCD_LCD_STATIC2 BIT(17) -/* No connection on Sharp */ -#define INTEGRATOR_CLCD_LCD_STATIC BIT(18) -/* 0 = 24bit VGA, 1 = 18bit VGA */ -#define INTEGRATOR_CLCD_LCD_N24BITEN BIT(19) - -#define INTEGRATOR_CLCD_MASK (INTEGRATOR_CLCD_LCDBIASEN | \ - INTEGRATOR_CLCD_LCDBIASUP | \ - INTEGRATOR_CLCD_LCDBIASDN | \ - INTEGRATOR_CLCD_LCDMUX_MASK | \ - INTEGRATOR_CLCD_LCD0_EN | \ - INTEGRATOR_CLCD_LCD1_EN | \ - INTEGRATOR_CLCD_LCD_STATIC1 | \ - INTEGRATOR_CLCD_LCD_STATIC2 | \ - INTEGRATOR_CLCD_LCD_STATIC | \ - INTEGRATOR_CLCD_LCD_N24BITEN) - -static void integrator_clcd_enable(struct clcd_fb *fb) -{ - struct fb_var_screeninfo *var = &fb->fb.var; - u32 val; - - dev_info(&fb->dev->dev, "enable Integrator CLCD connectors\n"); - - /* FIXME: really needed? */ - val = INTEGRATOR_CLCD_LCD_STATIC1 | INTEGRATOR_CLCD_LCD_STATIC2 | - INTEGRATOR_CLCD_LCD0_EN | INTEGRATOR_CLCD_LCD1_EN; - if (var->bits_per_pixel <= 8 || - (var->bits_per_pixel == 16 && var->green.length == 5)) - /* Pseudocolor, RGB555, BGR555 */ - val |= INTEGRATOR_CLCD_LCDMUX_VGA555; - else if (fb->fb.var.bits_per_pixel <= 16) - /* truecolor RGB565 */ - val |= INTEGRATOR_CLCD_LCDMUX_VGA565; - else - val = 0; /* no idea for this, don't trust the docs */ - - regmap_update_bits(versatile_syscon_map, - INTEGRATOR_HDR_CTRL_OFFSET, - INTEGRATOR_CLCD_MASK, - val); -} - -/* - * This configuration register in the Versatile and RealView - * family is uniformly present but appears more and more - * unutilized starting with the RealView series. - */ -#define SYS_CLCD 0x50 -#define SYS_CLCD_MODE_MASK (BIT(0)|BIT(1)) -#define SYS_CLCD_MODE_888 0 -#define SYS_CLCD_MODE_5551 BIT(0) -#define SYS_CLCD_MODE_565_R_LSB BIT(1) -#define SYS_CLCD_MODE_565_B_LSB (BIT(0)|BIT(1)) -#define SYS_CLCD_CONNECTOR_MASK (BIT(2)|BIT(3)|BIT(4)|BIT(5)) -#define SYS_CLCD_NLCDIOON BIT(2) -#define SYS_CLCD_VDDPOSSWITCH BIT(3) -#define SYS_CLCD_PWR3V5SWITCH BIT(4) -#define SYS_CLCD_VDDNEGSWITCH BIT(5) -#define SYS_CLCD_TSNSS BIT(6) /* touchscreen enable */ -#define SYS_CLCD_SSPEXP BIT(7) /* SSP expansion enable */ - -/* The Versatile can detect the connected panel type */ -#define SYS_CLCD_CLCDID_MASK (BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)) -#define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8) -#define SYS_CLCD_ID_SHARP_8_4 (0x01 << 8) -#define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8) -#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) -#define SYS_CLCD_ID_VGA (0x1f << 8) - -#define SYS_CLCD_TSNDAV BIT(13) /* data ready from TS */ - -/* IB2 control register for the Versatile daughterboard */ -#define IB2_CTRL 0x00 -#define IB2_CTRL_LCD_SD BIT(1) /* 1 = shut down LCD */ -#define IB2_CTRL_LCD_BL_ON BIT(0) -#define IB2_CTRL_LCD_MASK (BIT(0)|BIT(1)) - -static void versatile_clcd_disable(struct clcd_fb *fb) -{ - dev_info(&fb->dev->dev, "disable Versatile CLCD connectors\n"); - regmap_update_bits(versatile_syscon_map, - SYS_CLCD, - SYS_CLCD_CONNECTOR_MASK, - 0); - - /* If we're on an IB2 daughterboard, turn off display */ - if (versatile_ib2_map) { - dev_info(&fb->dev->dev, "disable IB2 display\n"); - regmap_update_bits(versatile_ib2_map, - IB2_CTRL, - IB2_CTRL_LCD_MASK, - IB2_CTRL_LCD_SD); - } -} - -static void versatile_clcd_enable(struct clcd_fb *fb) -{ - struct fb_var_screeninfo *var = &fb->fb.var; - u32 val = 0; - - dev_info(&fb->dev->dev, "enable Versatile CLCD connectors\n"); - switch (var->green.length) { - case 5: - val |= SYS_CLCD_MODE_5551; - break; - case 6: - if (var->red.offset == 0) - val |= SYS_CLCD_MODE_565_R_LSB; - else - val |= SYS_CLCD_MODE_565_B_LSB; - break; - case 8: - val |= SYS_CLCD_MODE_888; - break; - } - - /* Set up the MUX */ - regmap_update_bits(versatile_syscon_map, - SYS_CLCD, - SYS_CLCD_MODE_MASK, - val); - - /* Then enable the display */ - regmap_update_bits(versatile_syscon_map, - SYS_CLCD, - SYS_CLCD_CONNECTOR_MASK, - SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH); - - /* If we're on an IB2 daughterboard, turn on display */ - if (versatile_ib2_map) { - dev_info(&fb->dev->dev, "enable IB2 display\n"); - regmap_update_bits(versatile_ib2_map, - IB2_CTRL, - IB2_CTRL_LCD_MASK, - IB2_CTRL_LCD_BL_ON); - } -} - -static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs) -{ - clcdfb_decode(fb, regs); - - /* Always clear BGR for RGB565: we do the routing externally */ - if (fb->fb.var.green.length == 6) - regs->cntl &= ~CNTL_BGR; -} - -static void realview_clcd_disable(struct clcd_fb *fb) -{ - dev_info(&fb->dev->dev, "disable RealView CLCD connectors\n"); - regmap_update_bits(versatile_syscon_map, - SYS_CLCD, - SYS_CLCD_CONNECTOR_MASK, - 0); -} - -static void realview_clcd_enable(struct clcd_fb *fb) -{ - dev_info(&fb->dev->dev, "enable RealView CLCD connectors\n"); - regmap_update_bits(versatile_syscon_map, - SYS_CLCD, - SYS_CLCD_CONNECTOR_MASK, - SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH); -} - -struct versatile_panel { - u32 id; - char *compatible; - bool ib2; -}; - -static const struct versatile_panel versatile_panels[] = { - { - .id = SYS_CLCD_ID_VGA, - .compatible = "VGA", - }, - { - .id = SYS_CLCD_ID_SANYO_3_8, - .compatible = "sanyo,tm38qv67a02a", - }, - { - .id = SYS_CLCD_ID_SHARP_8_4, - .compatible = "sharp,lq084v1dg21", - }, - { - .id = SYS_CLCD_ID_EPSON_2_2, - .compatible = "epson,l2f50113t00", - }, - { - .id = SYS_CLCD_ID_SANYO_2_5, - .compatible = "sanyo,alr252rgt", - .ib2 = true, - }, -}; - -static void versatile_panel_probe(struct device *dev, struct device_node *panel) -{ - struct versatile_panel const *vpanel = NULL; - u32 val; - int ret; - int i; - - /* - * The Versatile CLCD has a panel auto-detection mechanism. - * We use this and look for the compatible panel in the - * device tree. - */ - ret = regmap_read(versatile_syscon_map, SYS_CLCD, &val); - if (ret) { - dev_err(dev, "cannot read CLCD syscon register\n"); - return; - } - val &= SYS_CLCD_CLCDID_MASK; - - /* First find corresponding panel information */ - for (i = 0; i < ARRAY_SIZE(versatile_panels); i++) { - vpanel = &versatile_panels[i]; - - if (val == vpanel->id) { - dev_err(dev, "autodetected panel \"%s\"\n", - vpanel->compatible); - break; - } - } - if (i == ARRAY_SIZE(versatile_panels)) { - dev_err(dev, "could not auto-detect panel\n"); - return; - } - - if (!of_device_is_compatible(panel, vpanel->compatible)) - dev_err(dev, "panel in DT is not compatible with the " - "auto-detected panel, continuing anyway\n"); - - /* - * If we have a Sanyo 2.5" port - * that we're running on an IB2 and proceed to look for the - * IB2 syscon regmap. - */ - if (!vpanel->ib2) - return; - - versatile_ib2_map = syscon_regmap_lookup_by_compatible( - "arm,versatile-ib2-syscon"); - if (IS_ERR(versatile_ib2_map)) { - dev_err(dev, "could not locate IB2 control register\n"); - versatile_ib2_map = NULL; - return; - } -} - -int versatile_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel) -{ - const struct of_device_id *clcd_id; - enum versatile_clcd versatile_clcd_type; - struct device_node *np; - struct regmap *map; - struct device *dev = &fb->dev->dev; - - np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match, - &clcd_id); - if (!np) { - /* Vexpress does not have this */ - return 0; - } - versatile_clcd_type = (enum versatile_clcd)clcd_id->data; - - map = syscon_node_to_regmap(np); - if (IS_ERR(map)) { - dev_err(dev, "no Versatile syscon regmap\n"); - return PTR_ERR(map); - } - - switch (versatile_clcd_type) { - case INTEGRATOR_CLCD_CM: - versatile_syscon_map = map; - fb->board->enable = integrator_clcd_enable; - /* Override the caps, we have only these */ - fb->board->caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | - CLCD_CAP_888; - dev_info(dev, "set up callbacks for Integrator PL110\n"); - break; - case VERSATILE_CLCD: - versatile_syscon_map = map; - fb->board->enable = versatile_clcd_enable; - fb->board->disable = versatile_clcd_disable; - fb->board->decode = versatile_clcd_decode; - versatile_panel_probe(dev, panel); - dev_info(dev, "set up callbacks for Versatile\n"); - break; - case REALVIEW_CLCD_EB: - case REALVIEW_CLCD_PB1176: - case REALVIEW_CLCD_PB11MP: - case REALVIEW_CLCD_PBA8: - case REALVIEW_CLCD_PBX: - versatile_syscon_map = map; - fb->board->enable = realview_clcd_enable; - fb->board->disable = realview_clcd_disable; - dev_info(dev, "set up callbacks for RealView PL111\n"); - break; - default: - dev_info(dev, "unknown Versatile system controller\n"); - break; - } - - return 0; -} -EXPORT_SYMBOL_GPL(versatile_clcd_init_panel); -#endif diff --git a/drivers/video/fbdev/amba-clcd-versatile.h b/drivers/video/fbdev/amba-clcd-versatile.h deleted file mode 100644 index b20baa47e6ad..000000000000 --- a/drivers/video/fbdev/amba-clcd-versatile.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Special local versatile callbacks - */ -#include -#include -#include - -#if defined(CONFIG_PLAT_VERSATILE_CLCD) && defined(CONFIG_OF) -int versatile_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel); -#else -static inline int versatile_clcd_init_panel(struct clcd_fb *fb, - struct device_node *panel) -{ - return 0; -} -#endif diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c index 38c1f324ce15..89324e42a033 100644 --- a/drivers/video/fbdev/amba-clcd.c +++ b/drivers/video/fbdev/amba-clcd.c @@ -30,9 +30,6 @@ #include