Merge branch 'master'

This commit is contained in:
Jeff Garzik
2005-12-01 01:53:40 -05:00
112 changed files with 1134 additions and 645 deletions
+7
View File
@@ -5,6 +5,13 @@
menu "ATM drivers"
depends on NETDEVICES && ATM
config ATM_DUMMY
tristate "Dummy ATM driver"
depends on ATM
help
Dummy ATM driver. Useful for proxy signalling, testing,
and development. If unsure, say N.
config ATM_TCP
tristate "ATM over TCP"
depends on INET && ATM
+1
View File
@@ -31,6 +31,7 @@ ifeq ($(CONFIG_ATM_IDT77252_USE_SUNI),y)
obj-$(CONFIG_ATM_IDT77252) += suni.o
endif
obj-$(CONFIG_ATM_DUMMY) += adummy.o
obj-$(CONFIG_ATM_TCP) += atmtcp.o
obj-$(CONFIG_ATM_FIRESTREAM) += firestream.o
obj-$(CONFIG_ATM_LANAI) += lanai.o
+168
View File
@@ -0,0 +1,168 @@
/*
* adummy.c: a dummy ATM driver
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/skbuff.h>
#include <linux/pci.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <asm/io.h>
#include <asm/byteorder.h>
#include <asm/uaccess.h>
#include <linux/atmdev.h>
#include <linux/atm.h>
#include <linux/sonet.h>
/* version definition */
#define DRV_VERSION "1.0"
#define DEV_LABEL "adummy"
#define ADUMMY_DEV(dev) ((struct adummy_dev *) (dev)->dev_data)
struct adummy_dev {
struct atm_dev *atm_dev;
struct list_head entry;
};
/* globals */
static LIST_HEAD(adummy_devs);
static int __init
adummy_start(struct atm_dev *dev)
{
dev->ci_range.vpi_bits = 4;
dev->ci_range.vci_bits = 12;
return 0;
}
static int
adummy_open(struct atm_vcc *vcc)
{
short vpi = vcc->vpi;
int vci = vcc->vci;
if (vci == ATM_VCI_UNSPEC || vpi == ATM_VPI_UNSPEC)
return 0;
set_bit(ATM_VF_ADDR, &vcc->flags);
set_bit(ATM_VF_READY, &vcc->flags);
return 0;
}
static void
adummy_close(struct atm_vcc *vcc)
{
clear_bit(ATM_VF_READY, &vcc->flags);
clear_bit(ATM_VF_ADDR, &vcc->flags);
}
static int
adummy_send(struct atm_vcc *vcc, struct sk_buff *skb)
{
if (vcc->pop)
vcc->pop(vcc, skb);
else
dev_kfree_skb_any(skb);
atomic_inc(&vcc->stats->tx);
return 0;
}
static int
adummy_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
{
int left = *pos;
if (!left--)
return sprintf(page, "version %s\n", DRV_VERSION);
return 0;
}
static struct atmdev_ops adummy_ops =
{
.open = adummy_open,
.close = adummy_close,
.send = adummy_send,
.proc_read = adummy_proc_read,
.owner = THIS_MODULE
};
static int __init adummy_init(void)
{
struct atm_dev *atm_dev;
struct adummy_dev *adummy_dev;
int err = 0;
printk(KERN_ERR "adummy: version %s\n", DRV_VERSION);
adummy_dev = (struct adummy_dev *) kmalloc(sizeof(struct adummy_dev),
GFP_KERNEL);
if (!adummy_dev) {
printk(KERN_ERR DEV_LABEL ": kmalloc() failed\n");
err = -ENOMEM;
goto out;
}
memset(adummy_dev, 0, sizeof(struct adummy_dev));
atm_dev = atm_dev_register(DEV_LABEL, &adummy_ops, -1, 0);
if (!atm_dev) {
printk(KERN_ERR DEV_LABEL ": atm_dev_register() failed\n");
err = -ENODEV;
goto out_kfree;
}
adummy_dev->atm_dev = atm_dev;
atm_dev->dev_data = adummy_dev;
if (adummy_start(atm_dev)) {
printk(KERN_ERR DEV_LABEL ": adummy_start() failed\n");
err = -ENODEV;
goto out_unregister;
}
list_add(&adummy_dev->entry, &adummy_devs);
out:
return err;
out_unregister:
atm_dev_deregister(atm_dev);
out_kfree:
kfree(adummy_dev);
goto out;
}
static void __exit adummy_cleanup(void)
{
struct adummy_dev *adummy_dev, *next;
list_for_each_entry_safe(adummy_dev, next, &adummy_devs, entry) {
atm_dev_deregister(adummy_dev->atm_dev);
kfree(adummy_dev);
}
}
module_init(adummy_init);
module_exit(adummy_cleanup);
MODULE_AUTHOR("chas williams <chas@cmf.nrl.navy.mil>");
MODULE_DESCRIPTION("dummy ATM driver");
MODULE_LICENSE("GPL");
-54
View File
@@ -1,54 +0,0 @@
/* drivers/atm/atmdev_init.c - ATM device driver initialization */
/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
#include <linux/config.h>
#include <linux/init.h>
#ifdef CONFIG_ATM_ZATM
extern int zatm_detect(void);
#endif
#ifdef CONFIG_ATM_AMBASSADOR
extern int amb_detect(void);
#endif
#ifdef CONFIG_ATM_HORIZON
extern int hrz_detect(void);
#endif
#ifdef CONFIG_ATM_FORE200E
extern int fore200e_detect(void);
#endif
#ifdef CONFIG_ATM_LANAI
extern int lanai_detect(void);
#endif
/*
* For historical reasons, atmdev_init returns the number of devices found.
* Note that some detections may not go via atmdev_init (e.g. eni.c), so this
* number is meaningless.
*/
int __init atmdev_init(void)
{
int devs;
devs = 0;
#ifdef CONFIG_ATM_ZATM
devs += zatm_detect();
#endif
#ifdef CONFIG_ATM_AMBASSADOR
devs += amb_detect();
#endif
#ifdef CONFIG_ATM_HORIZON
devs += hrz_detect();
#endif
#ifdef CONFIG_ATM_FORE200E
devs += fore200e_detect();
#endif
#ifdef CONFIG_ATM_LANAI
devs += lanai_detect();
#endif
return devs;
}
+2 -18
View File
@@ -246,10 +246,6 @@ static void atmtcp_c_close(struct atm_vcc *vcc)
{
struct atm_dev *atmtcp_dev;
struct atmtcp_dev_data *dev_data;
struct sock *s;
struct hlist_node *node;
struct atm_vcc *walk;
int i;
atmtcp_dev = (struct atm_dev *) vcc->dev_data;
dev_data = PRIV(atmtcp_dev);
@@ -257,20 +253,8 @@ static void atmtcp_c_close(struct atm_vcc *vcc)
if (dev_data->persist) return;
atmtcp_dev->dev_data = NULL;
kfree(dev_data);
shutdown_atm_dev(atmtcp_dev);
atm_dev_deregister(atmtcp_dev);
vcc->dev_data = NULL;
read_lock(&vcc_sklist_lock);
for(i = 0; i < VCC_HTABLE_SIZE; ++i) {
struct hlist_head *head = &vcc_hash[i];
sk_for_each(s, node, head) {
walk = atm_sk(s);
if (walk->dev != atmtcp_dev)
continue;
wake_up(s->sk_sleep);
}
}
read_unlock(&vcc_sklist_lock);
module_put(THIS_MODULE);
}
@@ -450,7 +434,7 @@ static int atmtcp_remove_persistent(int itf)
if (PRIV(dev)->vcc) return 0;
kfree(dev_data);
atm_dev_put(dev);
shutdown_atm_dev(dev);
atm_dev_deregister(dev);
return 0;
}
+8 -94
View File
@@ -39,7 +39,7 @@
* o lanai_change_qos() isn't written yet
*
* o There aren't any ioctl's yet -- I'd like to eventually support
* setting loopback and LED modes that way. (see lanai_ioctl)
* setting loopback and LED modes that way.
*
* o If the segmentation engine or DMA gets shut down we should restart
* card as per section 17.0i. (see lanai_reset)
@@ -305,7 +305,7 @@ struct lanai_dev {
* vci with their bit set
*/
static void vci_bitfield_iterate(struct lanai_dev *lanai,
/*const*/ unsigned long *lp,
const unsigned long *lp,
void (*func)(struct lanai_dev *,vci_t vci))
{
vci_t vci = find_first_bit(lp, NUM_VCI);
@@ -951,7 +951,7 @@ static int __devinit eeprom_read(struct lanai_dev *lanai)
/* read a big-endian 4-byte value out of eeprom */
static inline u32 eeprom_be4(const struct lanai_dev *lanai, int address)
{
return be32_to_cpup((u32 *) (&lanai->eeprom[address]));
return be32_to_cpup((const u32 *) &lanai->eeprom[address]);
}
/* Checksum/validate EEPROM contents */
@@ -1160,7 +1160,7 @@ static inline int vcc_tx_space(const struct lanai_vcc *lvcc, int endptr)
}
/* test if VCC is currently backlogged */
static inline int vcc_is_backlogged(/*const*/ struct lanai_vcc *lvcc)
static inline int vcc_is_backlogged(const struct lanai_vcc *lvcc)
{
return !skb_queue_empty(&lvcc->tx.backlog);
}
@@ -1395,7 +1395,8 @@ static void vcc_rx_aal5(struct lanai_vcc *lvcc, int endptr)
{
int size;
struct sk_buff *skb;
/*const*/ u32 *x, *end = &lvcc->rx.buf.start[endptr * 4];
const u32 *x;
u32 *end = &lvcc->rx.buf.start[endptr * 4];
int n = ((unsigned long) end) - ((unsigned long) lvcc->rx.buf.ptr);
if (n < 0)
n += lanai_buf_size(&lvcc->rx.buf);
@@ -2111,7 +2112,7 @@ static int lanai_normalize_ci(struct lanai_dev *lanai,
* shifted by that much as we compute
*
*/
static int pcr_to_cbricg(/*const*/ struct atm_qos *qos)
static int pcr_to_cbricg(const struct atm_qos *qos)
{
int rounddown = 0; /* 1 = Round PCR down, i.e. round ICG _up_ */
int x, icg, pcr = atm_pcr_goal(&qos->txtp);
@@ -2434,93 +2435,6 @@ static int lanai_open(struct atm_vcc *atmvcc)
return result;
}
#if 0
/* ioctl operations for card */
/* NOTE: these are all DEBUGGING ONLY currently */
static int lanai_ioctl(struct atm_dev *atmdev, unsigned int cmd, void __user *arg)
{
int result = 0;
struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
switch(cmd) {
case 2106275:
shutdown_atm_dev(atmdev);
return 0;
case 2200000: {
unsigned long flags;
spin_lock_irqsave(&lanai->servicelock, flags);
run_service(lanai);
spin_unlock_irqrestore(&lanai->servicelock, flags);
return 0; }
case 2200002:
get_statistics(lanai);
return 0;
case 2200003: {
unsigned int i;
for (i = 0; i <= 0x5C ; i += 4) {
if (i==0x48) /* Write-only butt reg */
continue;
printk(KERN_CRIT DEV_LABEL " 0x%02X: "
"0x%08X\n", i,
(unsigned int) readl(lanai->base + i));
barrier(); mb();
pcistatus_check(lanai, 0);
barrier(); mb();
}
return 0; }
case 2200004: {
u8 b;
u16 w;
u32 dw;
struct pci_dev *pci = lanai->pci;
(void) pci_read_config_word(pci, PCI_VENDOR_ID, &w);
DPRINTK("vendor = 0x%X\n", (unsigned int) w);
(void) pci_read_config_word(pci, PCI_DEVICE_ID, &w);
DPRINTK("device = 0x%X\n", (unsigned int) w);
(void) pci_read_config_word(pci, PCI_COMMAND, &w);
DPRINTK("command = 0x%X\n", (unsigned int) w);
(void) pci_read_config_word(pci, PCI_STATUS, &w);
DPRINTK("status = 0x%X\n", (unsigned int) w);
(void) pci_read_config_dword(pci,
PCI_CLASS_REVISION, &dw);
DPRINTK("class/revision = 0x%X\n", (unsigned int) dw);
(void) pci_read_config_byte(pci,
PCI_CACHE_LINE_SIZE, &b);
DPRINTK("cache line size = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_LATENCY_TIMER, &b);
DPRINTK("latency = %d (0x%X)\n",
(int) b, (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_HEADER_TYPE, &b);
DPRINTK("header type = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_BIST, &b);
DPRINTK("bist = 0x%X\n", (unsigned int) b);
/* skipping a few here */
(void) pci_read_config_byte(pci,
PCI_INTERRUPT_LINE, &b);
DPRINTK("pci_int_line = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci,
PCI_INTERRUPT_PIN, &b);
DPRINTK("pci_int_pin = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_MIN_GNT, &b);
DPRINTK("min_gnt = 0x%X\n", (unsigned int) b);
(void) pci_read_config_byte(pci, PCI_MAX_LAT, &b);
DPRINTK("max_lat = 0x%X\n", (unsigned int) b); }
return 0;
#ifdef USE_POWERDOWN
case 2200005:
DPRINTK("Coming out of powerdown\n");
lanai->conf1 &= ~CONFIG1_POWERDOWN;
conf1_write(lanai);
return 0;
#endif
default:
result = -ENOIOCTLCMD;
}
return result;
}
#else /* !0 */
#define lanai_ioctl NULL
#endif /* 0 */
static int lanai_send(struct atm_vcc *atmvcc, struct sk_buff *skb)
{
struct lanai_vcc *lvcc = (struct lanai_vcc *) atmvcc->dev_data;
@@ -2678,7 +2592,6 @@ static const struct atmdev_ops ops = {
.dev_close = lanai_dev_close,
.open = lanai_open,
.close = lanai_close,
.ioctl = lanai_ioctl,
.getsockopt = NULL,
.setsockopt = NULL,
.send = lanai_send,
@@ -2760,6 +2673,7 @@ static void __exit lanai_module_exit(void)
* gone, so there isn't much to do
*/
DPRINTK("cleanup_module()\n");
pci_unregister_driver(&lanai_driver);
}
module_init(lanai_module_init);
+4 -1
View File
@@ -432,7 +432,10 @@ int drm_addctx(struct inode *inode, struct file *filp,
if (ctx.handle != DRM_KERNEL_CONTEXT) {
if (dev->driver->context_ctor)
dev->driver->context_ctor(dev, ctx.handle);
if (!dev->driver->context_ctor(dev, ctx.handle)) {
DRM_DEBUG( "Running out of ctxs or memory.\n");
return -ENOMEM;
}
}
ctx_entry = drm_alloc(sizeof(*ctx_entry), DRM_MEM_CTXLIST);
+18 -7
View File
@@ -193,6 +193,7 @@ static const u8 W83792D_REG_LEVELS[3][4] = {
0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
};
#define W83792D_REG_GPIO_EN 0x1A
#define W83792D_REG_CONFIG 0x40
#define W83792D_REG_VID_FANDIV 0x47
#define W83792D_REG_CHIPID 0x49
@@ -257,7 +258,7 @@ DIV_TO_REG(long val)
{
int i;
val = SENSORS_LIMIT(val, 1, 128) >> 1;
for (i = 0; i < 6; i++) {
for (i = 0; i < 7; i++) {
if (val == 0)
break;
val >>= 1;
@@ -1282,8 +1283,8 @@ w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
w83792d_init_client(new_client);
/* A few vars need to be filled upon startup */
for (i = 1; i <= 7; i++) {
data->fan_min[i - 1] = w83792d_read_value(new_client,
for (i = 0; i < 7; i++) {
data->fan_min[i] = w83792d_read_value(new_client,
W83792D_REG_FAN_MIN[i]);
}
@@ -1306,10 +1307,20 @@ w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
device_create_file_fan(new_client, 1);
device_create_file_fan(new_client, 2);
device_create_file_fan(new_client, 3);
device_create_file_fan(new_client, 4);
device_create_file_fan(new_client, 5);
device_create_file_fan(new_client, 6);
device_create_file_fan(new_client, 7);
/* Read GPIO enable register to check if pins for fan 4,5 are used as
GPIO */
val1 = w83792d_read_value(new_client, W83792D_REG_GPIO_EN);
if (!(val1 & 0x40))
device_create_file_fan(new_client, 4);
if (!(val1 & 0x20))
device_create_file_fan(new_client, 5);
val1 = w83792d_read_value(new_client, W83792D_REG_PIN);
if (val1 & 0x40)
device_create_file_fan(new_client, 6);
if (val1 & 0x04)
device_create_file_fan(new_client, 7);
device_create_file_temp1(new_client); /* Temp1 */
device_create_file_temp_add(new_client, 2); /* Temp2 */
+4 -2
View File
@@ -91,9 +91,9 @@ static int mfcounter = 0;
* Public data...
*/
int mpt_lan_index = -1;
static int mpt_stm_index = -1;
int mpt_stm_index = -1;
static struct proc_dir_entry *mpt_proc_root_dir;
struct proc_dir_entry *mpt_proc_root_dir;
#define WHOINIT_UNKNOWN 0xAA
@@ -6271,6 +6271,7 @@ EXPORT_SYMBOL(mpt_resume);
EXPORT_SYMBOL(mpt_suspend);
#endif
EXPORT_SYMBOL(ioc_list);
EXPORT_SYMBOL(mpt_proc_root_dir);
EXPORT_SYMBOL(mpt_register);
EXPORT_SYMBOL(mpt_deregister);
EXPORT_SYMBOL(mpt_event_register);
@@ -6288,6 +6289,7 @@ EXPORT_SYMBOL(mpt_verify_adapter);
EXPORT_SYMBOL(mpt_GetIocState);
EXPORT_SYMBOL(mpt_print_ioc_summary);
EXPORT_SYMBOL(mpt_lan_index);
EXPORT_SYMBOL(mpt_stm_index);
EXPORT_SYMBOL(mpt_HardResetHandler);
EXPORT_SYMBOL(mpt_config);
EXPORT_SYMBOL(mpt_toolbox);
+2
View File
@@ -1006,8 +1006,10 @@ extern int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
* Public data decl's...
*/
extern struct list_head ioc_list;
extern struct proc_dir_entry *mpt_proc_root_dir;
extern int mpt_lan_index; /* needed by mptlan.c */
extern int mpt_stm_index; /* needed by mptstm.c */
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
#endif /* } __KERNEL__ */
+4 -6
View File
@@ -4,7 +4,7 @@
*
* (C) 2000 Red Hat. GPL'd
*
* $Id: cfi_cmdset_0001.c,v 1.185 2005/11/07 11:14:22 gleixner Exp $
* $Id: cfi_cmdset_0001.c,v 1.186 2005/11/23 22:07:52 nico Exp $
*
*
* 10/10/2000 Nicolas Pitre <nico@cam.org>
@@ -644,9 +644,8 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
*
* - contension arbitration is handled in the owner's context.
*
* The 'shared' struct can be read when its lock is taken.
* However any writes to it can only be made when the current
* owner's lock is also held.
* The 'shared' struct can be read and/or written only when
* its lock is taken.
*/
struct flchip_shared *shared = chip->priv;
struct flchip *contender;
@@ -675,14 +674,13 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
}
timeo = jiffies + HZ;
spin_lock(&shared->lock);
spin_unlock(contender->mutex);
}
/* We now own it */
shared->writing = chip;
if (mode == FL_ERASING)
shared->erasing = chip;
if (contender && contender != chip)
spin_unlock(contender->mutex);
spin_unlock(&shared->lock);
}
+4 -4
View File
@@ -1,7 +1,7 @@
/*
Common Flash Interface probe code.
(C) 2000 Red Hat. GPL'd.
$Id: cfi_probe.c,v 1.84 2005/11/07 11:14:23 gleixner Exp $
$Id: cfi_probe.c,v 1.86 2005/11/29 14:48:31 gleixner Exp $
*/
#include <linux/config.h>
@@ -230,8 +230,8 @@ static int __xipram cfi_chip_setup(struct map_info *map,
cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL);
cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL);
cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL);
cfi->mfr = cfi_read_query(map, base);
cfi->id = cfi_read_query(map, base + ofs_factor);
cfi->mfr = cfi_read_query16(map, base);
cfi->id = cfi_read_query16(map, base + ofs_factor);
/* Put it back into Read Mode */
cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
@@ -426,7 +426,7 @@ static struct mtd_chip_driver cfi_chipdrv = {
.module = THIS_MODULE
};
int __init cfi_probe_init(void)
static int __init cfi_probe_init(void)
{
register_mtd_chip_driver(&cfi_chipdrv);
return 0;
+66 -57
View File
@@ -4,7 +4,7 @@
* Copyright 2000,2001 David A. Schleef <ds@schleef.org>
* 2000,2001 Lineo, Inc.
*
* $Id: sharp.c,v 1.16 2005/11/07 11:14:23 gleixner Exp $
* $Id: sharp.c,v 1.17 2005/11/29 14:28:28 gleixner Exp $
*
* Devices supported:
* LH28F016SCT Symmetrical block flash memory, 2Mx8
@@ -160,22 +160,28 @@ struct mtd_info *sharp_probe(struct map_info *map)
return mtd;
}
static inline void sharp_send_cmd(struct map_info *map, unsigned long cmd, unsigned long adr)
{
map_word map_cmd;
map_cmd.x[0] = cmd;
map_write(map, map_cmd, adr);
}
static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
{
unsigned long tmp;
map_word tmp, read0, read4;
unsigned long base = 0;
u32 read0, read4;
int width = 4;
tmp = map_read32(map, base+0);
tmp = map_read(map, base+0);
map_write32(map, CMD_READ_ID, base+0);
sharp_send_cmd(map, CMD_READ_ID, base+0);
read0=map_read32(map, base+0);
read4=map_read32(map, base+4);
if(read0 == 0x89898989){
read0 = map_read(map, base+0);
read4 = map_read(map, base+4);
if(read0.x[0] == 0x89898989){
printk("Looks like sharp flash\n");
switch(read4){
switch(read4.x[0]){
case 0xaaaaaaaa:
case 0xa0a0a0a0:
/* aa - LH28F016SCT-L95 2Mx8, 32 64k blocks*/
@@ -197,16 +203,16 @@ static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
return width;
#endif
default:
printk("Sort-of looks like sharp flash, 0x%08x 0x%08x\n",
read0,read4);
printk("Sort-of looks like sharp flash, 0x%08lx 0x%08lx\n",
read0.x[0], read4.x[0]);
}
}else if((map_read32(map, base+0) == CMD_READ_ID)){
}else if((map_read(map, base+0).x[0] == CMD_READ_ID)){
/* RAM, probably */
printk("Looks like RAM\n");
map_write32(map, tmp, base+0);
map_write(map, tmp, base+0);
}else{
printk("Doesn't look like sharp flash, 0x%08x 0x%08x\n",
read0,read4);
printk("Doesn't look like sharp flash, 0x%08lx 0x%08lx\n",
read0.x[0], read4.x[0]);
}
return 0;
@@ -215,7 +221,8 @@ static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
/* This function returns with the chip->mutex lock held. */
static int sharp_wait(struct map_info *map, struct flchip *chip)
{
int status, i;
int i;
map_word status;
unsigned long timeo = jiffies + HZ;
DECLARE_WAITQUEUE(wait, current);
int adr = 0;
@@ -225,12 +232,12 @@ retry:
switch(chip->state){
case FL_READY:
map_write32(map,CMD_READ_STATUS,adr);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
chip->state = FL_STATUS;
case FL_STATUS:
for(i=0;i<100;i++){
status = map_read32(map,adr);
if((status & SR_READY)==SR_READY)
status = map_read(map, adr);
if((status.x[0] & SR_READY)==SR_READY)
break;
udelay(1);
}
@@ -254,7 +261,7 @@ retry:
goto retry;
}
map_write32(map,CMD_RESET, adr);
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
@@ -351,37 +358,39 @@ static int sharp_write_oneword(struct map_info *map, struct flchip *chip,
int timeo;
int try;
int i;
int status = 0;
map_word data, status;
status.x[0] = 0;
ret = sharp_wait(map,chip);
for(try=0;try<10;try++){
map_write32(map,CMD_BYTE_WRITE,adr);
sharp_send_cmd(map, CMD_BYTE_WRITE, adr);
/* cpu_to_le32 -> hack to fix the writel be->le conversion */
map_write32(map,cpu_to_le32(datum),adr);
data.x[0] = cpu_to_le32(datum);
map_write(map, data, adr);
chip->state = FL_WRITING;
timeo = jiffies + (HZ/2);
map_write32(map,CMD_READ_STATUS,adr);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
for(i=0;i<100;i++){
status = map_read32(map,adr);
if((status & SR_READY)==SR_READY)
status = map_read(map, adr);
if((status.x[0] & SR_READY) == SR_READY)
break;
}
if(i==100){
printk("sharp: timed out writing\n");
}
if(!(status&SR_ERRORS))
if(!(status.x[0] & SR_ERRORS))
break;
printk("sharp: error writing byte at addr=%08lx status=%08x\n",adr,status);
printk("sharp: error writing byte at addr=%08lx status=%08lx\n", adr, status.x[0]);
map_write32(map,CMD_CLEAR_STATUS,adr);
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
}
map_write32(map,CMD_RESET,adr);
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
wake_up(&chip->wq);
@@ -434,18 +443,18 @@ static int sharp_do_wait_for_ready(struct map_info *map, struct flchip *chip,
{
int ret;
unsigned long timeo;
int status;
map_word status;
DECLARE_WAITQUEUE(wait, current);
map_write32(map,CMD_READ_STATUS,adr);
status = map_read32(map,adr);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
timeo = jiffies + HZ;
while(time_before(jiffies, timeo)){
map_write32(map,CMD_READ_STATUS,adr);
status = map_read32(map,adr);
if((status & SR_READY)==SR_READY){
sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
if((status.x[0] & SR_READY)==SR_READY){
ret = 0;
goto out;
}
@@ -476,7 +485,7 @@ static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
{
int ret;
//int timeo;
int status;
map_word status;
//int i;
//printk("sharp_erase_oneblock()\n");
@@ -486,26 +495,26 @@ static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
sharp_unlock_oneblock(map,chip,adr);
#endif
map_write32(map,CMD_BLOCK_ERASE_1,adr);
map_write32(map,CMD_BLOCK_ERASE_2,adr);
sharp_send_cmd(map, CMD_BLOCK_ERASE_1, adr);
sharp_send_cmd(map, CMD_BLOCK_ERASE_2, adr);
chip->state = FL_ERASING;
ret = sharp_do_wait_for_ready(map,chip,adr);
if(ret<0)return ret;
map_write32(map,CMD_READ_STATUS,adr);
status = map_read32(map,adr);
sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
if(!(status&SR_ERRORS)){
map_write32(map,CMD_RESET,adr);
if(!(status.x[0] & SR_ERRORS)){
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
//spin_unlock_bh(chip->mutex);
return 0;
}
printk("sharp: error erasing block at addr=%08lx status=%08x\n",adr,status);
map_write32(map,CMD_CLEAR_STATUS,adr);
printk("sharp: error erasing block at addr=%08lx status=%08lx\n", adr, status.x[0]);
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
//spin_unlock_bh(chip->mutex);
@@ -517,20 +526,20 @@ static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
unsigned long adr)
{
int i;
int status;
map_word status;
map_write32(map,CMD_CLEAR_BLOCK_LOCKS_1,adr);
map_write32(map,CMD_CLEAR_BLOCK_LOCKS_2,adr);
sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_1, adr);
sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_2, adr);
udelay(100);
status = map_read32(map,adr);
printk("status=%08x\n",status);
status = map_read(map, adr);
printk("status=%08lx\n", status.x[0]);
for(i=0;i<1000;i++){
//map_write32(map,CMD_READ_STATUS,adr);
status = map_read32(map,adr);
if((status & SR_READY)==SR_READY)
//sharp_send_cmd(map, CMD_READ_STATUS, adr);
status = map_read(map, adr);
if((status.x[0] & SR_READY) == SR_READY)
break;
udelay(100);
}
@@ -538,14 +547,14 @@ static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
printk("sharp: timed out unlocking block\n");
}
if(!(status&SR_ERRORS)){
map_write32(map,CMD_RESET,adr);
if(!(status.x[0] & SR_ERRORS)){
sharp_send_cmd(map, CMD_RESET, adr);
chip->state = FL_READY;
return;
}
printk("sharp: error unlocking block at addr=%08lx status=%08x\n",adr,status);
map_write32(map,CMD_CLEAR_STATUS,adr);
printk("sharp: error unlocking block at addr=%08lx status=%08lx\n", adr, status.x[0]);
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
}
#endif
+3 -3
View File
@@ -1,5 +1,5 @@
/*
* $Id: block2mtd.c,v 1.29 2005/11/07 11:14:24 gleixner Exp $
* $Id: block2mtd.c,v 1.30 2005/11/29 14:48:32 gleixner Exp $
*
* block2mtd.c - create an mtd from a block device
*
@@ -19,7 +19,7 @@
#include <linux/mtd/mtd.h>
#include <linux/buffer_head.h>
#define VERSION "$Revision: 1.29 $"
#define VERSION "$Revision: 1.30 $"
#define ERROR(fmt, args...) printk(KERN_ERR "block2mtd: " fmt "\n" , ## args)
@@ -40,7 +40,7 @@ static LIST_HEAD(blkmtd_device_list);
#define PAGE_READAHEAD 64
void cache_readahead(struct address_space *mapping, int index)
static void cache_readahead(struct address_space *mapping, int index)
{
filler_t *filler = (filler_t*)mapping->a_ops->readpage;
int i, pagei;
+3 -3
View File
@@ -6,7 +6,7 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* $Id: ms02-nv.c,v 1.10 2005/06/20 12:24:41 macro Exp $
* $Id: ms02-nv.c,v 1.11 2005/11/14 13:41:47 macro Exp $
*/
#include <linux/init.h>
@@ -293,13 +293,13 @@ static int __init ms02nv_init(void)
switch (mips_machtype) {
case MACH_DS5000_200:
csr = (volatile u32 *)KN02_CSR_BASE;
csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
if (*csr & KN02_CSR_BNK32M)
stride = 2;
break;
case MACH_DS5000_2X0:
case MACH_DS5900:
csr = (volatile u32 *)KN03_MCR_BASE;
csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);
if (*csr & KN03_MCR_BNK32M)
stride = 2;
break;
+3 -3
View File
@@ -1,5 +1,5 @@
/* This version ported to the Linux-MTD system by dwmw2@infradead.org
* $Id: ftl.c,v 1.58 2005/11/07 11:14:19 gleixner Exp $
* $Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $
*
* Fixes: Arnaldo Carvalho de Melo <acme@conectiva.com.br>
* - fixes some leaks on failure in build_maps and ftl_notify_add, cleanups
@@ -1084,9 +1084,9 @@ struct mtd_blktrans_ops ftl_tr = {
.owner = THIS_MODULE,
};
int init_ftl(void)
static int init_ftl(void)
{
DEBUG(0, "$Id: ftl.c,v 1.58 2005/11/07 11:14:19 gleixner Exp $\n");
DEBUG(0, "$Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $\n");
return register_mtd_blktrans(&ftl_tr);
}
-6
View File
@@ -538,12 +538,6 @@ config MTD_MPC1211
This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02).
If you have such a board, say 'Y'.
config MTD_PQ2FADS
tristate "JEDEC flash SIMM mapped on PQ2FADS and 8272ADS boards"
depends on (ADS8272 || PQ2FADS) && MTD_PARTITIONS && MTD_JEDECPROBE && MTD_PHYSMAP && MTD_CFI_GEOMETRY && MTD_CFI_INTELEXT
help
This enables access to flash SIMM on PQ2FADS-like boards
config MTD_OMAP_NOR
tristate "TI OMAP board mappings"
depends on MTD_CFI && ARCH_OMAP
-1
View File
@@ -70,6 +70,5 @@ obj-$(CONFIG_MTD_DMV182) += dmv182.o
obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
obj-$(CONFIG_MTD_PQ2FADS) += pq2fads.o
obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
+66 -12
View File
@@ -1,5 +1,5 @@
/*
* $Id: ixp4xx.c,v 1.12 2005/11/07 11:14:27 gleixner Exp $
* $Id: ixp4xx.c,v 1.13 2005/11/16 16:23:21 dvrabel Exp $
*
* drivers/mtd/maps/ixp4xx.c
*
@@ -34,10 +34,55 @@
#include <linux/reboot.h>
/*
* Read/write a 16 bit word from flash address 'addr'.
*
* When the cpu is in little-endian mode it swizzles the address lines
* ('address coherency') so we need to undo the swizzling to ensure commands
* and the like end up on the correct flash address.
*
* To further complicate matters, due to the way the expansion bus controller
* handles 32 bit reads, the byte stream ABCD is stored on the flash as:
* D15 D0
* +---+---+
* | A | B | 0
* +---+---+
* | C | D | 2
* +---+---+
* This means that on LE systems each 16 bit word must be swapped. Note that
* this requires CONFIG_MTD_CFI_BE_BYTE_SWAP to be enabled to 'unswap' the CFI
* data and other flash commands which are always in D7-D0.
*/
#ifndef __ARMEB__
#ifndef CONFIG_MTD_CFI_BE_BYTE_SWAP
# error CONFIG_MTD_CFI_BE_BYTE_SWAP required
#endif
static inline u16 flash_read16(void __iomem *addr)
{
return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
}
static inline void flash_write16(u16 d, void __iomem *addr)
{
__raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2));
}
#define BYTE0(h) ((h) & 0xFF)
#define BYTE1(h) (((h) >> 8) & 0xFF)
#else
static inline u16 flash_read16(const void __iomem *addr)
{
return __raw_readw(addr);
}
static inline void flash_write16(u16 d, void __iomem *addr)
{
__raw_writew(d, addr);
}
#define BYTE0(h) (((h) >> 8) & 0xFF)
#define BYTE1(h) ((h) & 0xFF)
#endif
@@ -45,7 +90,7 @@
static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
{
map_word val;
val.x[0] = le16_to_cpu(readw(map->virt + ofs));
val.x[0] = flash_read16(map->virt + ofs);
return val;
}
@@ -57,19 +102,28 @@ static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
static void ixp4xx_copy_from(struct map_info *map, void *to,
unsigned long from, ssize_t len)
{
int i;
u8 *dest = (u8 *) to;
void __iomem *src = map->virt + from;
u16 data;
for (i = 0; i < (len / 2); i++) {
data = le16_to_cpu(readw(src + 2*i));
dest[i * 2] = BYTE0(data);
dest[i * 2 + 1] = BYTE1(data);
if (len <= 0)
return;
if (from & 1) {
*dest++ = BYTE1(flash_read16(src));
src++;
--len;
}
if (len & 1)
dest[len - 1] = BYTE0(le16_to_cpu(readw(src + 2*i)));
while (len >= 2) {
u16 data = flash_read16(src);
*dest++ = BYTE0(data);
*dest++ = BYTE1(data);
src += 2;
len -= 2;
}
if (len > 0)
*dest++ = BYTE0(flash_read16(src));
}
/*
@@ -79,7 +133,7 @@ static void ixp4xx_copy_from(struct map_info *map, void *to,
static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long adr)
{
if (!(adr & 1))
writew(cpu_to_le16(d.x[0]), map->virt + adr);
flash_write16(d.x[0], map->virt + adr);
}
/*
@@ -87,7 +141,7 @@ static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long
*/
static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr)
{
writew(cpu_to_le16(d.x[0]), map->virt + adr);
flash_write16(d.x[0], map->virt + adr);
}
struct ixp4xx_flash_info {
+2 -2
View File
@@ -6,7 +6,7 @@
* (C) Copyright 2000-2001, Greg Ungerer (gerg@snapgear.com)
* (C) Copyright 2001-2002, SnapGear (www.snapgear.com)
*
* $Id: nettel.c,v 1.11 2005/11/07 11:14:27 gleixner Exp $
* $Id: nettel.c,v 1.12 2005/11/29 14:30:00 gleixner Exp $
*/
/****************************************************************************/
@@ -479,7 +479,7 @@ void __exit nettel_cleanup(void)
}
if (nettel_intel_map.virt) {
iounmap(nettel_intel_map.virt);
nettel_intel_map.virt = 0;
nettel_intel_map.virt = NULL;
}
#endif
}
+2 -2
View File
@@ -7,7 +7,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* $Id: pci.c,v 1.13 2005/11/07 11:14:27 gleixner Exp $
* $Id: pci.c,v 1.14 2005/11/17 08:20:27 dwmw2 Exp $
*
* Generic PCI memory map driver. We support the following boards:
* - Intel IQ80310 ATU.
@@ -102,7 +102,7 @@ static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *
memcpy_toio(map->base + map->translate(map, to), from, len);
}
static struct map_info mtd_pci_map = {
static const struct map_info mtd_pci_map = {
.phys = NO_XIP,
.copy_from = mtd_pci_copyfrom,
.copy_to = mtd_pci_copyto,
+2 -1
View File
@@ -1,5 +1,5 @@
/*
* $Id: physmap.c,v 1.38 2005/11/07 11:14:28 gleixner Exp $
* $Id: physmap.c,v 1.39 2005/11/29 14:49:36 gleixner Exp $
*
* Normal mappings of chips in physical memory
*
@@ -19,6 +19,7 @@
#include <linux/mtd/map.h>
#include <linux/config.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
static struct mtd_info *mymtd;
+2 -2
View File
@@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*
* $Id: sc520cdp.c,v 1.22 2005/11/07 11:14:28 gleixner Exp $
* $Id: sc520cdp.c,v 1.23 2005/11/17 08:20:27 dwmw2 Exp $
*
*
* The SC520CDP is an evaluation board for the Elan SC520 processor available
@@ -164,7 +164,7 @@ struct sc520_par_table
unsigned long default_address;
};
static struct sc520_par_table par_table[NUM_FLASH_BANKS] =
static const struct sc520_par_table par_table[NUM_FLASH_BANKS] =
{
{ /* Flash Bank #0: selected by ROMCS0 */
SC520_PAR_ROMCS0,
+1 -1
View File
@@ -1486,7 +1486,7 @@ ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
/*
* Module initialization function
*/
int __init ns_init_module(void)
static int __init ns_init_module(void)
{
struct nand_chip *chip;
struct nandsim *nand;
+2 -4
View File
@@ -30,11 +30,9 @@ MODULE_PARM_DESC(block_size, "Block size to use by RFD, defaults to erase unit s
#define PREFIX "rfd_ftl: "
/* Major device # for FTL device */
/* A request for this major has been sent to device@lanana.org */
/* This major has been assigned by device@lanana.org */
#ifndef RFD_FTL_MAJOR
#define RFD_FTL_MAJOR 95
#define RFD_FTL_MAJOR 256
#endif
/* Maximum number of partitions in an FTL region */
+14 -15
View File
@@ -380,23 +380,23 @@ megaraid_queue(Scsi_Cmnd *scmd, void (*done)(Scsi_Cmnd *))
spin_lock_irqsave(&adapter->lock, flags);
scb = mega_build_cmd(adapter, scmd, &busy);
if (!scb)
goto out;
if(scb) {
scb->state |= SCB_PENDQ;
list_add_tail(&scb->list, &adapter->pending_list);
scb->state |= SCB_PENDQ;
list_add_tail(&scb->list, &adapter->pending_list);
/*
* Check if the HBA is in quiescent state, e.g., during a
* delete logical drive opertion. If it is, don't run
* the pending_list.
*/
if(atomic_read(&adapter->quiescent) == 0) {
mega_runpendq(adapter);
}
return 0;
}
/*
* Check if the HBA is in quiescent state, e.g., during a
* delete logical drive opertion. If it is, don't run
* the pending_list.
*/
if (atomic_read(&adapter->quiescent) == 0)
mega_runpendq(adapter);
busy = 0;
out:
spin_unlock_irqrestore(&adapter->lock, flags);
return busy;
}
@@ -4677,7 +4677,6 @@ megaraid_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
adapter->flag = flag;
spin_lock_init(&adapter->lock);
scsi_assign_lock(host, &adapter->lock);
host->cmd_per_lun = max_cmd_per_lun;
host->max_sectors = max_sectors_per_io;
+3
View File
@@ -787,6 +787,9 @@ static const struct usb_device_id cxacru_usb_ids[] = {
{ /* V = Conexant P = ADSL modem (Hasbani project) */
USB_DEVICE(0x0572, 0xcb00), .driver_info = (unsigned long) &cxacru_cb00
},
{ /* V = Conexant P = ADSL modem (Well PTI-800 */
USB_DEVICE(0x0572, 0xcb02), .driver_info = (unsigned long) &cxacru_cb00
},
{ /* V = Conexant P = ADSL modem */
USB_DEVICE(0x0572, 0xcb01), .driver_info = (unsigned long) &cxacru_cb00
},
+2 -2
View File
@@ -879,7 +879,7 @@ static int usbatm_atm_init(struct usbatm_data *instance)
fail:
instance->atm_dev = NULL;
shutdown_atm_dev(atm_dev); /* usbatm_atm_dev_close will eventually be called */
atm_dev_deregister(atm_dev); /* usbatm_atm_dev_close will eventually be called */
return ret;
}
@@ -1164,7 +1164,7 @@ void usbatm_usb_disconnect(struct usb_interface *intf)
/* ATM finalize */
if (instance->atm_dev)
shutdown_atm_dev(instance->atm_dev);
atm_dev_deregister(instance->atm_dev);
usbatm_put_instance(instance); /* taken in usbatm_usb_probe */
}
+2 -1
View File
@@ -219,6 +219,7 @@ int usb_hcd_pci_suspend (struct pci_dev *dev, pm_message_t message)
goto done;
}
}
synchronize_irq(dev->irq);
/* FIXME until the generic PM interfaces change a lot more, this
* can't use PCI D1 and D2 states. For example, the confusion
@@ -392,7 +393,7 @@ int usb_hcd_pci_resume (struct pci_dev *dev)
dev->dev.power.power_state = PMSG_ON;
hcd->saw_irq = 0;
clear_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
if (hcd->driver->resume) {
retval = hcd->driver->resume(hcd);
+10 -5
View File
@@ -1315,11 +1315,12 @@ static int hcd_unlink_urb (struct urb *urb, int status)
* finish unlinking the initial failed usb_set_address()
* or device descriptor fetch.
*/
if (!hcd->saw_irq && hcd->self.root_hub != urb->dev) {
if (!test_bit(HCD_FLAG_SAW_IRQ, &hcd->flags)
&& hcd->self.root_hub != urb->dev) {
dev_warn (hcd->self.controller, "Unlink after no-IRQ? "
"Controller is probably using the wrong IRQ."
"\n");
hcd->saw_irq = 1;
set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
}
urb->status = status;
@@ -1649,13 +1650,15 @@ irqreturn_t usb_hcd_irq (int irq, void *__hcd, struct pt_regs * r)
struct usb_hcd *hcd = __hcd;
int start = hcd->state;
if (start == HC_STATE_HALT)
if (unlikely(start == HC_STATE_HALT ||
!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)))
return IRQ_NONE;
if (hcd->driver->irq (hcd, r) == IRQ_NONE)
return IRQ_NONE;
hcd->saw_irq = 1;
if (hcd->state == HC_STATE_HALT)
set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
if (unlikely(hcd->state == HC_STATE_HALT))
usb_hc_died (hcd);
return IRQ_HANDLED;
}
@@ -1768,6 +1771,8 @@ int usb_add_hcd(struct usb_hcd *hcd,
dev_info(hcd->self.controller, "%s\n", hcd->product_desc);
set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
/* till now HC has been in an indeterminate state ... */
if (hcd->driver->reset && (retval = hcd->driver->reset(hcd)) < 0) {
dev_err(hcd->self.controller, "can't reset\n");
+6 -1
View File
@@ -72,7 +72,12 @@ struct usb_hcd { /* usb_bus.hcpriv points to this */
* hardware info/state
*/
const struct hc_driver *driver; /* hw-specific hooks */
unsigned saw_irq : 1;
/* Flags that need to be manipulated atomically */
unsigned long flags;
#define HCD_FLAG_HW_ACCESSIBLE 0x00000001
#define HCD_FLAG_SAW_IRQ 0x00000002
unsigned can_wakeup:1; /* hw supports wakeup? */
unsigned remote_wakeup:1;/* sw should use wakeup? */
unsigned rh_registered:1;/* is root hub registered? */
+38 -8
View File
@@ -121,8 +121,8 @@ static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev)
return 0;
}
/* called by khubd or root hub (re)init threads; leaves HC in halt state */
static int ehci_pci_reset(struct usb_hcd *hcd)
/* called during probe() after chip reset completes */
static int ehci_pci_setup(struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
@@ -141,6 +141,11 @@ static int ehci_pci_reset(struct usb_hcd *hcd)
if (retval)
return retval;
/* data structure init */
retval = ehci_init(hcd);
if (retval)
return retval;
/* NOTE: only the parts below this line are PCI-specific */
switch (pdev->vendor) {
@@ -154,7 +159,8 @@ static int ehci_pci_reset(struct usb_hcd *hcd)
/* AMD8111 EHCI doesn't work, according to AMD errata */
if (pdev->device == 0x7463) {
ehci_info(ehci, "ignoring AMD8111 (errata)\n");
return -EIO;
retval = -EIO;
goto done;
}
break;
case PCI_VENDOR_ID_NVIDIA:
@@ -207,9 +213,8 @@ static int ehci_pci_reset(struct usb_hcd *hcd)
/* REVISIT: per-port wake capability (PCI 0x62) currently unused */
retval = ehci_pci_reinit(ehci, pdev);
/* finish init */
return ehci_init(hcd);
done:
return retval;
}
/*-------------------------------------------------------------------------*/
@@ -228,14 +233,36 @@ static int ehci_pci_reset(struct usb_hcd *hcd)
static int ehci_pci_suspend(struct usb_hcd *hcd, pm_message_t message)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
unsigned long flags;
int rc = 0;
if (time_before(jiffies, ehci->next_statechange))
msleep(10);
/* Root hub was already suspended. Disable irq emission and
* mark HW unaccessible, bail out if RH has been resumed. Use
* the spinlock to properly synchronize with possible pending
* RH suspend or resume activity.
*
* This is still racy as hcd->state is manipulated outside of
* any locks =P But that will be a different fix.
*/
spin_lock_irqsave (&ehci->lock, flags);
if (hcd->state != HC_STATE_SUSPENDED) {
rc = -EINVAL;
goto bail;
}
writel (0, &ehci->regs->intr_enable);
(void)readl(&ehci->regs->intr_enable);
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
bail:
spin_unlock_irqrestore (&ehci->lock, flags);
// could save FLADJ in case of Vaux power loss
// ... we'd only use it to handle clock skew
return 0;
return rc;
}
static int ehci_pci_resume(struct usb_hcd *hcd)
@@ -251,6 +278,9 @@ static int ehci_pci_resume(struct usb_hcd *hcd)
if (time_before(jiffies, ehci->next_statechange))
msleep(100);
/* Mark hardware accessible again as we are out of D3 state by now */
set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
/* If CF is clear, we lost PCI Vaux power and need to restart. */
if (readl(&ehci->regs->configured_flag) != FLAG_CF)
goto restart;
@@ -319,7 +349,7 @@ static const struct hc_driver ehci_pci_hc_driver = {
/*
* basic lifecycle operations
*/
.reset = ehci_pci_reset,
.reset = ehci_pci_setup,
.start = ehci_run,
#ifdef CONFIG_PM
.suspend = ehci_pci_suspend,
+16 -8
View File
@@ -912,6 +912,7 @@ submit_async (
int epnum;
unsigned long flags;
struct ehci_qh *qh = NULL;
int rc = 0;
qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
epnum = ep->desc.bEndpointAddress;
@@ -926,21 +927,28 @@ submit_async (
#endif
spin_lock_irqsave (&ehci->lock, flags);
if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
&ehci_to_hcd(ehci)->flags))) {
rc = -ESHUTDOWN;
goto done;
}
qh = qh_append_tds (ehci, urb, qtd_list, epnum, &ep->hcpriv);
if (unlikely(qh == NULL)) {
rc = -ENOMEM;
goto done;
}
/* Control/bulk operations through TTs don't need scheduling,
* the HC and TT handle it when the TT has a buffer ready.
*/
if (likely (qh != NULL)) {
if (likely (qh->qh_state == QH_STATE_IDLE))
qh_link_async (ehci, qh_get (qh));
}
if (likely (qh->qh_state == QH_STATE_IDLE))
qh_link_async (ehci, qh_get (qh));
done:
spin_unlock_irqrestore (&ehci->lock, flags);
if (unlikely (qh == NULL)) {
if (unlikely (qh == NULL))
qtd_list_free (ehci, urb, qtd_list);
return -ENOMEM;
}
return 0;
return rc;
}
/*-------------------------------------------------------------------------*/
+16 -2
View File
@@ -602,6 +602,12 @@ static int intr_submit (
spin_lock_irqsave (&ehci->lock, flags);
if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
&ehci_to_hcd(ehci)->flags))) {
status = -ESHUTDOWN;
goto done;
}
/* get qh and force any scheduling errors */
INIT_LIST_HEAD (&empty);
qh = qh_append_tds (ehci, urb, &empty, epnum, &ep->hcpriv);
@@ -1456,7 +1462,11 @@ static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
/* schedule ... need to lock */
spin_lock_irqsave (&ehci->lock, flags);
status = iso_stream_schedule (ehci, urb, stream);
if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
&ehci_to_hcd(ehci)->flags)))
status = -ESHUTDOWN;
else
status = iso_stream_schedule (ehci, urb, stream);
if (likely (status == 0))
itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
spin_unlock_irqrestore (&ehci->lock, flags);
@@ -1815,7 +1825,11 @@ static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
/* schedule ... need to lock */
spin_lock_irqsave (&ehci->lock, flags);
status = iso_stream_schedule (ehci, urb, stream);
if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
&ehci_to_hcd(ehci)->flags)))
status = -ESHUTDOWN;
else
status = iso_stream_schedule (ehci, urb, stream);
if (status == 0)
sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
spin_unlock_irqrestore (&ehci->lock, flags);
+5 -1
View File
@@ -115,7 +115,7 @@
/*-------------------------------------------------------------------------*/
// #define OHCI_VERBOSE_DEBUG /* not always helpful */
#undef OHCI_VERBOSE_DEBUG /* not always helpful */
/* For initializing controller (mask in an HCFS mode too) */
#define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
@@ -253,6 +253,10 @@ static int ohci_urb_enqueue (
spin_lock_irqsave (&ohci->lock, flags);
/* don't submit to a dead HC */
if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
retval = -ENODEV;
goto fail;
}
if (!HC_IS_RUNNING(hcd->state)) {
retval = -ENODEV;
goto fail;
+20 -4
View File
@@ -53,6 +53,11 @@ static int ohci_bus_suspend (struct usb_hcd *hcd)
spin_lock_irqsave (&ohci->lock, flags);
if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))) {
spin_unlock_irqrestore (&ohci->lock, flags);
return -ESHUTDOWN;
}
ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
switch (ohci->hc_control & OHCI_CTRL_HCFS) {
case OHCI_USB_RESUME:
@@ -140,11 +145,19 @@ static int ohci_bus_resume (struct usb_hcd *hcd)
struct ohci_hcd *ohci = hcd_to_ohci (hcd);
u32 temp, enables;
int status = -EINPROGRESS;
unsigned long flags;
if (time_before (jiffies, ohci->next_statechange))
msleep(5);
spin_lock_irq (&ohci->lock);
spin_lock_irqsave (&ohci->lock, flags);
if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))) {
spin_unlock_irqrestore (&ohci->lock, flags);
return -ESHUTDOWN;
}
ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
@@ -179,7 +192,7 @@ static int ohci_bus_resume (struct usb_hcd *hcd)
ohci_dbg (ohci, "lost power\n");
status = -EBUSY;
}
spin_unlock_irq (&ohci->lock);
spin_unlock_irqrestore (&ohci->lock, flags);
if (status == -EBUSY) {
(void) ohci_init (ohci);
return ohci_restart (ohci);
@@ -297,8 +310,8 @@ ohci_hub_status_data (struct usb_hcd *hcd, char *buf)
/* handle autosuspended root: finish resuming before
* letting khubd or root hub timer see state changes.
*/
if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER
|| !HC_IS_RUNNING(hcd->state)) {
if (unlikely((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER
|| !HC_IS_RUNNING(hcd->state))) {
can_suspend = 0;
goto done;
}
@@ -508,6 +521,9 @@ static int ohci_hub_control (
u32 temp;
int retval = 0;
if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)))
return -ESHUTDOWN;
switch (typeReq) {
case ClearHubFeature:
switch (wValue) {
+25 -2
View File
@@ -105,13 +105,36 @@ ohci_pci_start (struct usb_hcd *hcd)
static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
{
/* root hub was already suspended */
return 0;
struct ohci_hcd *ohci = hcd_to_ohci (hcd);
unsigned long flags;
int rc = 0;
/* Root hub was already suspended. Disable irq emission and
* mark HW unaccessible, bail out if RH has been resumed. Use
* the spinlock to properly synchronize with possible pending
* RH suspend or resume activity.
*
* This is still racy as hcd->state is manipulated outside of
* any locks =P But that will be a different fix.
*/
spin_lock_irqsave (&ohci->lock, flags);
if (hcd->state != HC_STATE_SUSPENDED) {
rc = -EINVAL;
goto bail;
}
ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
(void)ohci_readl(ohci, &ohci->regs->intrdisable);
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
bail:
spin_unlock_irqrestore (&ohci->lock, flags);
return rc;
}
static int ohci_pci_resume (struct usb_hcd *hcd)
{
set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
usb_hcd_resume_root_hub(hcd);
return 0;
}
+6
View File
@@ -717,6 +717,7 @@ static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
* at the source, so we must turn off PIRQ.
*/
pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
uhci->hc_inaccessible = 1;
hcd->poll_rh = 0;
@@ -733,6 +734,11 @@ static int uhci_resume(struct usb_hcd *hcd)
dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
/* We aren't in D3 state anymore, we do that even if dead as I
* really don't want to keep a stale HCD_FLAG_HW_ACCESSIBLE=0
*/
set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
if (uhci->rh_state == UHCI_RH_RESET) /* Dead */
return 0;
spin_lock_irq(&uhci->lock);
+7 -6
View File
@@ -534,6 +534,12 @@ config FB_SUN3
bool "Sun3 framebuffer support"
depends on (FB = y) && (SUN3 || SUN3X) && BROKEN
config FB_SBUS
bool "SBUS and UPA framebuffers"
depends on (FB = y) && (SPARC32 || SPARC64)
help
Say Y if you want support for SBUS or UPA based frame buffer device.
config FB_BW2
bool "BWtwo support"
depends on (FB = y) && ((SPARC32 || SPARC64) && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3)
@@ -546,6 +552,7 @@ config FB_BW2
config FB_CG3
bool "CGthree support"
depends on (FB = y) && ((SPARC32 || SPARC64) && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3)
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
help
@@ -1210,12 +1217,6 @@ config FB_AU1100
source "drivers/video/geode/Kconfig"
config FB_SBUS
bool "SBUS and UPA framebuffers"
depends on (FB = y) && (SPARC32 || SPARC64)
help
Say Y if you want support for SBUS or UPA based frame buffer device.
config FB_FFB
bool "Creator/Creator3D/Elite3D support"
depends on FB_SBUS && SPARC64
+9 -6
View File
@@ -404,7 +404,7 @@ struct cirrusfb_info {
struct cirrusfb_regs currentmode;
int blank_mode;
u32 pseudo_palette[17];
u32 pseudo_palette[16];
struct { u8 red, green, blue, pad; } palette[256];
#ifdef CONFIG_ZORRO
@@ -1603,14 +1603,14 @@ static int cirrusfb_setcolreg (unsigned regno, unsigned red, unsigned green,
switch (info->var.bits_per_pixel) {
case 8:
((u8*)(info->pseudo_palette))[regno] = v;
cinfo->pseudo_palette[regno] = v;
break;
case 16:
((u16*)(info->pseudo_palette))[regno] = v;
cinfo->pseudo_palette[regno] = v;
break;
case 24:
case 32:
((u32*)(info->pseudo_palette))[regno] = v;
cinfo->pseudo_palette[regno] = v;
break;
}
return 0;
@@ -2020,18 +2020,21 @@ static void cirrusfb_prim_fillrect(struct cirrusfb_info *cinfo,
const struct fb_fillrect *region)
{
int m; /* bytes per pixel */
u32 color = (cinfo->info->fix.visual == FB_VISUAL_TRUECOLOR) ?
cinfo->pseudo_palette[region->color] : region->color;
if(cinfo->info->var.bits_per_pixel == 1) {
cirrusfb_RectFill(cinfo->regbase, cinfo->info->var.bits_per_pixel,
region->dx / 8, region->dy,
region->width / 8, region->height,
region->color,
color,
cinfo->currentmode.line_length);
} else {
m = ( cinfo->info->var.bits_per_pixel + 7 ) / 8;
cirrusfb_RectFill(cinfo->regbase, cinfo->info->var.bits_per_pixel,
region->dx * m, region->dy,
region->width * m, region->height,
region->color,
color,
cinfo->currentmode.line_length);
}
return;