From b3edadcb9e300e4f3c39e4d42d83736ca1a762d4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 23 Jun 2026 07:48:43 +0200 Subject: [PATCH 01/40] dt-bindings: clock: Drop incorrect usage of double '::' There is no use of double colon '::' in YAML. OTOH, the literal style block, e.g. using '|' treats all characters as content [1] therefore single use of ':' in descriptions is perfectly fine, whenever '|' is used. Cleanup existing code, so the confusing style won't be re-used in new contributions. Link: https://yaml.org/spec/1.2.2/#literal-style [1] Acked-by: Alim Akhtar Acked-by: Conor Dooley Signed-off-by: Krzysztof Kozlowski Acked-by: Andi Shyti Reviewed-by: Alim Akhtar Link: https://patch.msgid.link/20260623054842.21831-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-apq8064.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-apq8084.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-ipq6018.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-ipq8064.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-mdm9607.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-mdm9615.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-msm8660.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-msm8909.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-msm8916.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-msm8953.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-msm8974.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-sdm660.yaml | 2 +- Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 2 +- .../devicetree/bindings/clock/qcom,ipq5018-gcc.yaml | 2 +- .../devicetree/bindings/clock/qcom,ipq9574-gcc.yaml | 2 +- .../devicetree/bindings/clock/qcom,qca8k-nsscc.yaml | 2 +- .../devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml | 2 +- Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml | 2 +- .../devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml | 2 +- .../devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml | 2 +- .../devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml | 2 +- .../devicetree/bindings/clock/qcom,sm8350-videocc.yaml | 2 +- Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 2 +- .../devicetree/bindings/clock/samsung,exynos5260-clock.yaml | 6 +++--- .../devicetree/bindings/clock/samsung,exynos5410-clock.yaml | 2 +- .../devicetree/bindings/clock/samsung,exynos5433-clock.yaml | 2 +- .../devicetree/bindings/clock/samsung,exynos7-clock.yaml | 2 +- .../devicetree/bindings/clock/samsung,exynos850-clock.yaml | 2 +- .../bindings/clock/samsung,exynosautov9-clock.yaml | 2 +- .../bindings/clock/samsung,exynosautov920-clock.yaml | 2 +- .../devicetree/bindings/clock/samsung,s5pv210-clock.yaml | 2 +- 32 files changed, 34 insertions(+), 34 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml index 53a5ab319159..6863db9bd092 100644 --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml @@ -13,7 +13,7 @@ description: | Qualcomm display clock control module provides the clocks, resets and power domains on SM8150/SM8250/SM8350. - See also:: + See also: include/dt-bindings/clock/qcom,dispcc-sm8150.h include/dt-bindings/clock/qcom,dispcc-sm8250.h include/dt-bindings/clock/qcom,dispcc-sm8350.h diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml index 27df7e3e5bf3..68532244901e 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml @@ -14,7 +14,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on APQ8064. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-msm8960.h include/dt-bindings/reset/qcom,gcc-msm8960.h diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml index 0a0a26d9beab..1c022e75fd71 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml @@ -14,7 +14,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on APQ8084. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-apq8084.h include/dt-bindings/reset/qcom,gcc-apq8084.h diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml index 4d2614d4f368..c7fb84438db7 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml @@ -15,7 +15,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on IPQ6018. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-ipq6018.h include/dt-bindings/reset/qcom,gcc-ipq6018.h diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml index a71557395c01..b4d3175780bc 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml @@ -13,7 +13,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on IPQ8064. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml index d7da30b0e7ee..0a7be7583bdd 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml @@ -14,7 +14,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-mdm9607.h allOf: diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml index 418dea31eb62..0656d5ee448d 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml @@ -14,7 +14,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-mdm9615.h allOf: diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml index e03b6d0acdb6..70c9da1f35c2 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml @@ -14,7 +14,7 @@ description: | Qualcomm global clock control module provides the clocks and resets on MSM8660 - See also:: + See also: include/dt-bindings/clock/qcom,gcc-msm8660.h include/dt-bindings/reset/qcom,gcc-msm8660.h diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml index ce1f5a60bd8c..2edb6c251d99 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml @@ -13,7 +13,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on MSM8909, MSM8917 or QM215. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-msm8909.h include/dt-bindings/clock/qcom,gcc-msm8917.h diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml index 258b6b93deca..af4b639ea8c3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml @@ -14,7 +14,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on MSM8916 or MSM8939. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-msm8916.h include/dt-bindings/clock/qcom,gcc-msm8939.h include/dt-bindings/reset/qcom,gcc-msm8916.h diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml index ced3118c8580..fc0360554f68 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml @@ -15,7 +15,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on MSM8937, MSM8940, MSM8953 or SDM439. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-msm8917.h include/dt-bindings/clock/qcom,gcc-msm8953.h diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml index 929fafc84c19..378dfe7854ac 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml @@ -15,7 +15,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on MSM8974 (all variants) and MSM8226. - See also:: + See also: include/dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974) include/dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml index 724ce0491118..72aaf699cf70 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml @@ -14,7 +14,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on SDM630, SDM636 and SDM660 - See also:: + See also: include/dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660) $ref: qcom,gcc.yaml# diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index 4cdff6161bf0..3ac4419009a9 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -14,7 +14,7 @@ description: | Qualcomm graphics clock control module provides the clocks, resets and power domains on Qualcomm SoCs. - See also:: + See also: include/dt-bindings/clock/qcom,gpucc-sdm845.h include/dt-bindings/clock/qcom,gpucc-sa8775p.h include/dt-bindings/clock/qcom,gpucc-sc7180.h diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml index 489d0fc5607c..9925b931ecad 100644 --- a/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml @@ -13,7 +13,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on IPQ5018 - See also:: + See also: include/dt-bindings/clock/qcom,ipq5018-gcc.h include/dt-bindings/reset/qcom,ipq5018-gcc.h diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml index 27ae9938febc..5b128fa841aa 100644 --- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml @@ -14,7 +14,7 @@ description: | Qualcomm global clock control module provides the clocks, resets and power domains on IPQ9574 - See also:: + See also: include/dt-bindings/clock/qcom,ipq9574-gcc.h include/dt-bindings/reset/qcom,ipq9574-gcc.h diff --git a/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml b/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml index 480745349a5d..8d7a58609372 100644 --- a/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml @@ -14,7 +14,7 @@ description: | Qualcomm NSS clock control module provides the clocks and resets on QCA8386(switch mode)/QCA8084(PHY mode) - See also:: + See also: include/dt-bindings/clock/qcom,qca8k-nsscc.h include/dt-bindings/reset/qcom,qca8k-nsscc.h diff --git a/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml index 734880805c1b..bedbdabef672 100644 --- a/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml @@ -13,7 +13,7 @@ description: | Qualcomm graphics clock control module provides the clocks, resets and power domains on Qualcomm SoCs. - See also:: + See also: include/dt-bindings/clock/qcom,qcm2290-gpucc.h properties: diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml index ab97d4b7dba8..b6c835bfd0d9 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml @@ -12,7 +12,7 @@ maintainers: description: | The clock enumerators are defined in and - come in pairs:: FOO_CLK followed by FOO_A_CLK. The latter clock is + come in pairs: FOO_CLK followed by FOO_A_CLK. The latter clock is an "active" clock, which means that the consumer only care that the clock is available when the apps CPU subsystem is active, i.e. not suspended or in deep idle. If it is important that the clock keeps running during system diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml index 99ab9106009f..fd06ac9bceb9 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml @@ -13,7 +13,7 @@ description: | Qualcomm LPASS core and audio clock control module provides the clocks and power domains on SC7280. - See also:: + See also: include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml index 273d66e245c5..f235b4e24cc7 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml @@ -13,7 +13,7 @@ description: | Qualcomm LPASS core and audio clock control module provides the clocks, and reset on SC8280XP. - See also:: + See also: include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h properties: diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml index 8cbab3fbb660..d7e1938b5e1b 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml @@ -14,7 +14,7 @@ description: | Qualcomm LPASS core and audio clock controllers provide audio-related resets on SM6115 and its derivatives. - See also:: + See also: include/dt-bindings/clock/qcom,sm6115-lpasscc.h properties: diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml index 5c2ecec0624e..a986ab4ce7c7 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml @@ -13,7 +13,7 @@ description: | Qualcomm video clock control module provides the clocks, resets and power domains on Qualcomm SoCs. - See also:: + See also: include/dt-bindings/clock/qcom,videocc-sm8350.h include/dt-bindings/reset/qcom,videocc-sm8350.h diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index f4ff9acef9d5..124d259fc85e 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -13,7 +13,7 @@ description: | Qualcomm video clock control module provides the clocks, resets and power domains on Qualcomm SoCs. - See also:: + See also: include/dt-bindings/clock/qcom,sm6350-videocc.h include/dt-bindings/clock/qcom,videocc-sc7180.h include/dt-bindings/clock/qcom,videocc-sc7280.h diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml index b05f83533e3d..56ab972c3da5 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml @@ -14,17 +14,17 @@ maintainers: description: | Expected external clocks, defined in DTS as fixed-rate clocks with a matching - name:: + name: - "fin_pll" - PLL input clock from XXTI - "xrtcxti" - input clock from XRTCXTI - "ioclk_pcm_extclk" - pcm external operation clock - "ioclk_spdif_extclk" - spdif external operation clock - "ioclk_i2s_cdclk" - i2s0 codec clock - Phy clocks:: + Phy clocks: There are several clocks which are generated by specific PHYs. These clocks are fed into the clock controller and then routed to the hardware blocks. - These clocks are defined as fixed clocks in the driver with following names:: + These clocks are defined as fixed clocks in the driver with following names: - "phyclk_dptx_phy_ch3_txd_clk" - dp phy clock for channel 3 - "phyclk_dptx_phy_ch2_txd_clk" - dp phy clock for channel 2 - "phyclk_dptx_phy_ch1_txd_clk" - dp phy clock for channel 1 diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml index b737c9d35a1c..1d907dd8fbf1 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml @@ -14,7 +14,7 @@ maintainers: description: | Expected external clocks, defined in DTS as fixed-rate clocks with a matching - name:: + name: - "fin_pll" - PLL input clock from XXTI All available clocks are defined as preprocessor macros in diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml index 3f9326e09f79..8a289f1e2ace 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml @@ -14,7 +14,7 @@ maintainers: description: | Expected external clocks, defined in DTS as fixed-rate clocks with a matching - name:: + name: - "oscclk" - PLL input clock from XXTI All available clocks are defined as preprocessor macros in diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml index c137c6744ef9..a51cd4fafb41 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml @@ -14,7 +14,7 @@ maintainers: description: | Expected external clocks, defined in DTS as fixed-rate clocks with a matching - name:: + name: - "fin_pll" - PLL input clock from XXTI All available clocks are defined as preprocessor macros in diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml index cdc5ded59fe5..68c2fd318765 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml @@ -17,7 +17,7 @@ description: | Exynos850 clock controller is comprised of several CMU units, generating clocks for different domains. Those CMU units are modeled as separate device tree nodes, and might depend on each other. Root clocks in that clock tree are - two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external + two external clocks: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external clocks must be defined as fixed-rate clocks in dts. CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml index 32f39e543b36..e9d17d48b4f3 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml @@ -17,7 +17,7 @@ description: | Exynos Auto v9 clock controller is comprised of several CMU units, generating clocks for different domains. Those CMU units are modeled as separate device tree nodes, and might depend on each other. Root clocks in that clock tree are - two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz). + two external clocks: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz). The external OSCCLK must be defined as fixed-rate clock in dts. CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml index 6b1fc61a2ff9..475db824d4d3 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml @@ -17,7 +17,7 @@ description: | ExynosAuto v920 clock controller is comprised of several CMU units, generating clocks for different domains. Those CMU units are modeled as separate device tree nodes, and might depend on each other. Root clocks in that clock tree are - two external clocks:: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI (32768 Hz). + two external clocks: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI (32768 Hz). The external OSCCLK must be defined as fixed-rate clock in dts. CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and diff --git a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml index 67a33665cf00..b1617d96d3fb 100644 --- a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml @@ -14,7 +14,7 @@ maintainers: description: | Expected external clocks, defined in DTS as fixed-rate clocks with a matching - name:: + name: - "xxti" - external crystal oscillator connected to XXTI and XXTO pins of the SoC, - "xusbxti" - external crystal oscillator connected to XUSBXTI and XUSBXTO From 5de561db57d15afd9160801f666cae14a746e1ec Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 23 Jun 2026 07:48:44 +0200 Subject: [PATCH 02/40] dt-bindings: Drop incorrect usage of double '::' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is no use of double colon '::' in YAML. OTOH, the literal style block, e.g. using '|' treats all characters as content [1] therefore single use of ':' in descriptions is perfectly fine, whenever '|' is used. Cleanup existing code, so the confusing style won't be re-used in new contributions. Link: https://yaml.org/spec/1.2.2/#literal-style [1] Acked-by: Conor Dooley Acked-by: Alim Akhtar Acked-by: Sebastian Reichel Acked-by: Niklas Söderlund Acked-by: Mark Brown Acked-by: Geert Uytterhoeven # renesas Signed-off-by: Krzysztof Kozlowski Acked-by: Andi Shyti Link: https://patch.msgid.link/20260623054842.21831-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/qcom-soc.yaml | 4 ++-- .../devicetree/bindings/arm/qcom.yaml | 4 ++-- .../bindings/arm/samsung/samsung-soc.yaml | 4 ++-- .../display/msm/dsi-controller-main.yaml | 20 +++++++++---------- .../display/samsung/samsung,fimd.yaml | 4 ++-- .../bindings/i2c/samsung,s3c2410-i2c.yaml | 2 +- .../interconnect/qcom,msm8998-bwmon.yaml | 2 +- .../interconnect/samsung,exynos-bus.yaml | 14 ++++++------- .../bindings/leds/qcom,pm8058-led.yaml | 4 ++-- .../bindings/leds/skyworks,aat1290.yaml | 6 +++--- .../bindings/media/cec/cec-gpio.yaml | 2 +- .../bindings/mmc/samsung,exynos-dw-mshc.yaml | 2 +- .../bindings/phy/samsung,mipi-video-phy.yaml | 4 ++-- .../bindings/phy/samsung,usb2-phy.yaml | 2 +- .../bindings/phy/samsung,usb3-drd-phy.yaml | 2 +- .../bindings/pinctrl/samsung,pinctrl.yaml | 2 +- .../bindings/power/renesas,rcar-sysc.yaml | 2 +- .../bindings/power/reset/restart-handler.yaml | 8 ++++---- .../bindings/regulator/maxim,max77802.yaml | 4 ++-- .../bindings/regulator/richtek,rtq2208.yaml | 2 +- .../bindings/serial/qcom,msm-uartdm.yaml | 2 +- .../devicetree/bindings/slimbus/slimbus.yaml | 4 ++-- .../bindings/soc/qcom/qcom,apr-services.yaml | 2 +- .../bindings/soc/qcom/qcom,rpmh-rsc.yaml | 8 ++++---- .../bindings/soc/qcom/qcom,wcnss.yaml | 2 +- .../bindings/soc/renesas/renesas-soc.yaml | 4 ++-- .../bindings/sound/qcom,q6asm-dais.yaml | 2 +- .../thermal/samsung,exynos-thermal.yaml | 4 ++-- .../devicetree/bindings/usb/qcom,dwc3.yaml | 12 +++++------ .../bindings/usb/qcom,snps-dwc3.yaml | 12 +++++------ 30 files changed, 73 insertions(+), 73 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/qcom-soc.yaml b/Documentation/devicetree/bindings/arm/qcom-soc.yaml index 27261039d56f..37fdd5a080b7 100644 --- a/Documentation/devicetree/bindings/arm/qcom-soc.yaml +++ b/Documentation/devicetree/bindings/arm/qcom-soc.yaml @@ -11,10 +11,10 @@ maintainers: description: | Guidelines for new compatibles for SoC blocks/components. - When adding new compatibles in new bindings, use the format:: + When adding new compatibles in new bindings, use the format: qcom,SoC-IP - For example:: + For example: qcom,sdm845-llcc-bwmon When adding new compatibles to existing bindings, use the format in the diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 50cc18a6ec5e..667607ae2c32 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1215,7 +1215,7 @@ properties: items: items: - description: | - MSM chipset ID - an exact match value consisting of two bitfields:: + MSM chipset ID - an exact match value consisting of two bitfields: - bits 0-15 - The unique MSM chipset ID - bits 16-31 - Reserved; should be 0 - description: | @@ -1241,7 +1241,7 @@ properties: - items: - items: - description: | - Board ID consisting of three bitfields:: + Board ID consisting of three bitfields: - bits 31-24 - Unused - bits 23-16 - Platform Version Major - bits 15-8 - Platform Version Minor diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml index 653f85997643..ab000befe76d 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml @@ -11,10 +11,10 @@ maintainers: description: | Guidelines for new compatibles for SoC blocks/components. - When adding new compatibles in new bindings, use the format:: + When adding new compatibles in new bindings, use the format: samsung,SoC-IP - For example:: + For example: samsung,exynos5433-cmu-isp select: diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index dbc0613e427e..395425a70db8 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -73,16 +73,16 @@ properties: clocks: description: | - Several clocks are used, depending on the variant. Typical ones are:: - - bus:: Display AHB clock. - - byte:: Display byte clock. - - byte_intf:: Display byte interface clock. - - core:: Display core clock. - - core_mss:: Core MultiMedia SubSystem clock. - - iface:: Display AXI clock. - - mdp_core:: MDP Core clock. - - mnoc:: MNOC clock - - pixel:: Display pixel clock. + Several clocks are used, depending on the variant. Typical ones are: + - bus: Display AHB clock. + - byte: Display byte clock. + - byte_intf: Display byte interface clock. + - core: Display core clock. + - core_mss: Core MultiMedia SubSystem clock. + - iface: Display AXI clock. + - mdp_core: MDP Core clock. + - mnoc: MNOC clock + - pixel: Display pixel clock. minItems: 3 maxItems: 12 diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml index ff685031bb2c..729705f419bb 100644 --- a/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml +++ b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml @@ -41,7 +41,7 @@ properties: additionalProperties: false description: | Timing configuration for lcd i80 interface support. - The parameters are defined as:: + The parameters are defined as: VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|?? : : : : : Address Output --:. The GPIO + The order of the GPIOs should be the following: . The GPIO specifier depends on the gpio controller. Required in all cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output lines are permanently wired to the respective client. diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index ff64225e8281..e002e70580f9 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -13,7 +13,7 @@ description: | Bandwidth Monitor measures current throughput on buses between various NoC fabrics and provides information when it crosses configured thresholds. - Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845:: + Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845: - Measuring the bandwidth between CPUs and Last Level Cache Controller - called just BWMON, - Measuring the bandwidth between Last Level Cache Controller and memory diff --git a/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml b/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml index 5e26e48c7217..0203959c8995 100644 --- a/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml +++ b/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml @@ -23,7 +23,7 @@ description: | The each AXI bus has the owned source clock but, has not the only owned power line. The power line might be shared among one more sub-blocks. So, we can divide into two type of device as the role of each sub-block. There are two - type of bus devices as following:: + type of bus devices as following: - parent bus device - passive bus device @@ -44,8 +44,8 @@ description: | able to support the bus frequency for all Exynos SoCs. Detailed correlation between sub-blocks and power line according - to Exynos SoC:: - - In case of Exynos3250, there are two power line as following:: + to Exynos SoC: + - In case of Exynos3250, there are two power line as following: VDD_MIF |--- DMC (Dynamic Memory Controller) VDD_INT |--- LEFTBUS (parent device) @@ -89,7 +89,7 @@ description: | |L5 |200000 |200000 |400000 |300000 | ||1000000 | ---------------------------------------------------------- - - In case of Exynos4210, there is one power line as following:: + - In case of Exynos4210, there is one power line as following: VDD_INT |--- DMC (parent device, Dynamic Memory Controller) |--- LEFTBUS |--- PERIL @@ -106,7 +106,7 @@ description: | |--- LCD0 |--- LCD1 - - In case of Exynos4x12, there are two power line as following:: + - In case of Exynos4x12, there are two power line as following: VDD_MIF |--- DMC (Dynamic Memory Controller) VDD_INT |--- LEFTBUS (parent device) @@ -124,7 +124,7 @@ description: | |--- LCD0 |--- ISP - - In case of Exynos5422, there are two power line as following:: + - In case of Exynos5422, there are two power line as following: VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller) |--- DREX 1 @@ -143,7 +143,7 @@ description: | |--- FSYS |--- FSYS2 - - In case of Exynos5433, there is VDD_INT power line as following:: + - In case of Exynos5433, there is VDD_INT power line as following: VDD_INT |--- G2D (parent device) |--- MSCL |--- GSCL diff --git a/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml b/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml index b409b2a8b5c5..5165bfddcd54 100644 --- a/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml +++ b/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml @@ -10,10 +10,10 @@ maintainers: - Krzysztof Kozlowski description: | - The Qualcomm PM8058 contains an LED block for up to six LEDs:: three normal + The Qualcomm PM8058 contains an LED block for up to six LEDs: three normal LEDs, two "flash" LEDs and one "keypad backlight" LED. The names are quoted because sometimes these LED drivers are used for wildly different things than - flash or keypad backlight:: their names are more of a suggestion than a + flash or keypad backlight: their names are more of a suggestion than a hard-wired usecase. Hardware-wise the different LEDs support slightly different output currents. diff --git a/Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml b/Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml index a6aaa92dbccd..65576dfdca11 100644 --- a/Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml +++ b/Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml @@ -11,7 +11,7 @@ maintainers: - Krzysztof Kozlowski description: | - The device is controlled through two pins:: FL_EN and EN_SET. The pins when, + The device is controlled through two pins: FL_EN and EN_SET. The pins when, asserted high, enable flash strobe and movie mode (max 1/2 of flash current) respectively. In order to add a capability of selecting the strobe signal source (e.g. CPU or camera sensor) there is an additional switch required, @@ -39,11 +39,11 @@ properties: flash-max-microamp: description: | Maximum flash LED supply current can be calculated using following - formula:: I = 1A * 162 kOhm / Rset. + formula: I = 1A * 162 kOhm / Rset. flash-max-timeout-us: description: | - Maximum flash timeout can be calculated using following formula:: + Maximum flash timeout can be calculated using following formula: T = 8.82 * 10^9 * Ct. required: diff --git a/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml b/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml index 582c6c9cae48..21118e4bae0f 100644 --- a/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml +++ b/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml @@ -14,7 +14,7 @@ description: | hooked up to a pull-up GPIO line and - optionally - the HPD line is hooked up to another GPIO line. - Please note:: the maximum voltage for the CEC line is 3.63V, for the HPD and + Please note: the maximum voltage for the CEC line is 3.63V, for the HPD and 5V lines it is 5.3V. So you may need some sort of level conversion circuitry when connecting them to a GPIO line. diff --git a/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml index 27c4060f2f91..223fcc9f651f 100644 --- a/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml @@ -85,7 +85,7 @@ properties: description: | The value of CIU TX and RX clock phase shift value for HS400 mode operation. - Valid values for SDR and DDR CIU clock timing:: + Valid values for SDR and DDR CIU clock timing: - valid value for tx phase shift and rx phase shift is 0 to 7. - when CIU clock divider value is set to 3, all possible 8 phase shift values can be used. diff --git a/Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml index 16967ef8e9ec..87b6a35b2626 100644 --- a/Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml @@ -13,14 +13,14 @@ maintainers: description: | For samsung,s5pv210-mipi-video-phy compatible PHYs the second cell in the - PHY specifier identifies the PHY and its meaning is as follows:: + PHY specifier identifies the PHY and its meaning is as follows: 0 - MIPI CSIS 0, 1 - MIPI DSIM 0, 2 - MIPI CSIS 1, 3 - MIPI DSIM 1. samsung,exynos5420-mipi-video-phy and samsung,exynos5433-mipi-video-phy - support additional fifth PHY:: + support additional fifth PHY: 4 - MIPI CSIS 2. properties: diff --git a/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml index d9f22a801cbf..7db7605a82e2 100644 --- a/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml @@ -14,7 +14,7 @@ maintainers: description: | The first phandle argument in the PHY specifier identifies the PHY, its meaning is compatible dependent. For the currently supported SoCs (Exynos4210 - and Exynos4212) it is as follows:: + and Exynos4212) it is as follows: 0 - USB device ("device"), 1 - USB host ("host"), 2 - HSIC0 ("hsic0"), diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml index 4562e0468f4f..a1b3d9e6a094 100644 --- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml @@ -14,7 +14,7 @@ maintainers: description: | For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy compatible PHYs, the second cell in the PHY specifier identifies the - PHY id, which is interpreted as follows:: + PHY id, which is interpreted as follows: 0 - UTMI+ type phy, 1 - PIPE3 type phy. diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml index 7b006009ca0e..5e35686eeed3 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml @@ -18,7 +18,7 @@ description: | All the pin controller nodes should be represented in the aliases node using the following format 'pinctrl{n}' where n is a unique number for the alias. - The controller supports three types of interrupts:: + The controller supports three types of interrupts: - External GPIO interrupts (see interrupts property in pin controller node); - External wake-up interrupts - multiplexed (capable of waking up the system diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml index 347571e2545a..b67aa170b2c1 100644 --- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml +++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml @@ -13,7 +13,7 @@ maintainers: description: | The R-Car (RZ/G) System Controller provides power management for the CPU cores and various coprocessors. - The power domain IDs for consumers are defined in header files:: + The power domain IDs for consumers are defined in header files: include/dt-bindings/power/r8*-sysc.h properties: diff --git a/Documentation/devicetree/bindings/power/reset/restart-handler.yaml b/Documentation/devicetree/bindings/power/reset/restart-handler.yaml index 965a834a3dbe..00c00ec5ec81 100644 --- a/Documentation/devicetree/bindings/power/reset/restart-handler.yaml +++ b/Documentation/devicetree/bindings/power/reset/restart-handler.yaml @@ -18,12 +18,12 @@ properties: priority: $ref: /schemas/types.yaml#/definitions/uint32 description: | - A priority ranging from 0 to 255 according to the following guidelines:: - 0:: Restart handler of last resort, with limited restart capabilities. - 128:: Typical, default restart handler; use if no other restart handler + A priority ranging from 0 to 255 according to the following guidelines: + 0: Restart handler of last resort, with limited restart capabilities. + 128: Typical, default restart handler; use if no other restart handler is expected to be available, and/or if restart functionality is sufficient to restart the entire system. - 255:: Highest priority restart handler, will preempt all other restart handlers. + 255: Highest priority restart handler, will preempt all other restart handlers. minimum: 0 maximum: 255 diff --git a/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml b/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml index b704f05ea454..b886495c1396 100644 --- a/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml +++ b/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml @@ -22,13 +22,13 @@ description: | Certain regulators support "regulator-initial-mode" and "regulator-mode". The valid modes list is defined in the dt-bindings/regulator/maxim,max77802.h - and their meaning is:: + and their meaning is: 1 - Normal regulator voltage output mode. 3 - Low Power which reduces the quiescent current down to only 1uA The standard "regulator-mode" property can only be used for regulators that support changing their mode to Low Power Mode during suspend. These - regulators are:: bucks 2-4 and LDOs 1-35. Also, it only takes effect if the + regulators are: bucks 2-4 and LDOs 1-35. Also, it only takes effect if the regulator has been enabled for the given suspend state using "regulator-on-in-suspend" and has not been disabled for that state using "regulator-off-in-suspend". diff --git a/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml b/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml index 022c1f197364..b0aa38edf8c2 100644 --- a/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml +++ b/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml @@ -21,7 +21,7 @@ description: | conduction mode (FCCM). The definition of modes is in the datasheet which is available in below link - and their meaning is:: + and their meaning is: 0 - Auto mode for power saving, which reducing the switching frequency at light load condition to maintain high frequency. 1 - FCCM to meet the strict voltage regulation accuracy, which keeping constant switching frequency. diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml index 788ef5c1c446..bc967ead2350 100644 --- a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml +++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml @@ -17,7 +17,7 @@ description: | software perspective it's mostly compatible with the MSM serial UART except that it supports reading and writing multiple characters at a time. - Note:: Aliases may be defined to ensure the correct ordering of the UARTs. + Note: Aliases may be defined to ensure the correct ordering of the UARTs. The alias serialN will result in the UART being assigned port N. If any serialN alias exists, then an alias must exist for each enabled UART. The serialN aliases should be in a .dts file instead of in a .dtsi file. diff --git a/Documentation/devicetree/bindings/slimbus/slimbus.yaml b/Documentation/devicetree/bindings/slimbus/slimbus.yaml index 5a941610ce4e..3910327c8ded 100644 --- a/Documentation/devicetree/bindings/slimbus/slimbus.yaml +++ b/Documentation/devicetree/bindings/slimbus/slimbus.yaml @@ -29,7 +29,7 @@ patternProperties: description: | Every SLIMbus controller node can contain zero or more child nodes representing slave devices on the bus. Every SLIMbus slave device is - uniquely determined by the enumeration address containing 4 fields:: + uniquely determined by the enumeration address containing 4 fields: Manufacturer ID, Product code, Device index, and Instance value for the device. @@ -48,7 +48,7 @@ patternProperties: reg: maxItems: 1 description: | - Pair of (device index, instande ID), where:: + Pair of (device index, instande ID), where: - Device index, which uniquely identifies multiple devices within a single component. - Instance ID, can be used for the cases where multiple devices of diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml index bdf482db32aa..b663be3ea5a1 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml @@ -40,7 +40,7 @@ properties: $ref: /schemas/types.yaml#/definitions/string-array description: | Protection domain service name and path for APR service (if supported). - Possible values are:: + Possible values are: "avs/audio", "msm/adsp/audio_pd". "kernel/elf_loader", "msm/modem/wlan_pd". "tms/servreg", "msm/adsp/audio_pd". diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml index 26d9bc773ec5..1889139a3f7a 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml @@ -23,7 +23,7 @@ description: | with a few variations that are captured by the properties here. A TCS may be triggered from Linux or triggered by the F/W after all the CPUs - have powered off to facilitate idle power saving. TCS could be classified as:: + have powered off to facilitate idle power saving. TCS could be classified as: ACTIVE - Triggered by Linux SLEEP - Triggered by F/W WAKE - Triggered by F/W @@ -76,7 +76,7 @@ properties: items: items: - description: | - TCS type:: + TCS type: - ACTIVE_TCS - SLEEP_TCS - WAKE_TCS @@ -152,7 +152,7 @@ examples: - | // For a TCS whose RSC base address is 0x179C0000 and is at a DRV id of // 2, the register offsets for DRV2 start at 0D00, the register - // calculations are like this:: + // calculations are like this: // DRV0: 0x179C0000 // DRV2: 0x179C0000 + 0x10000 = 0x179D0000 // DRV2: 0x179C0000 + 0x10000 * 2 = 0x179E0000 @@ -182,7 +182,7 @@ examples: - | // For a TCS whose RSC base address is 0xAF20000 and is at DRV id of 0, the // register offsets for DRV0 start at 01C00, the register calculations are - // like this:: + // like this: // DRV0: 0xAF20000 // TCS-OFFSET: 0x1C00 #include diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml index 4fcae6bedfff..72a7f8cb09ba 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml @@ -28,7 +28,7 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: | Reference to a node specifying the wcnss "ccu" and "dxe" register blocks. - The node must be compatible with one of the following:: + The node must be compatible with one of the following: - qcom,riva" - qcom,pronto" diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas-soc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas-soc.yaml index 5ddd31f30f26..57c9d3c57021 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas-soc.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas-soc.yaml @@ -12,10 +12,10 @@ maintainers: description: | Guidelines for new compatibles for SoC blocks/components. - When adding new compatibles in new bindings, use the format:: + When adding new compatibles in new bindings, use the format: renesas,SoC-IP - For example:: + For example: renesas,r8a77965-csi2 When adding new compatibles to existing bindings, use the format in the diff --git a/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml b/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml index 47a105a97ecf..bc8c8ba24f9c 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml @@ -45,7 +45,7 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1, 2] description: | - The direction of the dai stream:: + The direction of the dai stream: - Q6ASM_DAI_TX_RX (0) for both tx and rx - Q6ASM_DAI_TX (1) for only tx (Capture/Encode) - Q6ASM_DAI_RX (2) for only rx (Playback/Decode) diff --git a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml index 29a08b0729ee..3f333db72a71 100644 --- a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml @@ -40,7 +40,7 @@ properties: description: | The Exynos TMU supports generating interrupts when reaching given temperature thresholds. Number of supported thermal trip points depends - on the SoC (only first trip points defined in DT will be configured):: + on the SoC (only first trip points defined in DT will be configured): - most of SoC: 4 - samsung,exynos5433-tmu: 8 - samsung,exynos7-tmu: 8 @@ -52,7 +52,7 @@ properties: - description: | Shared TMU registers. - Note:: On Exynos5420, the TRIMINFO register is misplaced for TMU + Note: On Exynos5420, the TRIMINFO register is misplaced for TMU channels 2, 3 and 4 Use "samsung,exynos5420-tmu-ext-triminfo" in cases, there is a misplaced register, also provide clock to access that base. diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index a7f58114c02e..90daee616880 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -92,14 +92,14 @@ properties: clocks: description: | - Several clocks are used, depending on the variant. Typical ones are:: - - cfg_noc:: System Config NOC clock. - - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= + Several clocks are used, depending on the variant. Typical ones are: + - cfg_noc: System Config NOC clock. + - core: Master/Core clock, has to be >= 125 MHz for SS operation and >= 60MHz for HS operation. - - iface:: System bus AXI clock. - - sleep:: Sleep clock, used for wakeup when USB3 core goes into low + - iface: System bus AXI clock. + - sleep: Sleep clock, used for wakeup when USB3 core goes into low power mode (U3). - - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host + - mock_utmi: Mock utmi clock needed for ITP/SOF generation in host mode. Its frequency should be 19.2MHz. minItems: 1 maxItems: 9 diff --git a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml index 8201656b41ed..d99af9f413d0 100644 --- a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml @@ -87,14 +87,14 @@ properties: clocks: description: | - Several clocks are used, depending on the variant. Typical ones are:: - - cfg_noc:: System Config NOC clock. - - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= + Several clocks are used, depending on the variant. Typical ones are: + - cfg_noc: System Config NOC clock. + - core: Master/Core clock, has to be >= 125 MHz for SS operation and >= 60MHz for HS operation. - - iface:: System bus AXI clock. - - sleep:: Sleep clock, used for wakeup when USB3 core goes into low + - iface: System bus AXI clock. + - sleep: Sleep clock, used for wakeup when USB3 core goes into low power mode (U3). - - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host + - mock_utmi: Mock utmi clock needed for ITP/SOF generation in host mode. Its frequency should be 19.2MHz. minItems: 1 maxItems: 9 From 4dbfe54674859e67b3564ace6cd8a384dfb997ad Mon Sep 17 00:00:00 2001 From: Tejas Mutalikdesai Date: Thu, 18 Jun 2026 20:41:46 +0530 Subject: [PATCH 03/40] dt-bindings: arm: xen: Convert to DT schema Convert the Xen ARM device tree binding documentation from the legacy plain-text format (Documentation/devicetree/bindings/arm/xen.txt) to the DT schema format, as required by the modern DT binding process. The "hypervisor" node is named without a unit-address. The name is part of the Xen ABI and is matched verbatim by the kernel using strcmp() in arch/arm/xen/enlighten.c and arch/arm64/kernel/acpi.c. Allow a unit-address so this can be addressed and the dtc warnings can be avoided in the example. Signed-off-by: Tejas Mutalikdesai Link: https://patch.msgid.link/20260618151147.9438-1-tejasmutalikdesai@gmail.com [robh: Allow a unit-address] Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/xen.txt | 62 ---------- .../devicetree/bindings/arm/xen.yaml | 110 ++++++++++++++++++ 2 files changed, 110 insertions(+), 62 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/xen.txt create mode 100644 Documentation/devicetree/bindings/arm/xen.yaml diff --git a/Documentation/devicetree/bindings/arm/xen.txt b/Documentation/devicetree/bindings/arm/xen.txt deleted file mode 100644 index f925290d4641..000000000000 --- a/Documentation/devicetree/bindings/arm/xen.txt +++ /dev/null @@ -1,62 +0,0 @@ -* Xen hypervisor device tree bindings - -Xen ARM virtual platforms shall have a top-level "hypervisor" node with -the following properties: - -- compatible: - compatible = "xen,xen-", "xen,xen"; - where is the version of the Xen ABI of the platform. - -- reg: specifies the base physical address and size of the regions in memory - where the special resources should be mapped to, using an HYPERVISOR_memory_op - hypercall. - Region 0 is reserved for mapping grant table, it must be always present. - The memory region is large enough to map the whole grant table (it is larger - or equal to gnttab_max_grant_frames()). - Regions 1...N are extended regions (unused address space) for mapping foreign - GFNs and grants, they might be absent if there is nothing to expose. - -- interrupts: the interrupt used by Xen to inject event notifications. - A GIC node is also required. - -To support UEFI on Xen ARM virtual platforms, Xen populates the FDT "uefi" node -under /hypervisor with following parameters: - -________________________________________________________________________________ -Name | Size | Description -================================================================================ -xen,uefi-system-table | 64-bit | Guest physical address of the UEFI System - | | Table. --------------------------------------------------------------------------------- -xen,uefi-mmap-start | 64-bit | Guest physical address of the UEFI memory - | | map. --------------------------------------------------------------------------------- -xen,uefi-mmap-size | 32-bit | Size in bytes of the UEFI memory map - | | pointed to in previous entry. --------------------------------------------------------------------------------- -xen,uefi-mmap-desc-size | 32-bit | Size in bytes of each entry in the UEFI - | | memory map. --------------------------------------------------------------------------------- -xen,uefi-mmap-desc-ver | 32-bit | Version of the mmap descriptor format. --------------------------------------------------------------------------------- - -Example (assuming #address-cells = <2> and #size-cells = <2>): - -hypervisor { - compatible = "xen,xen-4.3", "xen,xen"; - reg = <0 0xb0000000 0 0x20000>; - interrupts = <1 15 0xf08>; - uefi { - xen,uefi-system-table = <0xXXXXXXXX>; - xen,uefi-mmap-start = <0xXXXXXXXX>; - xen,uefi-mmap-size = <0xXXXXXXXX>; - xen,uefi-mmap-desc-size = <0xXXXXXXXX>; - xen,uefi-mmap-desc-ver = <0xXXXXXXXX>; - }; -}; - -The format and meaning of the "xen,uefi-*" parameters are similar to those in -Documentation/arch/arm/uefi.rst, which are provided by the regular UEFI stub. However -they differ because they are provided by the Xen hypervisor, together with a set -of UEFI runtime services implemented via hypercalls, see -http://xenbits.xen.org/docs/unstable/hypercall/x86_64/include,public,platform.h.html. diff --git a/Documentation/devicetree/bindings/arm/xen.yaml b/Documentation/devicetree/bindings/arm/xen.yaml new file mode 100644 index 000000000000..bad077a112c9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/xen.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/xen.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xen hypervisor + +maintainers: + - Stefano Stabellini + +description: + Xen ARM virtual platforms shall have a top-level "hypervisor" node with + the properties defined below. + +properties: + $nodename: + pattern: '^hypervisor(@[0-9a-f]+)?$' + + compatible: + description: + Specifies the Xen hypervisor. The version of the Xen ABI is encoded + in the first item as "xen,xen-", followed by the generic + "xen,xen" string. + items: + - pattern: '^xen,xen-[0-9]+\.[0-9]+$' + - const: xen,xen + + reg: + description: | + Base physical address and size of the regions in memory where special + resources should be mapped to, using a HYPERVISOR_memory_op hypercall. + + Region 0 is reserved for mapping the grant table and must always be + present. The memory region must be large enough to map the whole grant + table (it is larger or equal to gnttab_max_grant_frames()). + + Regions 1...N are extended regions (unused address space) for mapping + foreign GFNs and grants. They might be absent if there is nothing to + expose. + minItems: 1 + + interrupts: + description: + The interrupt used by Xen to inject event notifications. + A GIC node is also required. + maxItems: 1 + + uefi: + type: object + description: + Node populated by Xen to support UEFI on Xen ARM virtual platforms. + The format and meaning of the "xen,uefi-*" parameters are similar to + those in Documentation/arch/arm/uefi.rst, but are provided by the Xen + hypervisor together with a set of UEFI runtime services implemented via + hypercalls. + + properties: + xen,uefi-system-table: + description: Guest physical address of the UEFI System Table. + $ref: /schemas/types.yaml#/definitions/uint64 + + xen,uefi-mmap-start: + description: Guest physical address of the UEFI memory map. + $ref: /schemas/types.yaml#/definitions/uint64 + + xen,uefi-mmap-size: + description: Size in bytes of the UEFI memory map pointed to by xen,uefi-mmap-start. + $ref: /schemas/types.yaml#/definitions/uint32 + + xen,uefi-mmap-desc-size: + description: Size in bytes of each entry in the UEFI memory map. + $ref: /schemas/types.yaml#/definitions/uint32 + + xen,uefi-mmap-desc-ver: + description: Version of the mmap descriptor format. + $ref: /schemas/types.yaml#/definitions/uint32 + + required: + - xen,uefi-system-table + - xen,uefi-mmap-start + - xen,uefi-mmap-size + - xen,uefi-mmap-desc-size + - xen,uefi-mmap-desc-ver + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + hypervisor@b0000000 { + compatible = "xen,xen-4.3", "xen,xen"; + reg = <0xb0000000 0x20000>; + interrupts = <1 15 0xf08>; + + uefi { + xen,uefi-system-table = /bits/ 64 <0x1301415>; + xen,uefi-mmap-start = /bits/ 64 <0x7591400>; + xen,uefi-mmap-size = <0x1800>; + xen,uefi-mmap-desc-size = <0x30>; + xen,uefi-mmap-desc-ver = <1>; + }; + }; +... From 0108f362e410693f056da2569f8adf2c9705393d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 1 Jul 2026 12:58:33 +0200 Subject: [PATCH 04/40] dt-bindings: sram: qcom,imem: Narrow allowed reboot modes Only few Qualcomm IMEM devices actually provide interface for setting reboot modes, but top-level schema allows "reboot-mode" child for everyone. Narrow this to specific compatibles. syscon-reboot-mode schema allows arbitrary "mode-.* properties but only a subset actually makes sense and is valid. Provide negative look-ahead pattern to disallow any modes not supported by the device, which tightens the binding even more. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260701105832.197036-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/sram/qcom,imem.yaml | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index c63026904061..eaa8ef367ff4 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -89,6 +89,26 @@ required: - compatible - reg +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,apq8064-imem + - qcom,msm8226-imem + - qcom,msm8974-imem + then: + properties: + reboot-mode: + patternProperties: + # Negative look-ahead to disallow unsupported modes. The '$' has to be + # part of lookahead group to work, instead of trailing outside of (). + "^mode-(?!(bootloader$|normal$|recovery$))": false + else: + properties: + reboot-mode: false + additionalProperties: false examples: From 37fe2a9a589a769db86785e72728e28cb8da1008 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Thu, 2 Jul 2026 13:48:04 +0800 Subject: [PATCH 05/40] dt-bindings: display: verisilicon,dc: make resets non-optional The only variant supported by the binding now, the DC8200 controller on T-Head TH1520, requires three reset lines. Add the reset properties to the required list to clarify this. The in-tree th1520.dtsi file isn't affected by this change because the reset lines are already populated there. The driver still considers the resets optional, so if another variant with no reset line appears, only the binding needs tweaking. Signed-off-by: Icenowy Zheng Reviewed-by: Conor Dooley Link: https://patch.msgid.link/20260702054804.164820-1-zhengxingda@iscas.ac.cn Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/display/verisilicon,dc.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/verisilicon,dc.yaml b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml index 9dc35ab973f2..919a90012201 100644 --- a/Documentation/devicetree/bindings/display/verisilicon,dc.yaml +++ b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml @@ -75,6 +75,8 @@ required: - interrupts - clocks - clock-names + - resets + - reset-names - ports additionalProperties: false From 4ec74681d93e8cb5b777b5d5cfd76e9685da0900 Mon Sep 17 00:00:00 2001 From: Eduard Bostina Date: Tue, 30 Jun 2026 12:46:27 +0000 Subject: [PATCH 06/40] dt-bindings: bus: Convert DA8XX MSTPRI to DT schema Convert the Texas Instruments DA8XX Master Peripheral Priority Registers bindings to DT schema. Documentation: OMAP-L138 (DA850) http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf Signed-off-by: Eduard Bostina Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260630124631.2991596-1-egbostina@gmail.com Signed-off-by: Rob Herring (Arm) --- .../bindings/bus/ti,da850-mstpri.txt | 20 ---------- .../bindings/bus/ti,da850-mstpri.yaml | 37 +++++++++++++++++++ 2 files changed, 37 insertions(+), 20 deletions(-) delete mode 100644 Documentation/devicetree/bindings/bus/ti,da850-mstpri.txt create mode 100644 Documentation/devicetree/bindings/bus/ti,da850-mstpri.yaml diff --git a/Documentation/devicetree/bindings/bus/ti,da850-mstpri.txt b/Documentation/devicetree/bindings/bus/ti,da850-mstpri.txt deleted file mode 100644 index 72daefc6b4a1..000000000000 --- a/Documentation/devicetree/bindings/bus/ti,da850-mstpri.txt +++ /dev/null @@ -1,20 +0,0 @@ -* Device tree bindings for Texas Instruments da8xx master peripheral - priority driver - -DA8XX SoCs feature a set of registers allowing to change the priority of all -peripherals classified as masters. - -Documentation: -OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf - -Required properties: - -- compatible: "ti,da850-mstpri" - for da850 based boards -- reg: offset and length of the mstpri registers - -Example for da850-lcdk is shown below. - -mstpri { - compatible = "ti,da850-mstpri"; - reg = <0x14110 0x0c>; -}; diff --git a/Documentation/devicetree/bindings/bus/ti,da850-mstpri.yaml b/Documentation/devicetree/bindings/bus/ti,da850-mstpri.yaml new file mode 100644 index 000000000000..5b03abd3fc3b --- /dev/null +++ b/Documentation/devicetree/bindings/bus/ti,da850-mstpri.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/ti,da850-mstpri.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DA8XX Master Peripheral Priority Registers + +maintainers: + - Eduard Bostina + +description: | + DA8XX SoCs feature a set of registers allowing to change the priority of all + peripherals classified as masters. + + Documentation: + OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf + +properties: + compatible: + const: ti,da850-mstpri + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + mstpri@14110 { + compatible = "ti,da850-mstpri"; + reg = <0x14110 0x0c>; + }; From c1cb8156fc7424bbc5dde0f850413b94108531bb Mon Sep 17 00:00:00 2001 From: Udaya Kiran Challa Date: Wed, 24 Jun 2026 11:26:48 +0530 Subject: [PATCH 07/40] dt-bindings: watchdog: microchip,pic32mzda-wdt: Convert to DT schema Convert Microchip PIC32 Watchdog Timer devicetree binding from legacy text format to DT schema. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Udaya Kiran Challa Link: https://patch.msgid.link/20260624055648.127399-1-challauday369@gmail.com Signed-off-by: Rob Herring (Arm) --- .../bindings/watchdog/microchip,pic32-wdt.txt | 18 -------- .../watchdog/microchip,pic32mzda-wdt.yaml | 44 +++++++++++++++++++ 2 files changed, 44 insertions(+), 18 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt create mode 100644 Documentation/devicetree/bindings/watchdog/microchip,pic32mzda-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt b/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt deleted file mode 100644 index f03a29a1b323..000000000000 --- a/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Microchip PIC32 Watchdog Timer - -When enabled, the watchdog peripheral can be used to reset the device if the -WDT is not cleared periodically in software. - -Required properties: -- compatible: must be "microchip,pic32mzda-wdt". -- reg: physical base address of the controller and length of memory mapped - region. -- clocks: phandle of source clk. Should be <&rootclk LPRCCLK>. - -Example: - - watchdog@1f800800 { - compatible = "microchip,pic32mzda-wdt"; - reg = <0x1f800800 0x200>; - clocks = <&rootclk LPRCCLK>; - }; diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32mzda-wdt.yaml b/Documentation/devicetree/bindings/watchdog/microchip,pic32mzda-wdt.yaml new file mode 100644 index 000000000000..a5dd633c3e78 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/microchip,pic32mzda-wdt.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/microchip,pic32mzda-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip PIC32MZDA Watchdog Timer + +maintainers: + - Thomas Bogendoerfer + +description: + The PIC32 watchdog timer can be used to reset the device if software fails + to periodically service the watchdog. + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + const: microchip,pic32mzda-wdt + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + + watchdog@1f800800 { + compatible = "microchip,pic32mzda-wdt"; + reg = <0x1f800800 0x200>; + clocks = <&rootclk LPRCCLK>; + }; From c703ba7293939281f17cefea5a06fc9d1b42ab36 Mon Sep 17 00:00:00 2001 From: Udaya Kiran Challa Date: Wed, 1 Jul 2026 22:49:17 +0530 Subject: [PATCH 08/40] dt-bindings: watchdog: microchip,pic32mzda-dmt: Convert to DT schema Convert Microchip PIC32 Deadman Timer devicetree binding from legacy text format to DT schema. Signed-off-by: Udaya Kiran Challa Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260701171917.263050-1-challauday369@gmail.com Signed-off-by: Rob Herring (Arm) --- .../bindings/watchdog/microchip,pic32-dmt.txt | 19 -------- .../watchdog/microchip,pic32mzda-dmt.yaml | 45 +++++++++++++++++++ 2 files changed, 45 insertions(+), 19 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt create mode 100644 Documentation/devicetree/bindings/watchdog/microchip,pic32mzda-dmt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt deleted file mode 100644 index 49485f831373..000000000000 --- a/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Microchip PIC32 Deadman Timer - -The deadman timer is used to reset the processor in the event of a software -malfunction. It is a free-running instruction fetch timer, which is clocked -whenever an instruction fetch occurs until a count match occurs. - -Required properties: -- compatible: must be "microchip,pic32mzda-dmt". -- reg: physical base address of the controller and length of memory mapped - region. -- clocks: phandle of source clk. Should be <&rootclk PB7CLK>. - -Example: - - watchdog@1f800a00 { - compatible = "microchip,pic32mzda-dmt"; - reg = <0x1f800a00 0x80>; - clocks = <&rootclk PB7CLK>; - }; diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32mzda-dmt.yaml b/Documentation/devicetree/bindings/watchdog/microchip,pic32mzda-dmt.yaml new file mode 100644 index 000000000000..01638624e334 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/microchip,pic32mzda-dmt.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/microchip,pic32mzda-dmt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip PIC32MZDA Deadman Timer + +maintainers: + - Thomas Bogendoerfer + +description: | + The deadman timer is used to reset the processor in the event of a software + malfunction. It is a free-running instruction fetch timer, which is clocked + whenever an instruction fetch occurs until a count match occurs. + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + const: microchip,pic32mzda-dmt + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + + watchdog@1f800a00 { + compatible = "microchip,pic32mzda-dmt"; + reg = <0x1f800a00 0x80>; + clocks = <&rootclk PB7CLK>; + }; From 77ba658e58f2009f71f838fe3f22a1cb6c317c5f Mon Sep 17 00:00:00 2001 From: Komal Bajaj Date: Fri, 1 May 2026 23:23:46 +0530 Subject: [PATCH 09/40] dt-bindings: firmware: qcom,scm: Document SCM on Shikra SoC Document the SCM compatible for the Shikra SoC. Signed-off-by: Komal Bajaj Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260501-shikra-scm-binding-v1-1-93d7faf1b784@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml index 25f62bacbc91..9d6476541613 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -67,6 +67,7 @@ properties: - qcom,scm-sdx55 - qcom,scm-sdx65 - qcom,scm-sdx75 + - qcom,scm-shikra - qcom,scm-sm6115 - qcom,scm-sm6125 - qcom,scm-sm6350 @@ -148,6 +149,7 @@ allOf: - qcom,scm-msm8974 - qcom,scm-msm8976 - qcom,scm-qcm2290 + - qcom,scm-shikra - qcom,scm-sm6375 then: required: @@ -167,6 +169,7 @@ allOf: - qcom,scm-msm8660 - qcom,scm-msm8960 - qcom,scm-qcm2290 + - qcom,scm-shikra - qcom,scm-sm6375 then: properties: From 59c7950ff8fdb1819e8386286a4cc5e21fd91bde Mon Sep 17 00:00:00 2001 From: Abel Vesa Date: Wed, 8 Jul 2026 14:57:20 +0300 Subject: [PATCH 10/40] dt-bindings: interconnect: qcom-bwmon: Document Eliza BWMONs compatible Document Eliza BWMONs which has a BWMONv4 for CPU-LLCC and a BWMONv5 for DDR-LLCC paths, same as SM8550. Signed-off-by: Abel Vesa Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260708-bindings-llcc-bwmon-eliza-v1-1-3c7dbcbae87a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index e002e70580f9..66dfe70a8c34 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -25,6 +25,7 @@ properties: - const: qcom,msm8998-bwmon # BWMON v4 - items: - enum: + - qcom,eliza-cpu-bwmon - qcom,glymur-cpu-bwmon - qcom,hawi-cpu-bwmon - qcom,kaanapali-cpu-bwmon @@ -46,6 +47,7 @@ properties: - const: qcom,sdm845-bwmon # BWMON v4, unified register space - items: - enum: + - qcom,eliza-llcc-bwmon - qcom,hawi-llcc-bwmon - qcom,qcs615-llcc-bwmon - qcom,qcs8300-llcc-bwmon From bcef80df6d6f4d616ee0bfbfe8e9acd44517a15e Mon Sep 17 00:00:00 2001 From: Sayantan Chakraborty Date: Tue, 14 Jul 2026 01:06:50 +0530 Subject: [PATCH 11/40] dt-bindings: interconnect: qcom-bwmon: Add Shikra cpu-bwmon compatible Add the Qualcomm Shikra SoC compatible string for the CPU-to-DDR bandwidth monitor. Shikra has a BWMONv5 for CPU. Signed-off-by: Sayantan Chakraborty Acked-by: Krzysztof Kozlowski Signed-off-by: Komal Bajaj Link: https://patch.msgid.link/20260714-shikra-dt-m1-v6-1-bee265d3499b@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index 66dfe70a8c34..c0a5e925ff95 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -54,6 +54,7 @@ properties: - qcom,sa8775p-llcc-bwmon - qcom,sc7180-llcc-bwmon - qcom,sc8280xp-llcc-bwmon + - qcom,shikra-cpu-bwmon - qcom,sm6350-cpu-bwmon - qcom,sm8250-llcc-bwmon - qcom,sm8550-llcc-bwmon From 224fbfda98e4c0c733d07cf9996824497efb33f7 Mon Sep 17 00:00:00 2001 From: Sang-Heon Jeon Date: Sun, 14 Jun 2026 22:38:07 +0900 Subject: [PATCH 12/40] of: reserved_mem: print skipped node name when too many regions are defined When too many reserved memory regions are defined, fdt_init_reserved_mem_node() logs an error and skips the region without naming the node. Print the node name so the skipped node can be identified, matching fdt_scan_reserved_mem(). Signed-off-by: Sang-Heon Jeon Link: https://patch.msgid.link/20260614133807.2165124-3-ekffu200098@gmail.com Signed-off-by: Rob Herring (Arm) --- drivers/of/of_reserved_mem.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c index 82222bd45ac6..9ce55bfd7e2a 100644 --- a/drivers/of/of_reserved_mem.c +++ b/drivers/of/of_reserved_mem.c @@ -633,7 +633,8 @@ static void __init fdt_init_reserved_mem_node(unsigned long node, const char *un struct reserved_mem *rmem = &reserved_mem[reserved_mem_count]; if (reserved_mem_count == total_reserved_mem_cnt) { - pr_err("not enough space for all defined regions.\n"); + pr_err("not enough space for all defined regions, skip '%s'\n", + uname); return; } From c6fa876d8641dd01601d0f0a43733792bc4d1678 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 12 Jun 2026 16:53:15 -0500 Subject: [PATCH 13/40] dt-bindings: power: maxim,max17042: Fix temp types to signed The max17042 binding described "maxim,cold-temp" and "maxim,over-heat-temp" as unsigned values, but in-tree DTS examples use negative temperatures such as a cold threshold below zero degrees. Document the temperature properties as signed int32 values so the schema matches existing DTS data and the driver can use signed helpers. Assisted-by: Codex:gpt-5-5 Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260612215315.1889039-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/power/supply/maxim,max17042.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml index 242b33f2bcba..8687009b4057 100644 --- a/Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml +++ b/Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml @@ -44,13 +44,13 @@ properties: Defining this property enables current-sense functionality. maxim,cold-temp: - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: /schemas/types.yaml#/definitions/int32 description: Temperature threshold to report battery as cold (in tenths of degree Celsius). Default is not to report cold events. maxim,over-heat-temp: - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: /schemas/types.yaml#/definitions/int32 description: Temperature threshold to report battery as over heated (in tenths of degree Celsius). Default is not to report over heating events. From 49b5cf461dd74142bdac50127d146b391af3f151 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jul 2026 19:41:29 +0200 Subject: [PATCH 14/40] dtc: dt-check-style: Narrow disallowing of tab in DTS only to YAML DTS in the bindings (example in a YAML file) does not have tabs at all, but regular DTS do, therefore entire check check_tab_in_dts() has confusing name and should apply only to YAML files. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260709-dts-style-checker-v5-1-fcc147cb697d@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- scripts/dtc/dt-check-style | 8 ++++---- .../dt-style-selftest/expected/yaml-mixed-indent.yaml.txt | 2 +- scripts/dtc/dt-style-selftest/expected/yaml-tab.yaml.txt | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/scripts/dtc/dt-check-style b/scripts/dtc/dt-check-style index 2d5723d41ea3..29b25ecf15c6 100755 --- a/scripts/dtc/dt-check-style +++ b/scripts/dtc/dt-check-style @@ -340,7 +340,7 @@ def check_trailing_whitespace(ctx): yield (dl.lineno, 'trailing whitespace') -def check_tab_in_dts(ctx): +def check_tab_in_yaml_example(ctx): """Reject literal tabs in DTS lines when input is YAML. For YAML examples, indent and content must use spaces. Tabs inside @@ -927,9 +927,9 @@ RULES = [ Rule('trailing-whitespace', 'relaxed', 'no trailing whitespace on any line', check_trailing_whitespace), - Rule('tab-in-dts', 'relaxed', - 'YAML examples may not contain tab characters', - check_tab_in_dts, applies_to=('yaml',)), + Rule('tab-in-yaml', 'relaxed', + 'YAML (also DTS examples) may not contain tab characters', + check_tab_in_yaml_example, applies_to=('yaml',)), Rule('mixed-indent-chars', 'relaxed', 'indent must not mix tabs and spaces', check_mixed_indent_chars), diff --git a/scripts/dtc/dt-style-selftest/expected/yaml-mixed-indent.yaml.txt b/scripts/dtc/dt-style-selftest/expected/yaml-mixed-indent.yaml.txt index c989f8f19853..4b3d990e0824 100644 --- a/scripts/dtc/dt-style-selftest/expected/yaml-mixed-indent.yaml.txt +++ b/scripts/dtc/dt-style-selftest/expected/yaml-mixed-indent.yaml.txt @@ -1,3 +1,3 @@ # mode=relaxed bad/yaml-mixed-indent.yaml:27: example 0 [mixed-indent-chars] mixed tabs and spaces in indent -bad/yaml-mixed-indent.yaml:27: example 0 [tab-in-dts] tab character not allowed in DTS example +bad/yaml-mixed-indent.yaml:27: example 0 [tab-in-yaml] tab character not allowed in DTS example diff --git a/scripts/dtc/dt-style-selftest/expected/yaml-tab.yaml.txt b/scripts/dtc/dt-style-selftest/expected/yaml-tab.yaml.txt index 9e83246fbaa1..0bc67ae48dd8 100644 --- a/scripts/dtc/dt-style-selftest/expected/yaml-tab.yaml.txt +++ b/scripts/dtc/dt-style-selftest/expected/yaml-tab.yaml.txt @@ -1,2 +1,2 @@ # mode=relaxed -bad/yaml-tab.yaml:28: example 0 [tab-in-dts] tab character not allowed in DTS example +bad/yaml-tab.yaml:28: example 0 [tab-in-yaml] tab character not allowed in DTS example From 32541ce0ae38e65c901fdf9814ae00034d77db35 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jul 2026 19:41:30 +0200 Subject: [PATCH 15/40] dtc: dt-check-style: Allow space-aligning indentation in DTS DTS often have spaces after tabs in indentation for aligning continued lines of comments or list properties, thus allow such cases to avoid many false positives. What we can easily detect is a space followed by tab or too many spaces (more than alignment). OTOH, DTS example in YAML files does not have tabs at all and there is already rule for that, thus there is no point to check for mixed indentation there. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260709-dts-style-checker-v5-2-fcc147cb697d@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- scripts/dtc/dt-check-style | 16 +++++++++++--- .../bad/dts-mixed-indent.dts | 21 +++++++++++++++++++ .../expected/dts-mixed-indent.dts.txt | 9 ++++++++ .../expected/yaml-mixed-indent.yaml.txt | 1 - 4 files changed, 43 insertions(+), 4 deletions(-) create mode 100644 scripts/dtc/dt-style-selftest/bad/dts-mixed-indent.dts create mode 100644 scripts/dtc/dt-style-selftest/expected/dts-mixed-indent.dts.txt diff --git a/scripts/dtc/dt-check-style b/scripts/dtc/dt-check-style index 29b25ecf15c6..e715fb1e741c 100755 --- a/scripts/dtc/dt-check-style +++ b/scripts/dtc/dt-check-style @@ -359,14 +359,24 @@ def check_tab_in_yaml_example(ctx): def check_mixed_indent_chars(ctx): - """Indent must be all-spaces or all-tabs, never mixed on one line.""" + """Indent must be all-tabs, except for aligning indentation (comments + or continued lines).""" for dl in ctx.lines: if not dl.indent_str: continue if dl.linetype == LineType.PREPROCESSOR: continue - if ' ' in dl.indent_str and '\t' in dl.indent_str: + if re.search(r' \t', dl.indent_str): yield (dl.lineno, 'mixed tabs and spaces in indent') + if dl.indent_str.count(' ') > 7: + yield (dl.lineno, 'too many space characters in indent (more than 7)') + for cont in dl.continuations: + if not cont.indent_str: + continue + if cont.linetype == LineType.PREPROCESSOR: + continue + if re.search(r' \t', cont.indent_str): + yield (cont.lineno, 'mixed tabs and spaces in indent') def detect_indent_unit(ctx): @@ -932,7 +942,7 @@ RULES = [ check_tab_in_yaml_example, applies_to=('yaml',)), Rule('mixed-indent-chars', 'relaxed', 'indent must not mix tabs and spaces', - check_mixed_indent_chars), + check_mixed_indent_chars, applies_to=('dts', 'dtsi', 'dtso')), Rule('unclosed-block-comment', 'relaxed', 'every /* block comment must close with */', check_unclosed_block_comment), diff --git a/scripts/dtc/dt-style-selftest/bad/dts-mixed-indent.dts b/scripts/dtc/dt-style-selftest/bad/dts-mixed-indent.dts new file mode 100644 index 000000000000..cd3de04ec5a9 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/bad/dts-mixed-indent.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/* Test fixture: a .dts using wrong indent. */ + +/dts-v1/; + +/ { + compatible = "example,test-board"; + #address-cells = <1>; + #size-cells = <1>; + + soc@0 { + compatible = "simple-bus"; + ranges = <0 0 0 0xc0000000>; + + clocks = <1>, + <2>, + <3>, + <4>; + resets = <5>; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/expected/dts-mixed-indent.dts.txt b/scripts/dtc/dt-style-selftest/expected/dts-mixed-indent.dts.txt new file mode 100644 index 000000000000..93146cfb51c7 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/expected/dts-mixed-indent.dts.txt @@ -0,0 +1,9 @@ +# mode=strict +bad/dts-mixed-indent.dts:11: [indent-consistent] indent mismatch (expected depth 1 * '\t') +bad/dts-mixed-indent.dts:11: [mixed-indent-chars] too many space characters in indent (more than 7) +bad/dts-mixed-indent.dts:12: [indent-consistent] indent mismatch (expected depth 2 * '\t') +bad/dts-mixed-indent.dts:12: [mixed-indent-chars] mixed tabs and spaces in indent +bad/dts-mixed-indent.dts:13: [indent-consistent] indent mismatch (expected depth 2 * '\t') +bad/dts-mixed-indent.dts:13: [mixed-indent-chars] mixed tabs and spaces in indent +bad/dts-mixed-indent.dts:16: [mixed-indent-chars] mixed tabs and spaces in indent +bad/dts-mixed-indent.dts:19: [indent-consistent] indent mismatch (expected depth 2 * '\t') diff --git a/scripts/dtc/dt-style-selftest/expected/yaml-mixed-indent.yaml.txt b/scripts/dtc/dt-style-selftest/expected/yaml-mixed-indent.yaml.txt index 4b3d990e0824..bc3fc3cf00cc 100644 --- a/scripts/dtc/dt-style-selftest/expected/yaml-mixed-indent.yaml.txt +++ b/scripts/dtc/dt-style-selftest/expected/yaml-mixed-indent.yaml.txt @@ -1,3 +1,2 @@ # mode=relaxed -bad/yaml-mixed-indent.yaml:27: example 0 [mixed-indent-chars] mixed tabs and spaces in indent bad/yaml-mixed-indent.yaml:27: example 0 [tab-in-yaml] tab character not allowed in DTS example From 46fb56e45526c35b7f9b0e79104a4a5140d00f44 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jul 2026 19:41:31 +0200 Subject: [PATCH 16/40] dtc: dt-check-style: Rework handling YAML/DTS in rules Individual rules behave differently depending whether they handle bindings (YAML) or DTS, but the code was focusing on type of indentation (spaces vs tabs). That indentation is actually irrelevant in some rules, so differentiate based on file type. This will be more relevant in the future when more rules act differently on DTS, than on bindings. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260709-dts-style-checker-v5-3-fcc147cb697d@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- scripts/dtc/dt-check-style | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/scripts/dtc/dt-check-style b/scripts/dtc/dt-check-style index e715fb1e741c..f5276b5fdd46 100755 --- a/scripts/dtc/dt-check-style +++ b/scripts/dtc/dt-check-style @@ -311,13 +311,16 @@ def collect_labels_and_refs(text): class Ctx: """Context passed to each rule check. Carries the parsed lines, - raw text, mode, and indent kind.""" + raw text, mode and kind.""" - def __init__(self, lines, text, mode, indent_kind): + def __init__(self, lines, text, mode, kind): self.lines = lines self.text = text self.mode = mode # 'relaxed' or 'strict' - self.indent_kind = indent_kind # 'spaces' or 'tab' + if kind in DTS_FAMILY: + self.file_type = 'dts' + else: + self.file_type = 'yaml' class Rule: @@ -347,7 +350,7 @@ def check_tab_in_yaml_example(ctx): a #define value are tolerated (those are CPP macros, not DTS). For .dts files, this rule does not apply -- tabs are required. """ - if ctx.indent_kind != 'spaces': + if ctx.file_type != 'yaml': return for dl in ctx.lines: if dl.linetype == LineType.PREPROCESSOR: @@ -427,7 +430,7 @@ def check_indent_unit_strict(ctx): unit = detect_indent_unit(ctx) if unit is None: return - if ctx.indent_kind == 'spaces': + if ctx.file_type == 'yaml': if unit != ' ': yield (1, 'indent unit must be 4 spaces in strict mode, ' 'got %r' % unit) @@ -438,7 +441,7 @@ def check_indent_consistent(ctx): unit = detect_indent_unit(ctx) if unit is None: return - if ctx.indent_kind == 'spaces': + if ctx.file_type == 'yaml': if unit not in (' ', ' '): return # let check_indent_unit_* report this else: @@ -1023,11 +1026,11 @@ def select_rules(mode, input_kind): # Block runner # --------------------------------------------------------------------------- -def check_block(text, mode, indent_kind, input_type): +def check_block(text, mode, input_type): """Run all selected rules on a single block of DTS text. Returns a list of (lineno, rule_name, message) tuples.""" lines = classify_lines(text) - ctx = Ctx(lines, text, mode, indent_kind) + ctx = Ctx(lines, text, mode, input_type) rules = select_rules(mode, input_type) findings = [] for r in rules: @@ -1107,17 +1110,15 @@ def collect_findings(filepath, mode): formatted output strings; count is the number of findings.""" kind = input_kind(filepath) if kind == 'yaml': - indent_kind = 'spaces' iterator = iter_yaml_examples(filepath) elif kind in DTS_FAMILY: - indent_kind = 'tab' iterator = iter_dts_file(filepath) else: return (['%s: unknown file type, skipping' % filepath], 0) out = [] for text, base, idx in iterator: - for lineno, rule, msg in check_block(text, mode, indent_kind, kind): + for lineno, rule, msg in check_block(text, mode, kind): abs_line = base + lineno - 1 ex_tag = '' if idx is None else ' example %d' % idx out.append('%s:%d:%s [%s] %s' % From 597233e29855fcdd225114d7c618ca8c6f35bc7a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jul 2026 19:41:32 +0200 Subject: [PATCH 17/40] dtc: dt-check-style: Expect first device_type A few nodes do have "device_type" property which is mostly, but not always, the first property in a device node, when applicable. Adjust the DTS coding style rules to actually expect the device_type first and improve the dt-check-style to handle this correctly. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260709-dts-style-checker-v5-4-fcc147cb697d@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/dts-coding-style.rst | 15 ++++--- scripts/dtc/dt-check-style | 33 +++++++------- .../bad/dts-property-order.dts | 43 +++++++++++++++++++ .../bad/yaml-prop-order-device-type.yaml | 31 +++++++++++++ .../expected/dts-property-order.dts.txt | 6 +++ .../yaml-prop-order-device-type.yaml.txt | 2 + .../good/dts-property-order.dts | 41 ++++++++++++++++++ 7 files changed, 149 insertions(+), 22 deletions(-) create mode 100644 scripts/dtc/dt-style-selftest/bad/dts-property-order.dts create mode 100644 scripts/dtc/dt-style-selftest/bad/yaml-prop-order-device-type.yaml create mode 100644 scripts/dtc/dt-style-selftest/expected/dts-property-order.dts.txt create mode 100644 scripts/dtc/dt-style-selftest/expected/yaml-prop-order-device-type.yaml.txt create mode 100644 scripts/dtc/dt-style-selftest/good/dts-property-order.dts diff --git a/Documentation/devicetree/bindings/dts-coding-style.rst b/Documentation/devicetree/bindings/dts-coding-style.rst index 4a02ea60cbbe..63648db377e1 100644 --- a/Documentation/devicetree/bindings/dts-coding-style.rst +++ b/Documentation/devicetree/bindings/dts-coding-style.rst @@ -114,15 +114,16 @@ Order of Properties in Device Node The following order of properties in device nodes is preferred: -1. "compatible" -2. "reg" -3. "ranges" -4. Standard/common properties (defined by common bindings, e.g. without +1. "device_type" (if applicable) +2. "compatible" +3. "reg" +4. "ranges" +5. Standard/common properties (defined by common bindings, e.g. without vendor-prefixes) -5. Vendor-specific properties -6. "status" (if applicable), preceded by a blank line if there is content +6. Vendor-specific properties +7. "status" (if applicable), preceded by a blank line if there is content before the property -7. Child nodes, where each node is preceded with a blank line +8. Child nodes, where each node is preceded with a blank line The "status" property is by default "okay", thus it can be omitted. diff --git a/scripts/dtc/dt-check-style b/scripts/dtc/dt-check-style index f5276b5fdd46..d19ef26c2213 100755 --- a/scripts/dtc/dt-check-style +++ b/scripts/dtc/dt-check-style @@ -565,28 +565,31 @@ def check_child_name_order(ctx): def _property_bucket(name): """Return the canonical bucket index for a property: - 0 compatible - 1 reg / reg-names - 2 ranges - 3 standard properties (no vendor comma in #-stripped name) - 4 vendor-specific properties - 5 status - Plus a sub-key inside the bucket for fixed slots (compatible, reg, - reg-names, ranges, status). 'standard' and 'vendor' return None for + 0 device_type + 1 compatible + 2 reg / reg-names + 3 ranges + 4 standard properties (no vendor comma in #-stripped name) + 5 vendor-specific properties + 6 status + Plus a sub-key inside the bucket for fixed slots (device_type, compatible, + reg, reg-names, ranges, status). 'standard' and 'vendor' return None for the sub-key, signalling that the within-bucket key is computed by the pairing rules.""" stripped = name.lstrip('#') - if name == 'compatible': + if name == 'device_type': return (0, 0) - if name == 'reg': + if name == 'compatible': return (1, 0) - if name == 'reg-names': - return (1, 1) - if name == 'ranges': + if name == 'reg': return (2, 0) + if name == 'reg-names': + return (2, 1) + if name == 'ranges': + return (3, 0) if name == 'status': - return (5, 0) - return (4 if ',' in stripped else 3, None) + return (6, 0) + return (5 if ',' in stripped else 4, None) # Declarative pairing rules: each is a callable diff --git a/scripts/dtc/dt-style-selftest/bad/dts-property-order.dts b/scripts/dtc/dt-style-selftest/bad/dts-property-order.dts new file mode 100644 index 000000000000..f31abb6ceae4 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/bad/dts-property-order.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/* + * Test fixture: Incorrect property order + */ + +/dts-v1/; + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + reg = <0x0 0x0>; + compatible = "arm,cortex-a57"; + device_type = "cpu"; + enable-method = "psci"; + }; + }; + + pmu { + compatible = "example,pmu"; + + status = "disabled"; + dma-coherent; + }; + + soc@0 { + ranges = <0 0 0 0xc0000000>; + compatible = "simple-bus"; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-controller@10000 { + reg = <0x10000 0x1000>; + interrupts = <1 2 3>, + <4 5 6>, + <7 8 9>; + compatible = "example,intc"; + }; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/bad/yaml-prop-order-device-type.yaml b/scripts/dtc/dt-style-selftest/bad/yaml-prop-order-device-type.yaml new file mode 100644 index 000000000000..e2c69e9ff452 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/bad/yaml-prop-order-device-type.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/test-bad-prop-order.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Test fixture with device_type + +maintainers: + - Test User + +properties: + compatible: + const: example,test-prop-order-device-type + reg: + maxItems: 1 + device_type: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + device@1000 { + compatible = "example,test-prop-order-device-type"; + device_type = "cpu"; + reg = <0x1000 0x100>; + }; diff --git a/scripts/dtc/dt-style-selftest/expected/dts-property-order.dts.txt b/scripts/dtc/dt-style-selftest/expected/dts-property-order.dts.txt new file mode 100644 index 000000000000..4bc21328625f --- /dev/null +++ b/scripts/dtc/dt-style-selftest/expected/dts-property-order.dts.txt @@ -0,0 +1,6 @@ +# mode=strict +bad/dts-property-order.dts:15: [property-order] property 'compatible' out of canonical order (should sort before 'reg') +bad/dts-property-order.dts:16: [property-order] property 'device_type' out of canonical order (should sort before 'compatible') +bad/dts-property-order.dts:25: [property-order] property 'dma-coherent' out of canonical order (should sort before 'status') +bad/dts-property-order.dts:30: [property-order] property 'compatible' out of canonical order (should sort before 'ranges') +bad/dts-property-order.dts:40: [property-order] property 'compatible' out of canonical order (should sort before 'interrupts') diff --git a/scripts/dtc/dt-style-selftest/expected/yaml-prop-order-device-type.yaml.txt b/scripts/dtc/dt-style-selftest/expected/yaml-prop-order-device-type.yaml.txt new file mode 100644 index 000000000000..9350e2b80f75 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/expected/yaml-prop-order-device-type.yaml.txt @@ -0,0 +1,2 @@ +# mode=strict +bad/yaml-prop-order-device-type.yaml:29: example 0 [property-order] property 'device_type' out of canonical order (should sort before 'compatible') diff --git a/scripts/dtc/dt-style-selftest/good/dts-property-order.dts b/scripts/dtc/dt-style-selftest/good/dts-property-order.dts new file mode 100644 index 000000000000..0e183e3459cd --- /dev/null +++ b/scripts/dtc/dt-style-selftest/good/dts-property-order.dts @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/* + * Test fixture: Incorrect property order + */ + +/dts-v1/; + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + }; + + pmu { + compatible = "example,pmu"; + dma-coherent; + + status = "disabled"; + }; + + soc@0 { + compatible = "simple-bus"; + ranges = <0 0 0 0xc0000000>; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-controller@10000 { + compatible = "example,intc"; + reg = <0x10000 0x1000>; + interrupts = <1 2 3>; + }; + }; +}; From 29a91b7593c21b88f0fc22884cf6a8beba215f0e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jul 2026 19:41:33 +0200 Subject: [PATCH 18/40] dtc: dt-check-style: Handle properly DTC-style includes dt-check-style was not properly handling DTC directives (starting with '/', e.g. /dts-v1/ or /include/), thus a few DTS files had false positive like: apm/apm-merlin.dts:1: [indent-unit-dts] indent unit must be 1 tab in DTS, got '\t\t' Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260709-dts-style-checker-v5-5-fcc147cb697d@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- scripts/dtc/dt-check-style | 11 ++++- .../dtc/dt-style-selftest/good/dts-dtc.dts | 21 +++++++++ .../good/dts-preprocessor.dts | 21 +++++++++ scripts/dtc/dt-style-selftest/good/soc.dtsi | 47 +++++++++++++++++++ 4 files changed, 98 insertions(+), 2 deletions(-) create mode 100644 scripts/dtc/dt-style-selftest/good/dts-dtc.dts create mode 100644 scripts/dtc/dt-style-selftest/good/dts-preprocessor.dts create mode 100644 scripts/dtc/dt-style-selftest/good/soc.dtsi diff --git a/scripts/dtc/dt-check-style b/scripts/dtc/dt-check-style index d19ef26c2213..ad07b0d27470 100755 --- a/scripts/dtc/dt-check-style +++ b/scripts/dtc/dt-check-style @@ -49,6 +49,9 @@ re_cpp_directive = re.compile( r'^#\s*(include|define|undef|ifdef|ifndef|if|else|elif|endif|' r'pragma|error|warning)\b') +re_dtc_directive = re.compile( + r'^/(dts-v1|include)/') + # label: name@addr { -- label and addr optional; name can be "/" # Per the DT spec a node name may start with a digit (e.g. 1wire@...). # The address part is captured loosely (any non-space, non-brace run) so @@ -66,7 +69,11 @@ re_ref_node = re.compile( def is_preprocessor(stripped): """Tell C preprocessor directives apart from DTS '#'-prefixed props.""" - return re_cpp_directive.match(stripped) is not None + if re_cpp_directive.match(stripped) is not None: + return True + if re_dtc_directive.match(stripped) is not None: + return True + return False class DtsLine: @@ -178,7 +185,7 @@ def classify_lines(text): out.append(dl) continue - if stripped.startswith('#') and is_preprocessor(stripped): + if (stripped.startswith('#') or stripped.startswith('/')) and is_preprocessor(stripped): dl = DtsLine(i, raw, LineType.PREPROCESSOR, indent_str, stripped) dl.depth = depth diff --git a/scripts/dtc/dt-style-selftest/good/dts-dtc.dts b/scripts/dtc/dt-style-selftest/good/dts-dtc.dts new file mode 100644 index 000000000000..a3207196214c --- /dev/null +++ b/scripts/dtc/dt-style-selftest/good/dts-dtc.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/* + * Test fixture: dtc directive + */ + +/dts-v1/; + +/include/ "soc.dtsi" +/include/"soc-other.dtsi" + +/ { + compatible = "example,test-board"; + #address-cells = <1>; + #size-cells = <1>; + + leds { + led-0 { + compatible = "example,led"; + }; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/good/dts-preprocessor.dts b/scripts/dtc/dt-style-selftest/good/dts-preprocessor.dts new file mode 100644 index 000000000000..bd6d9dddec73 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/good/dts-preprocessor.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/* + * Test fixture: preprocessor directive + */ + +/dts-v1/; + +#include "soc.dtsi" +#include + +/ { + compatible = "example,test-board"; + #address-cells = <1>; + #size-cells = <1>; + + leds { + led-0 { + compatible = "example,led"; + }; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/good/soc.dtsi b/scripts/dtc/dt-style-selftest/good/soc.dtsi new file mode 100644 index 000000000000..c60274469555 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/good/soc.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + }; + + pmu { + compatible = "example,pmu"; + }; + + soc@0 { + compatible = "simple-bus"; + ranges = <0 0 0 0xc0000000>; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-controller@10000 { + compatible = "example,intc"; + reg = <0x10000 0x1000>; + interrupts = <1 2 3>, + <4 5 6>, + <7 8 9>; + }; + + serial@20000 { + compatible = "example,serial"; + reg = <0x20000 0x1000>; + }; + + serial@30000 { + compatible = "example,serial"; + reg = <0x30000 0x1000>; + }; + }; +}; From 42879c68b7e269aac336129caa5711aad1b25bdc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jul 2026 19:41:34 +0200 Subject: [PATCH 19/40] dtc: dt-check-style: Print proper line number of indentation detection place Script judges the indentation however always suggests it is the first line which is wrong, e.g.: sigmastar/mstar-infinity2m.dtsi:1: [indent-unit-dts] indent unit must be 1 tab in DTS, got '\t\t' Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260709-dts-style-checker-v5-6-fcc147cb697d@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- scripts/dtc/dt-check-style | 29 ++++++++++--------- .../expected/dts-spaces.dts.txt | 2 +- .../expected/yaml-indent-strict.yaml.txt | 2 +- 3 files changed, 17 insertions(+), 16 deletions(-) diff --git a/scripts/dtc/dt-check-style b/scripts/dtc/dt-check-style index ad07b0d27470..3985923622e8 100755 --- a/scripts/dtc/dt-check-style +++ b/scripts/dtc/dt-check-style @@ -392,8 +392,9 @@ def check_mixed_indent_chars(ctx): def detect_indent_unit(ctx): """Find the indent unit used at depth 1 in this block. - Returns one of: ' ' (2 spaces), ' ' (4 spaces), '\\t' (tab), - or None if depth-1 is empty or ambiguous.""" + Returns tuple of string (one of: ' ' (2 spaces), ' ' (4 spaces), + '\\t' (tab), or None if depth-1 is empty or ambiguous) and line number when + detection was made).""" for dl in ctx.lines: if dl.depth != 1: continue @@ -404,48 +405,48 @@ def detect_indent_unit(ctx): if not dl.indent_str: continue if dl.indent_str == '\t': - return '\t' + return ('\t', dl.lineno) if dl.indent_str == ' ': - return ' ' + return (' ', dl.lineno) if dl.indent_str == ' ': - return ' ' + return (' ', dl.lineno) # Anything else at depth 1 is non-canonical; flag elsewhere. - return dl.indent_str - return None + return (dl.indent_str, dl.lineno) + return (None, None) def check_indent_unit_relaxed(ctx): """YAML examples: 2 or 4 spaces. Never tabs or other widths.""" - unit = detect_indent_unit(ctx) + (unit, lineno) = detect_indent_unit(ctx) if unit is None: return if unit not in (' ', ' '): - yield (1, 'indent unit must be 2 or 4 spaces, got %r' % unit) + yield (lineno, 'indent unit must be 2 or 4 spaces, got %r' % unit) def check_indent_unit_dts(ctx): """DTS files: 1 tab per level. Always required.""" - unit = detect_indent_unit(ctx) + (unit, lineno) = detect_indent_unit(ctx) if unit is None: return if unit != '\t': - yield (1, 'indent unit must be 1 tab in DTS, got %r' % unit) + yield (lineno, 'indent unit must be 1 tab in DTS, got %r' % unit) def check_indent_unit_strict(ctx): """YAML: must be exactly 4 spaces. DTS: 1 tab (same as relaxed).""" - unit = detect_indent_unit(ctx) + (unit, lineno) = detect_indent_unit(ctx) if unit is None: return if ctx.file_type == 'yaml': if unit != ' ': - yield (1, 'indent unit must be 4 spaces in strict mode, ' + yield (lineno, 'indent unit must be 4 spaces in strict mode, ' 'got %r' % unit) def check_indent_consistent(ctx): """All indented lines must be a multiple of the detected unit.""" - unit = detect_indent_unit(ctx) + (unit, lineno) = detect_indent_unit(ctx) if unit is None: return if ctx.file_type == 'yaml': diff --git a/scripts/dtc/dt-style-selftest/expected/dts-spaces.dts.txt b/scripts/dtc/dt-style-selftest/expected/dts-spaces.dts.txt index 070025c4568c..5afdb101dcee 100644 --- a/scripts/dtc/dt-style-selftest/expected/dts-spaces.dts.txt +++ b/scripts/dtc/dt-style-selftest/expected/dts-spaces.dts.txt @@ -1,2 +1,2 @@ # mode=relaxed -bad/dts-spaces.dts:1: [indent-unit-dts] indent unit must be 1 tab in DTS, got ' ' +bad/dts-spaces.dts:9: [indent-unit-dts] indent unit must be 1 tab in DTS, got ' ' diff --git a/scripts/dtc/dt-style-selftest/expected/yaml-indent-strict.yaml.txt b/scripts/dtc/dt-style-selftest/expected/yaml-indent-strict.yaml.txt index 5ef290d3a847..c4f31deea4ca 100644 --- a/scripts/dtc/dt-style-selftest/expected/yaml-indent-strict.yaml.txt +++ b/scripts/dtc/dt-style-selftest/expected/yaml-indent-strict.yaml.txt @@ -1,2 +1,2 @@ # mode=strict -bad/yaml-indent-strict.yaml:26: example 0 [indent-unit-strict] indent unit must be 4 spaces in strict mode, got ' ' +bad/yaml-indent-strict.yaml:27: example 0 [indent-unit-strict] indent unit must be 4 spaces in strict mode, got ' ' From 564df03aa54a957e34ccb272610d097f819da7f0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jul 2026 19:41:35 +0200 Subject: [PATCH 20/40] dtc: dt-check-style: Add more DTS test cases Add a few more test cases for valid and incorrect DTS for dt-check-style. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260709-dts-style-checker-v5-7-fcc147cb697d@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../bad/dts-child-name-order.dts | 30 ++++++++++++++ .../bad/dts-extend-node-child-name-order.dts | 23 +++++++++++ .../bad/dts-extend-node-digit-node-order.dts | 31 ++++++++++++++ .../expected/dts-child-name-order.dts.txt | 2 + .../dts-extend-node-child-name-order.dts.txt | 2 + .../dts-extend-node-digit-node-order.dts.txt | 2 + .../good/dts-child-name-order.dts | 30 ++++++++++++++ .../good/dts-digit-node-order.dts | 41 +++++++++++++++++++ .../good/dts-extend-node-child-name-order.dts | 23 +++++++++++ .../good/dts-extend-node-digit-node-order.dts | 31 ++++++++++++++ 10 files changed, 215 insertions(+) create mode 100644 scripts/dtc/dt-style-selftest/bad/dts-child-name-order.dts create mode 100644 scripts/dtc/dt-style-selftest/bad/dts-extend-node-child-name-order.dts create mode 100644 scripts/dtc/dt-style-selftest/bad/dts-extend-node-digit-node-order.dts create mode 100644 scripts/dtc/dt-style-selftest/expected/dts-child-name-order.dts.txt create mode 100644 scripts/dtc/dt-style-selftest/expected/dts-extend-node-child-name-order.dts.txt create mode 100644 scripts/dtc/dt-style-selftest/expected/dts-extend-node-digit-node-order.dts.txt create mode 100644 scripts/dtc/dt-style-selftest/good/dts-child-name-order.dts create mode 100644 scripts/dtc/dt-style-selftest/good/dts-digit-node-order.dts create mode 100644 scripts/dtc/dt-style-selftest/good/dts-extend-node-child-name-order.dts create mode 100644 scripts/dtc/dt-style-selftest/good/dts-extend-node-digit-node-order.dts diff --git a/scripts/dtc/dt-style-selftest/bad/dts-child-name-order.dts b/scripts/dtc/dt-style-selftest/bad/dts-child-name-order.dts new file mode 100644 index 000000000000..49c5c10c92d7 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/bad/dts-child-name-order.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/ { + #address-cells = <1>; + #size-cells = <1>; + + pmu { + compatible = "example,pmu"; + + /* Include labels to be sure they do not affect sorting */ + foo: foo { + label = "foo"; + }; + + label_bar: bar { + label = "bar"; + }; + }; + + memory@a0000000 { + device_type = "memory"; + reg = <0x0 0xa0000000 0x0 0x0>; + }; + + pmu-2 { + compatible = "example,pmu"; + + /* Just reference labels to avoid strict warnings */ + example,foo = <&foo>, <&label_bar>; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/bad/dts-extend-node-child-name-order.dts b/scripts/dtc/dt-style-selftest/bad/dts-extend-node-child-name-order.dts new file mode 100644 index 000000000000..575dadd03c38 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/bad/dts-extend-node-child-name-order.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/ { + #address-cells = <1>; + #size-cells = <1>; + + pmu { + compatible = "example,pmu"; + + /* Just reference labels to avoid strict warnings */ + example,foo = <&foo>, <&label_bar>; + }; +}; + +&pmu { + /* Include labels to be sure they do not affect sorting */ + foo: foo { + label = "foo"; + }; + + label_bar: bar { + label = "bar"; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/bad/dts-extend-node-digit-node-order.dts b/scripts/dtc/dt-style-selftest/bad/dts-extend-node-digit-node-order.dts new file mode 100644 index 000000000000..f3ffc47365a3 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/bad/dts-extend-node-digit-node-order.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/ { + #address-cells = <1>; + #size-cells = <1>; + + soc: soc@0 { + compatible = "simple-bus"; + ranges = <0 0 0 0xc0000000>; + + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&soc { + serial@20000 { + compatible = "example,serial"; + reg = <0x20000 0x1000>; + }; + + interrupt-controller@10000 { + compatible = "example,intc"; + reg = <0x10000 0x1000>; + interrupts = <1 2 3>; + }; + + serial@30000 { + compatible = "example,serial"; + reg = <0x30000 0x1000>; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/expected/dts-child-name-order.dts.txt b/scripts/dtc/dt-style-selftest/expected/dts-child-name-order.dts.txt new file mode 100644 index 000000000000..86b1de9bd654 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/expected/dts-child-name-order.dts.txt @@ -0,0 +1,2 @@ +# mode=strict +bad/dts-child-name-order.dts:14: [child-name-order] child node 'bar' out of name order diff --git a/scripts/dtc/dt-style-selftest/expected/dts-extend-node-child-name-order.dts.txt b/scripts/dtc/dt-style-selftest/expected/dts-extend-node-child-name-order.dts.txt new file mode 100644 index 000000000000..e3d8fd367e09 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/expected/dts-extend-node-child-name-order.dts.txt @@ -0,0 +1,2 @@ +# mode=strict +bad/dts-extend-node-child-name-order.dts:20: [child-name-order] child node 'bar' out of name order diff --git a/scripts/dtc/dt-style-selftest/expected/dts-extend-node-digit-node-order.dts.txt b/scripts/dtc/dt-style-selftest/expected/dts-extend-node-digit-node-order.dts.txt new file mode 100644 index 000000000000..525081867bf7 --- /dev/null +++ b/scripts/dtc/dt-style-selftest/expected/dts-extend-node-digit-node-order.dts.txt @@ -0,0 +1,2 @@ +# mode=strict +bad/dts-extend-node-digit-node-order.dts:21: [child-address-order] child node @10000 out of address order diff --git a/scripts/dtc/dt-style-selftest/good/dts-child-name-order.dts b/scripts/dtc/dt-style-selftest/good/dts-child-name-order.dts new file mode 100644 index 000000000000..d2a278763c3c --- /dev/null +++ b/scripts/dtc/dt-style-selftest/good/dts-child-name-order.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/ { + #address-cells = <1>; + #size-cells = <1>; + + memory@a0000000 { + device_type = "memory"; + reg = <0x0 0xa0000000 0x0 0x0>; + }; + + pmu { + compatible = "example,pmu"; + + /* Include labels to be sure they do not affect sorting */ + label_bar: bar { + label = "bar"; + }; + + foo: foo { + label = "foo"; + }; + }; + + pmu-2 { + compatible = "example,pmu"; + + /* Just reference labels to avoid strict warnings */ + example,foo = <&foo>, <&label_bar>; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/good/dts-digit-node-order.dts b/scripts/dtc/dt-style-selftest/good/dts-digit-node-order.dts new file mode 100644 index 000000000000..d2bf5861c3ee --- /dev/null +++ b/scripts/dtc/dt-style-selftest/good/dts-digit-node-order.dts @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/ { + #address-cells = <1>; + #size-cells = <1>; + + /* TODO: uncomment when child-address-order is fixed for top-level */ + /* + memory@a0000000 { + device_type = "memory"; + reg = <0x0 0xa0000000 0x0 0x0>; + }; + */ + + pmu { + compatible = "example,pmu"; + }; + + soc@0 { + compatible = "simple-bus"; + ranges = <0 0 0 0xc0000000>; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-controller@10000 { + compatible = "example,intc"; + reg = <0x10000 0x1000>; + interrupts = <1 2 3>; + }; + + serial@20000 { + compatible = "example,serial"; + reg = <0x20000 0x1000>; + }; + + serial@30000 { + compatible = "example,serial"; + reg = <0x30000 0x1000>; + }; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/good/dts-extend-node-child-name-order.dts b/scripts/dtc/dt-style-selftest/good/dts-extend-node-child-name-order.dts new file mode 100644 index 000000000000..47fe5455edfa --- /dev/null +++ b/scripts/dtc/dt-style-selftest/good/dts-extend-node-child-name-order.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/ { + #address-cells = <1>; + #size-cells = <1>; + + pmu { + compatible = "example,pmu"; + + /* Just reference labels to avoid strict warnings */ + example,foo = <&foo>, <&label_bar>; + }; +}; + +&pmu { + /* Include labels to be sure they do not affect sorting */ + label_bar: bar { + label = "bar"; + }; + + foo: foo { + label = "foo"; + }; +}; diff --git a/scripts/dtc/dt-style-selftest/good/dts-extend-node-digit-node-order.dts b/scripts/dtc/dt-style-selftest/good/dts-extend-node-digit-node-order.dts new file mode 100644 index 000000000000..0c292fefa52a --- /dev/null +++ b/scripts/dtc/dt-style-selftest/good/dts-extend-node-digit-node-order.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/ { + #address-cells = <1>; + #size-cells = <1>; + + soc: soc@0 { + compatible = "simple-bus"; + ranges = <0 0 0 0xc0000000>; + + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&soc { + interrupt-controller@10000 { + compatible = "example,intc"; + reg = <0x10000 0x1000>; + interrupts = <1 2 3>; + }; + + serial@20000 { + compatible = "example,serial"; + reg = <0x20000 0x1000>; + }; + + serial@30000 { + compatible = "example,serial"; + reg = <0x30000 0x1000>; + }; +}; From 1404bf347918587b8f252e3fdd65d8d7d9083445 Mon Sep 17 00:00:00 2001 From: Laszlo Ersek Date: Mon, 20 Jul 2026 18:02:30 +0200 Subject: [PATCH 21/40] dt-bindings: update Sudeep Holla's email address MAINTAINERS disagrees with Documentation/devicetree/bindings on Sudeep's email address; fix the latter. Fixes: 59e82a4237cf ("MAINTAINERS: Change Sudeep Holla's email address") Signed-off-by: Laszlo Ersek Acked-by: Sudeep Holla Link: https://patch.msgid.link/20260720160235.36592-1-laszlo.ersek@arm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/arm,juno-fpga-apb-regs.yaml | 2 +- Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml | 2 +- Documentation/devicetree/bindings/arm/arm,vexpress-scc.yaml | 2 +- Documentation/devicetree/bindings/dvfs/performance-domain.yaml | 2 +- Documentation/devicetree/bindings/firmware/arm,scmi.yaml | 2 +- Documentation/devicetree/bindings/firmware/arm,scpi.yaml | 2 +- Documentation/devicetree/bindings/mailbox/arm,mhuv3.yaml | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/arm,juno-fpga-apb-regs.yaml b/Documentation/devicetree/bindings/arm/arm,juno-fpga-apb-regs.yaml index ce5f2e1ec1ea..4ae7dc706b84 100644 --- a/Documentation/devicetree/bindings/arm/arm,juno-fpga-apb-regs.yaml +++ b/Documentation/devicetree/bindings/arm/arm,juno-fpga-apb-regs.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM Juno FPGA APB Registers maintainers: - - Sudeep Holla + - Sudeep Holla properties: compatible: diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml index 95d4baa85506..30cc534a91ee 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM Versatile Express and Juno Boards maintainers: - - Sudeep Holla + - Sudeep Holla - Linus Walleij description: |+ diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-scc.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-scc.yaml index 9b8f7e0c4ea0..060c0bc58a15 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-scc.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-scc.yaml @@ -8,7 +8,7 @@ title: ARM Versatile Express Serial Configuration Controller maintainers: - Liviu Dudau - - Sudeep Holla + - Sudeep Holla description: | Test chips for ARM Versatile Express platform implement SCC (Serial diff --git a/Documentation/devicetree/bindings/dvfs/performance-domain.yaml b/Documentation/devicetree/bindings/dvfs/performance-domain.yaml index cc930660b794..09bbd2e33786 100644 --- a/Documentation/devicetree/bindings/dvfs/performance-domain.yaml +++ b/Documentation/devicetree/bindings/dvfs/performance-domain.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Generic performance domains maintainers: - - Sudeep Holla + - Sudeep Holla description: |+ This binding is intended for performance management of groups of devices or diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml index d06cca9273c4..6fc44105f1c3 100644 --- a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml +++ b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: System Control and Management Interface (SCMI) Message Protocol maintainers: - - Sudeep Holla + - Sudeep Holla description: | The SCMI is intended to allow agents such as OSPM to manage various functions diff --git a/Documentation/devicetree/bindings/firmware/arm,scpi.yaml b/Documentation/devicetree/bindings/firmware/arm,scpi.yaml index 241317239ffc..08c7e05c577c 100644 --- a/Documentation/devicetree/bindings/firmware/arm,scpi.yaml +++ b/Documentation/devicetree/bindings/firmware/arm,scpi.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: System Control and Power Interface (SCPI) Message Protocol maintainers: - - Sudeep Holla + - Sudeep Holla description: | Firmware implementing the SCPI described in ARM document number ARM DUI diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhuv3.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhuv3.yaml index 449b55afeb7d..025a5c55b284 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhuv3.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhuv3.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM MHUv3 Mailbox Controller maintainers: - - Sudeep Holla + - Sudeep Holla - Cristian Marussi description: | From a4673d68a0a212e4160df309a8bc7dd6354a16c1 Mon Sep 17 00:00:00 2001 From: "Miquel Raynal (Schneider Electric)" Date: Thu, 16 Jul 2026 12:51:12 +0200 Subject: [PATCH 22/40] of: base: Handle optional argument in of_parse_phandle_with_args_map() The kernel doc claims out_args is optional. In practice, the function unconditionally dereferences it. It feels like calling this function with a NULL out_args argument may be a valid use case (in order to know if the lookup would work, even though we might not care about the result), even though in practice there seem to be no actual user of that possibility. All callers give an on-stack object to fill. There are two ways out: either we drop the "optional" wording from the kernel doc, or we handle the NULL case properly. Since handling this case goes in favor of more harmonization of the semantics and since of_parse_phandle_with_args() actually do handle that situation correctly, let's handle it in the _map() case as well. Use a local on-stack object in case no argument is passed. This way, we actually go through the same logic as if there was an argument. We may however return rather early, since the second part of the function is dedicated at filling that argument. Reported-by: Sashiko Closes: https://lore.kernel.org/all/20260710183359.61D3A1F000E9@smtp.kernel.org/ Signed-off-by: Miquel Raynal (Schneider Electric) Link: https://patch.msgid.link/20260716-schneider-v7-2-rc1-eip-of-fix-v1-1-9b9383f936c6@bootlin.com Signed-off-by: Rob Herring (Arm) --- drivers/of/base.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index 6e7a42dedad3..dd7dda0e0a57 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1505,15 +1505,15 @@ EXPORT_SYMBOL(__of_parse_phandle_with_args); * @list_name: property name that contains a list * @stem_name: stem of property names that specify phandles' arguments count * @index: index of a phandle to parse out - * @out_args: optional pointer to output arguments structure (will be filled) + * @_out_args: optional pointer to output arguments structure (will be filled) * * This function is useful to parse lists of phandles and their arguments. - * Returns 0 on success and fills out_args, on error returns appropriate errno + * Returns 0 on success and fills @_out_args, on error returns appropriate errno * value. The difference between this function and of_parse_phandle_with_args() * is that this API remaps a phandle if the node the phandle points to has * a <@stem_name>-map property. * - * Caller is responsible to call of_node_put() on the returned out_args->np + * Caller is responsible to call of_node_put() on the returned @_out_args->np * pointer. * * Example:: @@ -1544,7 +1544,7 @@ EXPORT_SYMBOL(__of_parse_phandle_with_args); int of_parse_phandle_with_args_map(const struct device_node *np, const char *list_name, const char *stem_name, - int index, struct of_phandle_args *out_args) + int index, struct of_phandle_args *_out_args) { char *cells_name __free(kfree) = kasprintf(GFP_KERNEL, "#%s-cells", stem_name); char *map_name __free(kfree) = kasprintf(GFP_KERNEL, "%s-map", stem_name); @@ -1554,6 +1554,8 @@ int of_parse_phandle_with_args_map(const struct device_node *np, const __be32 *map, *mask, *pass; static const __be32 dummy_mask[] = { [0 ... (MAX_PHANDLE_ARGS - 1)] = cpu_to_be32(~0) }; static const __be32 dummy_pass[] = { [0 ... (MAX_PHANDLE_ARGS - 1)] = cpu_to_be32(0) }; + struct of_phandle_args _oa = {}; + struct of_phandle_args *out_args = _out_args ? _out_args : &_oa; __be32 initial_match_array[MAX_PHANDLE_ARGS]; const __be32 *match_array = initial_match_array; int i, ret, map_len, match; @@ -1585,6 +1587,8 @@ int of_parse_phandle_with_args_map(const struct device_node *np, /* Get the -map property */ map = of_get_property(cur, map_name, &map_len); if (!map) { + if (!_out_args) + of_node_put(out_args->np); return 0; } map_len /= sizeof(u32); From bfd4e4b12d6fc5f74557963b13ca703f297520bf Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 28 Jul 2026 17:18:01 +0800 Subject: [PATCH 23/40] dt-bindings: gpu: powervr-rogue: Add MediaTek MT8173 GPU The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is one of the Series6XT GPUs, another sub-family of the Rogue family. This was part of the very first few versions of the PowerVR submission, but was later dropped. [1] https://lore.kernel.org/dri-devel/6eeccb26e09aad67fb30ffcd523c793a43c79c2a.camel@imgtec.com/ Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Conor Dooley Signed-off-by: Chen-Yu Tsai Link: https://patch.msgid.link/20260728091804.382753-4-wenst@chromium.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index a1f54dbae3f3..53131cd4cc2a 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -15,6 +15,7 @@ properties: oneOf: - items: - enum: + - mediatek,mt8173-gpu - renesas,r8a7796-gpu - renesas,r8a77961-gpu - const: img,img-gx6250 From 87ef382e445a74bc508ea267c76f0b0c27e997ba Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 22 Jul 2026 08:22:41 +0200 Subject: [PATCH 24/40] docs: dt: writing-schema: Extend expectations about example part of binding Document already used rules about example DTS in the binding: - All final device bindings (except sub-block of more complex devices) should have an example. - Phandles do not need to be resolvable - Sashiko already provided incorrect review, so this might help it to understand the concept. - Example should be complete, readable (use known defines), without 'status' property. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260722062240.19382-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/writing-schema.rst | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index 3ffd0828617a..d31b94300f46 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -127,9 +127,16 @@ additionalProperties / unevaluatedProperties two above cases ('false'). examples - Optional. A list of one or more DTS hunks implementing this binding only. - Example should not contain unrelated device nodes, e.g. consumer nodes in a - provider binding, other nodes referenced by phandle. + Optional, although expected outside of bindings describing common properties + or sub-blocks of more complex devices. A list of one or more DTS hunks + implementing this binding only. Example should not contain unrelated device + nodes, e.g. consumer nodes in a provider binding, other nodes referenced by + phandles or node labels which are not directly referenced in the example + itself. Phandles in the example do not have to be resolvable. The example + must be complete as much as possible - have most of the properties - and look + readable to developers, thus for example use known defines for interrupt or + GPIO flags. Example should not contain 'status' property in typical cases. + Note: YAML doesn't allow leading tabs, so spaces must be used instead. Unless noted otherwise, all above schema properties are required. From 456920b3a8023d040fc254110cc11f1e373ea1a2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 21 Jul 2026 08:09:16 +0200 Subject: [PATCH 25/40] docs: dt: maintainer: Add Devicetree and OF maintainer profile document Document how Devicetree and Open Firmware maintainers handle their subsystem, especially focusing on two caveats: Devicetree subsystem handles patches with a minor difference comparing to other subsystems: while DT maintainers pick up OF code, they only provide review of DT bindings without applying these. All three DT bindings maintainers rely currently on Patchwork and due to enormous amount of emails per day, regardless how much DT maintainers try, they cannot read all the emails. Cc: Rob Herring Cc: Conor Dooley Cc: Saravana Kannan Cc: devicetree@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260721060916.12465-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../process/maintainer-devicetree.rst | 72 +++++++++++++++++++ MAINTAINERS | 3 + 2 files changed, 75 insertions(+) create mode 100644 Documentation/process/maintainer-devicetree.rst diff --git a/Documentation/process/maintainer-devicetree.rst b/Documentation/process/maintainer-devicetree.rst new file mode 100644 index 000000000000..ecc3ed638725 --- /dev/null +++ b/Documentation/process/maintainer-devicetree.rst @@ -0,0 +1,72 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================== +Devicetree and Open Firmware Subsystem +====================================== + +Other Process Documents +----------------------- + +Please see the documents in Documentation/devicetree/bindings/ for information +on how to write proper Devicetree bindings and how to submit patches. + +Patch Review and Handling +------------------------- + +Patches handled by Devicetree maintainers are processed differently depending +on the patch type: + +1. Core OF driver code, e.g. drivers/of/: + patches are reviewed and applied by DT maintainers. + +2. Devicetree bindings: + patches are reviewed by DT maintainers, but should be applied by subsystem + maintainers except in certain cases. See also *For kernel maintainers* in + Documentation/devicetree/bindings/submitting-patches.rst. + +3. DTS and drivers: + DT maintainers might provide comments, but review is generally not expected. + DTS must pass schema checks (dtbs_check) or at least do not add any + new warnings. + +Patchwork +~~~~~~~~~ + +Devicetree maintainers review patches using Patchwork, so the current status of +a patch can be checked there. For typical driver submissions, Patchwork +receives the entire patch set, but only a few patches are usually Devicetree +bindings that are reviewed by DT maintainers. + +Explanation of Patchwork statuses: + + - **New**: Not yet processed by the automation toolset. + - **Needs ACK**: Waiting for review by DT maintainers. + - **Handled Elsewhere**: Non-DT patch; not being reviewed here. + - **RFC**: Patch was likely ignored because it was an incomplete RFC. + - **Changes Requested**: Patch was reviewed and DT maintainers expect changes. + - **Accepted**: Patch was reviewed and applied by DT maintainers to their tree. + - **Not Applicable**: Patch was reviewed and is likely in good shape, with a + *Reviewed-by* or *Acked-by* tag provided, but DT maintainers expect someone + else to apply it. + +Patch Re-review and Pinging +~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Due to the high volume of email traffic, Devicetree maintainers do not read +every email they receive and instead rely on Patchwork during the review +process. They also often skip patches that have already been reviewed. + +As a result, maintainers might miss: + +1. Questions about already reviewed patches. +2. Pings, for example when a patch has been reviewed by DT maintainers but has + not been picked up by subsystem maintainers. + +Such cases can be addressed by: + +1. Pinging DT maintainers on the IRC channel. +2. Dropping the DT maintainer’s *Acked-by* or *Reviewed-by* tag when sending a new + version of the patch set, together with an explanation in the patch + changelog describing why the tag was removed and what is expected from DT + maintainers. + diff --git a/MAINTAINERS b/MAINTAINERS index 15011f5752a9..87652a0f3a90 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20228,6 +20228,7 @@ S: Maintained Q: http://patchwork.kernel.org/project/devicetree/list/ W: http://www.devicetree.org/ C: irc://irc.libera.chat/devicetree +P: Documentation/process/maintainer-devicetree.rst T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git F: Documentation/ABI/testing/sysfs-firmware-ofw F: drivers/of/ @@ -20249,8 +20250,10 @@ L: devicetree@vger.kernel.org S: Maintained Q: http://patchwork.kernel.org/project/devicetree/list/ C: irc://irc.libera.chat/devicetree +P: Documentation/process/maintainer-devicetree.rst T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git F: Documentation/devicetree/ +F: Documentation/process/maintainer-devicetree.rst F: arch/*/boot/dts/ F: include/dt-bindings/ From cf4c21aa3bf0dc8e6090f95c1370192b89afd41a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 3 Aug 2026 11:17:59 +0200 Subject: [PATCH 26/40] docs: dt: submitting-patches: Mention expectation about dt-check-style Any new DTS example in the binding should pass dt-check-style 'strict' mode without warnings, although scripts does report some false positives. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260803091758.232633-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/submitting-patches.rst | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/submitting-patches.rst b/Documentation/devicetree/bindings/submitting-patches.rst index 2a5533f68830..6b1c064d4966 100644 --- a/Documentation/devicetree/bindings/submitting-patches.rst +++ b/Documentation/devicetree/bindings/submitting-patches.rst @@ -41,6 +41,9 @@ I. For patch submitters See Documentation/devicetree/bindings/writing-schema.rst for more details about schema and tools setup. + The example DTS in new bindings should pass scripts/dtc/dt-check-style in + 'strict' mode without warnings. + 3) DT binding files should be dual licensed. The preferred license tag is (GPL-2.0-only OR BSD-2-Clause). From 87ddd2841485a0bdbb431da204261489e4dc93f2 Mon Sep 17 00:00:00 2001 From: Manuel Ebner Date: Wed, 22 Jul 2026 12:12:47 +0200 Subject: [PATCH 27/40] dt-bindings: fix typos and brackets Add missing '(', ')', '}' Remove needless '(', ')', '{', '}' 'lover voltage' -> 'lower voltage' Signed-off-by: Manuel Ebner Link: https://patch.msgid.link/20260722101246.3113818-2-manuelebnerli@mailbox.org [robh: drop .txt binding changes] Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/mediatek.yaml | 2 +- .../devicetree/bindings/arm/qcom,coresight-tpdm.yaml | 2 +- .../bindings/clock/renesas,rcar-usb2-clock-sel.yaml | 4 ++-- .../devicetree/bindings/memory-controllers/renesas,dbsc.yaml | 2 +- .../bindings/regulator/mediatek,mt6358-regulator.yaml | 2 +- .../devicetree/bindings/regulator/rohm,bd71837-regulator.yaml | 4 ++-- .../devicetree/bindings/regulator/rohm,bd71847-regulator.yaml | 4 ++-- 7 files changed, 10 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 382d0eb4d0af..cd4040ad3437 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -314,7 +314,7 @@ properties: - const: google,steelix-sku196608 - const: google,steelix - const: mediatek,mt8186 - - description: Google Squirtle (Acer Chromebook Spin 311 (R724T) + - description: Google Squirtle (Acer Chromebook Spin 311 (R724T)) items: - const: google,squirtle - const: mediatek,mt8186 diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index 152403f548c3..c7301f1b28c1 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -9,7 +9,7 @@ title: Trace, Profiling and Diagnostics Monitor - TPDM description: | The TPDM or Monitor serves as data collection component for various dataset - types specified in the QPMDA spec. It covers Implementation defined ((ImplDef), + types specified in the QPMDA spec. It covers Implementation defined (ImplDef), Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete Single Bit (DSB). It performs data collection in the data producing clock domain and transfers it to the data collection time domain, generally ATB diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml index c84f29f1810f..a14be249fa33 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml @@ -13,8 +13,8 @@ description: | If you connect an external clock to the USB_EXTAL pin only, you should set the clock rate to "usb_extal" node only. If you connect an oscillator to both the USB_XTAL and USB_EXTAL, this module - is not needed because this is default setting. (Of course, you can set the - clock rates to both "usb_extal" and "usb_xtal" nodes. + is not needed because this is default setting (Of course, you can set the + clock rates to both "usb_extal" and "usb_xtal" nodes). Case 1: An external clock connects to R-Car SoC +----------+ +--- R-Car ---------------------+ diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml index 8e3822314b25..30ad2a858844 100644 --- a/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml @@ -13,7 +13,7 @@ description: | Renesas SoCs contain one or more memory controllers. These memory controllers differ from one SoC variant to another, and are called by different names, e.g. "DDR Bus Controller (DBSC)", "DDR3 Bus State Controller - (DBSC3)", or "SDRAM Bus State Controller (SBSC)"). + (DBSC3)", or "SDRAM Bus State Controller (SBSC)". properties: compatible: diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6358-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6358-regulator.yaml index c50402fcba72..4eb635179b6a 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6358-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6358-regulator.yaml @@ -145,7 +145,7 @@ allOf: then: patternProperties: # Old regulator node name scheme (with prefix and underscores) only - # ([^y-] is used to avoid matching -supply + # ([^y-]) is used to avoid matching -supply "^(? Date: Sat, 1 Aug 2026 21:56:14 +0200 Subject: [PATCH 28/40] dt-bindings: Correct white-space style MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Correct a few white-space issues, like double space after '=' or before bracket '{' characters, which will be flagged by dt-check-style. No functional changes. Signed-off-by: Krzysztof Kozlowski Acked-by: Jeff Johnson # qcom,ath10k.yaml Acked-by: Suzuki K Poulose Acked-by: Greg Kroah-Hartman Acked-by: Uwe Kleine-König # for Documentation/devicetree/bindings/pwm Acked-by: Tomi Valkeinen Acked-by: Andi Shyti Link: https://patch.msgid.link/20260801195613.235430-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../arm/firmware/linaro,optee-tz.yaml | 8 +- .../devicetree/bindings/arm/psci.yaml | 18 ++-- .../bindings/arm/qcom,coresight-tnoc.yaml | 2 +- .../devicetree/bindings/ata/st,ahci.yaml | 22 ++--- .../bindings/display/ti/ti,am65x-dss.yaml | 12 +-- .../bindings/display/ti/ti,j721e-dss.yaml | 96 +++++++++---------- .../bindings/display/ti/ti,k2g-dss.yaml | 36 +++---- .../bindings/dsp/mediatek,mt8195-dsp.yaml | 2 +- .../bindings/gpio/st,nomadik-gpio.yaml | 2 +- .../devicetree/bindings/i2c/st,sti-i2c.yaml | 2 +- .../bindings/mailbox/st,sti-mailbox.yaml | 2 +- .../bindings/mfd/maxim,max77620.yaml | 2 +- .../bindings/net/wireless/qcom,ath10k.yaml | 34 +++---- .../devicetree/bindings/opp/opp-v2.yaml | 28 +++--- .../pinctrl/mediatek,mt7988-pinctrl.yaml | 2 +- .../devicetree/bindings/ptp/fsl,ptp.yaml | 12 +-- .../devicetree/bindings/pwm/pwm-sifive.yaml | 2 +- .../bindings/usb/ti,twl4030-usb.yaml | 2 +- 18 files changed, 142 insertions(+), 142 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml index 5d033570b57b..26ebcf4565f3 100644 --- a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml +++ b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml @@ -50,8 +50,8 @@ additionalProperties: false examples: - | #include - firmware { - optee { + firmware { + optee { compatible = "linaro,optee-tz"; method = "smc"; interrupts = ; @@ -59,8 +59,8 @@ examples: }; - | - firmware { - optee { + firmware { + optee { compatible = "linaro,optee-tz"; method = "hvc"; }; diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 6e2e0c551841..0d04389c81fa 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -146,12 +146,12 @@ examples: // Case 1: PSCI v0.1 only. psci { - compatible = "arm,psci"; - method = "smc"; - cpu_suspend = <0x95c10000>; - cpu_off = <0x95c10001>; - cpu_on = <0x95c10002>; - migrate = <0x95c10003>; + compatible = "arm,psci"; + method = "smc"; + cpu_suspend = <0x95c10000>; + cpu_off = <0x95c10001>; + cpu_on = <0x95c10002>; + migrate = <0x95c10003>; }; - |+ @@ -159,8 +159,8 @@ examples: // Case 2: PSCI v0.2 only psci { - compatible = "arm,psci-0.2"; - method = "smc"; + compatible = "arm,psci-0.2"; + method = "smc"; }; - |+ @@ -251,7 +251,7 @@ examples: cpu_pd1: power-domain-cpu1 { #power-domain-cells = <0>; - domain-idle-states = <&cpu_pwrdn>; + domain-idle-states = <&cpu_pwrdn>; power-domains = <&cluster_pd>; }; diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml index ef648a15b806..37147124449e 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml @@ -82,7 +82,7 @@ additionalProperties: false examples: - | - tn@109ab000 { + tn@109ab000 { compatible = "qcom,coresight-tnoc", "arm,primecell"; reg = <0x109ab000 0x4200>; diff --git a/Documentation/devicetree/bindings/ata/st,ahci.yaml b/Documentation/devicetree/bindings/ata/st,ahci.yaml index 6e8e4b4f3d6c..d82c5a65b60c 100644 --- a/Documentation/devicetree/bindings/ata/st,ahci.yaml +++ b/Documentation/devicetree/bindings/ata/st,ahci.yaml @@ -57,16 +57,16 @@ examples: #include sata@9b20000 { - compatible = "st,ahci"; - reg = <0x9b20000 0x1000>; - interrupts = ; + compatible = "st,ahci"; + reg = <0x9b20000 0x1000>; + interrupts = ; interrupt-names = "hostc"; - phys = <&phy_port0 PHY_TYPE_SATA>; - phy-names = "sata-phy"; - resets = <&powerdown STIH407_SATA0_POWERDOWN>, - <&softreset STIH407_SATA0_SOFTRESET>, - <&softreset STIH407_SATA0_PWR_SOFTRESET>; - reset-names = "pwr-dwn", "sw-rst", "pwr-rst"; - clocks = <&clk_s_c0_flexgen CLK_ICN_REG>; - clock-names = "ahci_clk"; + phys = <&phy_port0 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + resets = <&powerdown STIH407_SATA0_POWERDOWN>, + <&softreset STIH407_SATA0_SOFTRESET>, + <&softreset STIH407_SATA0_PWR_SOFTRESET>; + reset-names = "pwr-dwn", "sw-rst", "pwr-rst"; + clocks = <&clk_s_c0_flexgen CLK_ICN_REG>; + clock-names = "ahci_clk"; }; diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 49a007cbcd3a..d1e530e12604 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -261,9 +261,9 @@ examples: "ovr1", "ovr2", "vp1", "vp2", "common1"; ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>; power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 67 1>, - <&k3_clks 216 1>, - <&k3_clks 67 2>; + clocks = <&k3_clks 67 1>, + <&k3_clks 216 1>, + <&k3_clks 67 2>; clock-names = "fck", "vp1", "vp2"; interrupts = ; ports { @@ -299,9 +299,9 @@ examples: reg-names = "common", "vidl1", "vid", "ovr1", "ovr2", "vp1", "vp2", "common1"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 186 6>, - <&vp1_clock>, - <&k3_clks 186 2>; + clocks = <&k3_clks 186 6>, + <&vp1_clock>, + <&k3_clks 186 2>; clock-names = "fck", "vp1", "vp2"; interrupts = ; oldi-transmitters { diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml index 65ae8a1c3998..cac5ef1743d3 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml @@ -154,54 +154,54 @@ examples: #include dss: dss@4a00000 { - compatible = "ti,j721e-dss"; - reg = <0x04a00000 0x10000>, /* common_m */ - <0x04a10000 0x10000>, /* common_s0*/ - <0x04b00000 0x10000>, /* common_s1*/ - <0x04b10000 0x10000>, /* common_s2*/ - <0x04a20000 0x10000>, /* vidl1 */ - <0x04a30000 0x10000>, /* vidl2 */ - <0x04a50000 0x10000>, /* vid1 */ - <0x04a60000 0x10000>, /* vid2 */ - <0x04a70000 0x10000>, /* ovr1 */ - <0x04a90000 0x10000>, /* ovr2 */ - <0x04ab0000 0x10000>, /* ovr3 */ - <0x04ad0000 0x10000>, /* ovr4 */ - <0x04a80000 0x10000>, /* vp1 */ - <0x04aa0000 0x10000>, /* vp2 */ - <0x04ac0000 0x10000>, /* vp3 */ - <0x04ae0000 0x10000>, /* vp4 */ - <0x04af0000 0x10000>; /* wb */ - reg-names = "common_m", "common_s0", - "common_s1", "common_s2", - "vidl1", "vidl2","vid1","vid2", - "ovr1", "ovr2", "ovr3", "ovr4", - "vp1", "vp2", "vp3", "vp4", - "wb"; - clocks = <&k3_clks 152 0>, - <&k3_clks 152 1>, - <&k3_clks 152 4>, - <&k3_clks 152 9>, - <&k3_clks 152 13>; - clock-names = "fck", "vp1", "vp2", "vp3", "vp4"; - power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>; - interrupts = , - , - , - ; - interrupt-names = "common_m", - "common_s0", - "common_s1", - "common_s2"; - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; + compatible = "ti,j721e-dss"; + reg = <0x04a00000 0x10000>, /* common_m */ + <0x04a10000 0x10000>, /* common_s0*/ + <0x04b00000 0x10000>, /* common_s1*/ + <0x04b10000 0x10000>, /* common_s2*/ + <0x04a20000 0x10000>, /* vidl1 */ + <0x04a30000 0x10000>, /* vidl2 */ + <0x04a50000 0x10000>, /* vid1 */ + <0x04a60000 0x10000>, /* vid2 */ + <0x04a70000 0x10000>, /* ovr1 */ + <0x04a90000 0x10000>, /* ovr2 */ + <0x04ab0000 0x10000>, /* ovr3 */ + <0x04ad0000 0x10000>, /* ovr4 */ + <0x04a80000 0x10000>, /* vp1 */ + <0x04aa0000 0x10000>, /* vp2 */ + <0x04ac0000 0x10000>, /* vp3 */ + <0x04ae0000 0x10000>, /* vp4 */ + <0x04af0000 0x10000>; /* wb */ + reg-names = "common_m", "common_s0", + "common_s1", "common_s2", + "vidl1", "vidl2","vid1","vid2", + "ovr1", "ovr2", "ovr3", "ovr4", + "vp1", "vp2", "vp3", "vp4", + "wb"; + clocks = <&k3_clks 152 0>, + <&k3_clks 152 1>, + <&k3_clks 152 4>, + <&k3_clks 152 9>, + <&k3_clks 152 13>; + clock-names = "fck", "vp1", "vp2", "vp3", "vp4"; + power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>; + interrupts = , + , + , + ; + interrupt-names = "common_m", + "common_s0", + "common_s1", + "common_s2"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; - dpi_out_0: endpoint { - remote-endpoint = <&dp_bridge_input>; - }; - }; + dpi_out_0: endpoint { + remote-endpoint = <&dp_bridge_input>; + }; }; + }; }; diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml index 96b1439f88e3..87721da0a8af 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml @@ -80,26 +80,26 @@ examples: #include #include - dss: dss@2540000 { - compatible = "ti,k2g-dss"; - reg = <0x02540000 0x400>, - <0x02550000 0x1000>, - <0x02557000 0x1000>, - <0x0255a800 0x100>, - <0x0255ac00 0x100>; - reg-names = "cfg", "common", "vid1", "ovr1", "vp1"; - clocks = <&k2g_clks 0x2 0>, - <&k2g_clks 0x2 1>; - clock-names = "fck", "vp1"; - interrupts = ; + dss@2540000 { + compatible = "ti,k2g-dss"; + reg = <0x02540000 0x400>, + <0x02550000 0x1000>, + <0x02557000 0x1000>, + <0x0255a800 0x100>, + <0x0255ac00 0x100>; + reg-names = "cfg", "common", "vid1", "ovr1", "vp1"; + clocks = <&k2g_clks 0x2 0>, + <&k2g_clks 0x2 1>; + clock-names = "fck", "vp1"; + interrupts = ; - power-domains = <&k2g_pds 0x2>; + power-domains = <&k2g_pds 0x2>; - max-memory-bandwidth = <230000000>; + max-memory-bandwidth = <230000000>; - port { - dpi_out: endpoint { - remote-endpoint = <&sii9022_in>; - }; + port { + dpi_out: endpoint { + remote-endpoint = <&sii9022_in>; }; + }; }; diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml index abc52978be7a..994afb1c31ff 100644 --- a/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml @@ -81,7 +81,7 @@ examples: #include #include dsp@10803000 { - compatible = "mediatek,mt8195-dsp"; + compatible = "mediatek,mt8195-dsp"; reg = <0x10803000 0x1000>, <0x10840000 0x40000>; reg-names = "cfg", "sram"; diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index 40b4a7551449..e871149c520f 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -85,7 +85,7 @@ examples: - | gpio@8012e080 { compatible = "st,nomadik-gpio"; - reg = <0x8012e080 0x80>; + reg = <0x8012e080 0x80>; interrupts = <0 120 0x4>; #gpio-cells = <2>; gpio-controller; diff --git a/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml index 08f9c1e446fd..4efbe82b6d68 100644 --- a/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml @@ -60,7 +60,7 @@ examples: i2c@fed40000 { compatible = "st,comms-ssc4-i2c"; reg = <0xfed40000 0x110>; - interrupts = ; + interrupts = ; clocks = <&clk_s_a0_ls CLK_ICN_REG>; clock-names = "ssc"; clock-frequency = <400000>; diff --git a/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml index a023c28dff49..662ab7f617ac 100644 --- a/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml @@ -42,7 +42,7 @@ additionalProperties: false examples: - | #include - mailbox0: mailbox@8f00000 { + mailbox@8f00000 { compatible = "st,stih407-mailbox"; reg = <0x8f00000 0x1000>; interrupts = ; diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml index 602711865274..ac063c2bab73 100644 --- a/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml +++ b/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml @@ -311,7 +311,7 @@ examples: in-sd3-supply = <&vdd_5v0_vbus>; in-ldo0-1-supply = <&vdd_1v8_vio>; - in-ldo2-supply = <&vdd_3v3_vbat>; + in-ldo2-supply = <&vdd_3v3_vbat>; in-ldo3-5-supply = <&vdd_3v3_vbat>; in-ldo4-6-supply = <&vdd_3v3_vbat>; in-ldo7-8-supply = <&vdd_1v8_vio>; diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml index d4f4d72ee0d3..e667d78b3ab3 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml @@ -390,22 +390,22 @@ examples: , , ; - interrupt-names = "msi0", - "msi1", - "msi2", - "msi3", - "msi4", - "msi5", - "msi6", - "msi7", - "msi8", - "msi9", - "msi10", - "msi11", - "msi12", - "msi13", - "msi14", - "msi15", - "legacy"; + interrupt-names = "msi0", + "msi1", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7", + "msi8", + "msi9", + "msi10", + "msi11", + "msi12", + "msi13", + "msi14", + "msi15", + "legacy"; ieee80211-freq-limit = <5470000 5875000>; }; diff --git a/Documentation/devicetree/bindings/opp/opp-v2.yaml b/Documentation/devicetree/bindings/opp/opp-v2.yaml index 10000a758572..ce0fa82bce98 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2.yaml @@ -293,9 +293,9 @@ examples: opp-microvolt = <970000>, /* Supply 0 */ <960000>, /* Supply 1 */ <960000>; /* Supply 2 */ - opp-microamp = <70000>, /* Supply 0 */ - <70000>, /* Supply 1 */ - <70000>; /* Supply 2 */ + opp-microamp = <70000>, /* Supply 0 */ + <70000>, /* Supply 1 */ + <70000>; /* Supply 2 */ clock-latency-ns = <300000>; }; @@ -306,9 +306,9 @@ examples: opp-microvolt = <975000 970000 985000>, /* Supply 0 */ <965000 960000 975000>, /* Supply 1 */ <965000 960000 975000>; /* Supply 2 */ - opp-microamp = <70000>, /* Supply 0 */ - <70000>, /* Supply 1 */ - <70000>; /* Supply 2 */ + opp-microamp = <70000>, /* Supply 0 */ + <70000>, /* Supply 1 */ + <70000>; /* Supply 2 */ clock-latency-ns = <300000>; }; @@ -317,11 +317,11 @@ examples: opp-1000000002 { opp-hz = /bits/ 64 <1000000002>; opp-microvolt = <975000 970000 985000>, /* Supply 0 */ - <965000 960000 975000>, /* Supply 1 */ - <965000 960000 975000>; /* Supply 2 */ - opp-microamp = <70000>, /* Supply 0 */ - <0>, /* Supply 1 doesn't need this */ - <70000>; /* Supply 2 */ + <965000 960000 975000>, /* Supply 1 */ + <965000 960000 975000>; /* Supply 2 */ + opp-microamp = <70000>, /* Supply 0 */ + <0>, /* Supply 1 doesn't need this */ + <70000>; /* Supply 2 */ clock-latency-ns = <300000>; }; }; @@ -405,8 +405,8 @@ examples: opp-hz = /bits/ 64 <1000000000>; opp-microvolt-slow = <915000 900000 925000>; opp-microvolt-fast = <975000 970000 985000>; - opp-microamp-slow = <70000>; - opp-microamp-fast = <71000>; + opp-microamp-slow = <70000>; + opp-microamp-fast = <71000>; }; opp-1200000000 { @@ -415,7 +415,7 @@ examples: <925000 910000 935000>; /* Supply vcc1 */ opp-microvolt-fast = <975000 970000 985000>, /* Supply vcc0 */ <965000 960000 975000>; /* Supply vcc1 */ - opp-microamp = <70000>; /* Will be used for both slow/fast */ + opp-microamp = <70000>; /* Will be used for both slow/fast */ }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml index 1f31b520cb43..a33f1fd277c9 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml @@ -573,7 +573,7 @@ examples: uart0_pins: uart0-pins { mux { function = "uart"; - groups = "uart0"; + groups = "uart0"; }; }; }; diff --git a/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml b/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml index 42ca895f3c4e..998f2ce8665f 100644 --- a/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml +++ b/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml @@ -146,11 +146,11 @@ examples: reg = <0x24e00 0xb0>; interrupts = <12 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; - fsl,cksel = <1>; + fsl,cksel = <1>; fsl,tclk-period = <10>; - fsl,tmr-prsc = <100>; - fsl,tmr-add = <0x999999a4>; - fsl,tmr-fiper1 = <0x3b9ac9f6>; - fsl,tmr-fiper2 = <0x00018696>; - fsl,max-adj = <659999998>; + fsl,tmr-prsc = <100>; + fsl,tmr-add = <0x999999a4>; + fsl,tmr-fiper1 = <0x3b9ac9f6>; + fsl,tmr-fiper2 = <0x00018696>; + fsl,max-adj = <659999998>; }; diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml index bae993128981..40397bdf2d69 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml @@ -62,7 +62,7 @@ additionalProperties: false examples: - | - pwm: pwm@10020000 { + pwm@10020000 { compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; reg = <0x10020000 0x1000>; clocks = <&tlclk>; diff --git a/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml b/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml index 6ef337507425..c338ad0368de 100644 --- a/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml +++ b/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml @@ -67,7 +67,7 @@ examples: usb1v5-supply = <®_vusb1v5>; usb1v8-supply = <®_vusb1v8>; - usb3v1-supply = <®_vusb3v1>; + usb3v1-supply = <®_vusb3v1>; usb_mode = <1>; #phy-cells = <0>; From 2bbb0e03344b67f4b7dd022647e3976211d2d02b Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Fri, 31 Jul 2026 18:09:52 +0200 Subject: [PATCH 29/40] dt-bindings: irq: sun7i-nmi: Document the Allwinner A733 NMI controller The A733 NMI controller is compatible with the A523 one. Add an A733-specific compatible string, with the A523 as fallback. Signed-off-by: Jerome Brunet Acked-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260731-allwinner-a733-nmi-support-v1-1-61e4a0825b20@baylibre.com Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml index 06e3621a8c06..bb9273ec2457 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml @@ -33,6 +33,9 @@ properties: - allwinner,sun50i-a100-nmi - allwinner,sun50i-h616-nmi - const: allwinner,sun9i-a80-nmi + - items: + - const: allwinner,sun60i-a733-nmi + - const: allwinner,sun55i-a523-nmi reg: maxItems: 1 From f423482666be05c5f74f2a75caee04aa493d524c Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Thu, 6 Aug 2026 05:25:50 -0700 Subject: [PATCH 30/40] dt-bindings: interrupt-controller: Add StarFive JHB100 plic Add compatible string for StarFive JHB100 plic. Signed-off-by: Ley Foon Tan Signed-off-by: Changhuang Liang Acked-by: Conor Dooley Reviewed-by: Hal Feng Link: https://patch.msgid.link/20260806122553.182449-3-changhuang.liang@starfivetech.com Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index decc43df3c83..69a828facc6d 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -66,6 +66,7 @@ properties: - spacemit,k1-plic - starfive,jh7100-plic - starfive,jh7110-plic + - starfive,jhb100-plic - tenstorrent,blackhole-plic - const: sifive,plic-1.0.0 - items: From b71ace1a003e57886ee65c21cab052d404c5b049 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Thu, 30 Jul 2026 13:02:14 +0530 Subject: [PATCH 31/40] of: reserved_mem: Introduce devres-managed initialization function Introduce devres-based helper for of_reserved_mem_device_init() to help fight dangling references and ever so slightly reduce the number of boilerplate deinitialization calls. Signed-off-by: Konrad Dybcio Signed-off-by: Mukesh Ojha Link: https://patch.msgid.link/20260730073214.1146432-1-mukesh.ojha@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- drivers/of/of_reserved_mem.c | 44 +++++++++++++++++++++++++++++++++ include/linux/of_reserved_mem.h | 7 ++++++ 2 files changed, 51 insertions(+) diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c index 9ce55bfd7e2a..5f441a684567 100644 --- a/drivers/of/of_reserved_mem.c +++ b/drivers/of/of_reserved_mem.c @@ -788,6 +788,50 @@ void of_reserved_mem_device_release(struct device *dev) } EXPORT_SYMBOL_GPL(of_reserved_mem_device_release); +static void devm_of_reserved_mem_device_release(struct device *dev, void *res) +{ + of_reserved_mem_device_release(*(struct device **)res); +} + +static int devm_of_reserved_mem_device_init_by_idx(struct device *dev, + struct device_node *np, int idx) +{ + struct device **ptr; + int ret; + + ptr = devres_alloc(devm_of_reserved_mem_device_release, sizeof(*ptr), + GFP_KERNEL); + if (!ptr) + return -ENOMEM; + + ret = of_reserved_mem_device_init_by_idx(dev, np, idx); + if (ret) { + devres_free(ptr); + return ret; + } + + *ptr = dev; + devres_add(dev, ptr); + + return 0; +} + +/** + * devm_of_reserved_mem_device_init() - Resource managed of_reserved_mem_device_init() + * @dev: Pointer to the device to configure + * + * This is a resource managed version of of_reserved_mem_device_init(). + * The reserved memory region will be released automatically when the device + * is unbound. + * + * Returns: Negative errno on failure or zero on success. + */ +int devm_of_reserved_mem_device_init(struct device *dev) +{ + return devm_of_reserved_mem_device_init_by_idx(dev, dev->of_node, 0); +} +EXPORT_SYMBOL_GPL(devm_of_reserved_mem_device_init); + /** * of_reserved_mem_lookup() - acquire reserved_mem from a device node * @np: node pointer of the desired reserved-memory region diff --git a/include/linux/of_reserved_mem.h b/include/linux/of_reserved_mem.h index e8b20b29fa68..49da515859f2 100644 --- a/include/linux/of_reserved_mem.h +++ b/include/linux/of_reserved_mem.h @@ -40,6 +40,8 @@ int of_reserved_mem_device_init_by_name(struct device *dev, const char *name); void of_reserved_mem_device_release(struct device *dev); +int devm_of_reserved_mem_device_init(struct device *dev); + struct reserved_mem *of_reserved_mem_lookup(struct device_node *np); int of_reserved_mem_region_to_resource(const struct device_node *np, unsigned int idx, struct resource *res); @@ -68,6 +70,11 @@ static inline int of_reserved_mem_device_init_by_name(struct device *dev, static inline void of_reserved_mem_device_release(struct device *pdev) { } +static inline int devm_of_reserved_mem_device_init(struct device *dev) +{ + return -EOPNOTSUPP; +} + static inline struct reserved_mem *of_reserved_mem_lookup(struct device_node *np) { return NULL; From 9d56904975097c5b040e09363aa0f9993c228e4b Mon Sep 17 00:00:00 2001 From: Eduard Bostina Date: Mon, 10 Aug 2026 13:16:41 +0000 Subject: [PATCH 32/40] dt-bindings: power: Convert TI SmartReflex to DT schema Convert the Texas Instruments SmartReflex bindings to DT schema. Signed-off-by: Eduard Bostina Link: https://patch.msgid.link/20260810131641.352391-1-egbostina@gmail.com Signed-off-by: Rob Herring (Arm) --- .../bindings/power/ti,smartreflex.yaml | 50 +++++++++++++++++++ .../bindings/power/ti-smartreflex.txt | 47 ----------------- 2 files changed, 50 insertions(+), 47 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/ti,smartreflex.yaml delete mode 100644 Documentation/devicetree/bindings/power/ti-smartreflex.txt diff --git a/Documentation/devicetree/bindings/power/ti,smartreflex.yaml b/Documentation/devicetree/bindings/power/ti,smartreflex.yaml new file mode 100644 index 000000000000..7ca0a5eed9b2 --- /dev/null +++ b/Documentation/devicetree/bindings/power/ti,smartreflex.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/ti,smartreflex.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments SmartReflex + +maintainers: + - Eduard Bostina + +description: + SmartReflex is used to set and adjust the SoC operating points. + +properties: + compatible: + enum: + - ti,omap3-smartreflex-core + - ti,omap3-smartreflex-mpu-iva + - ti,omap4-smartreflex-core + - ti,omap4-smartreflex-mpu + - ti,omap4-smartreflex-iva + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + ti,hwmods: + description: Shall contain the TI interconnect module name if needed by the SoC + $ref: /schemas/types.yaml#/definitions/string + deprecated: true + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + + smartreflex@4a0db000 { + compatible = "ti,omap4-smartreflex-iva"; + reg = <0x4a0db000 0x80>; + interrupts = ; + }; diff --git a/Documentation/devicetree/bindings/power/ti-smartreflex.txt b/Documentation/devicetree/bindings/power/ti-smartreflex.txt deleted file mode 100644 index 21ef14d6af12..000000000000 --- a/Documentation/devicetree/bindings/power/ti-smartreflex.txt +++ /dev/null @@ -1,47 +0,0 @@ -Texas Instruments SmartReflex binding - -SmartReflex is used to set and adjust the SoC operating points. - - -Required properties: - -compatible: Shall be one of the following: - "ti,omap3-smartreflex-core" - "ti,omap3-smartreflex-mpu-iva" - "ti,omap4-smartreflex-core" - "ti,omap4-smartreflex-mpu" - "ti,omap4-smartreflex-iva" - -reg: Shall contain the device instance IO range - -interrupts: Shall contain the device instance interrupt - - -Optional properties: - -ti,hwmods: Shall contain the TI interconnect module name if needed - by the SoC - - -Example: - - smartreflex_iva: smartreflex@4a0db000 { - compatible = "ti,omap4-smartreflex-iva"; - reg = <0x4a0db000 0x80>; - interrupts = ; - ti,hwmods = "smartreflex_iva"; - }; - - smartreflex_core: smartreflex@4a0dd000 { - compatible = "ti,omap4-smartreflex-core"; - reg = <0x4a0dd000 0x80>; - interrupts = ; - ti,hwmods = "smartreflex_core"; - }; - - smartreflex_mpu: smartreflex@4a0d9000 { - compatible = "ti,omap4-smartreflex-mpu"; - reg = <0x4a0d9000 0x80>; - interrupts = ; - ti,hwmods = "smartreflex_mpu"; - }; From f963a45a11520a7113d16f467953cf786f51c53f Mon Sep 17 00:00:00 2001 From: Eduard Bostina Date: Mon, 10 Aug 2026 13:40:51 +0000 Subject: [PATCH 33/40] dt-bindings: arm: omap: Convert L4 interconnect to DT schema Convert the Texas Instruments OMAP L4 interconnect bus bindings to DT schema. During the conversion, several updates were made: - Defined the compatible property as an array to require the TI-specific string first, followed by either 'simple-bus' or 'simple-pm-bus'. - Added a 'select' block to ensure this schema is only applied to TI-specific nodes, preventing duplicate schema warnings against the core simple-pm-bus.yaml. - Added the L4 compatible strings used by the boards but missing from the text binding, and corrected the 'ti,am3-l4-wkup' typo to 'ti,am33xx-l4-wkup'. - Made 'reg' and 'reg-names' optional. Signed-off-by: Eduard Bostina Link: https://patch.msgid.link/20260810134051.380538-1-egbostina@gmail.com [robh: move to bindings/bus/] Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/omap/l4.txt | 37 ----- .../devicetree/bindings/bus/ti,omap-l4.yaml | 140 ++++++++++++++++++ 2 files changed, 140 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/omap/l4.txt create mode 100644 Documentation/devicetree/bindings/bus/ti,omap-l4.yaml diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt b/Documentation/devicetree/bindings/arm/omap/l4.txt deleted file mode 100644 index 6816adcdc15f..000000000000 --- a/Documentation/devicetree/bindings/arm/omap/l4.txt +++ /dev/null @@ -1,37 +0,0 @@ -L4 interconnect bindings - -These bindings describe the OMAP SoCs L4 interconnect bus. - -Required properties: -- compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus - Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus - Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus - Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus - Should be "ti,omap4-l4-per" for OMAP4 family l4 per bus - Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus - Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus - Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus - Should be "ti,dra7-l4-cfg" for DRA7 family l4 cfg bus - Should be "ti,dra7-l4-wkup" for DRA7 family l4 wkup bus - Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus - Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus -- ranges : contains the IO map range for the bus -- reg : registers link agent and interconnect agent and access protection -- reg-names : "la" for link agent, "ia0" to "ia3" for one to three - interconnect agent instances, "ap" for access if it exists - -Examples: - -l4: interconnect@48000000 { - compatible "ti,omap4-l4-per", "simple-bus"; - reg = <0x48000000 0x800>, - <0x48000800 0x800>, - <0x48001000 0x400>, - <0x48001400 0x400>, - <0x48001800 0x400>, - <0x48001c00 0x400>; - reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x48000000 0x100000>; -}; diff --git a/Documentation/devicetree/bindings/bus/ti,omap-l4.yaml b/Documentation/devicetree/bindings/bus/ti,omap-l4.yaml new file mode 100644 index 000000000000..0b09fb91934a --- /dev/null +++ b/Documentation/devicetree/bindings/bus/ti,omap-l4.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/ti,omap-l4.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI OMAP SoCs L4 interconnect bus + +maintainers: + - Eduard Bostina + +description: + These bindings describe the OMAP SoCs L4 interconnect bus. + +select: + properties: + compatible: + contains: + enum: + - ti,omap2-l4 + - ti,omap2-l4-wkup + - ti,omap3-l4-core + - ti,omap4-l4-abe + - ti,omap4-l4-cfg + - ti,omap4-l4-per + - ti,omap4-l4-wkup + - ti,omap5-l4-abe + - ti,omap5-l4-cfg + - ti,omap5-l4-per + - ti,omap5-l4-wkup + - ti,dra7-l4-cfg + - ti,dra7-l4-per1 + - ti,dra7-l4-per2 + - ti,dra7-l4-per3 + - ti,dra7-l4-wkup + - ti,am33xx-l4-fast + - ti,am33xx-l4-fw + - ti,am33xx-l4-mpuss + - ti,am33xx-l4-per + - ti,am33xx-l4-wkup + - ti,am4-l4-fast + - ti,am4-l4-per + - ti,am4-l4-wkup + - ti,dm814-l4hs + - ti,dm814-l4ls + required: + - compatible + +properties: + compatible: + items: + - enum: + - ti,omap2-l4 + - ti,omap2-l4-wkup + - ti,omap3-l4-core + - ti,omap4-l4-abe + - ti,omap4-l4-cfg + - ti,omap4-l4-per + - ti,omap4-l4-wkup + - ti,omap5-l4-abe + - ti,omap5-l4-cfg + - ti,omap5-l4-per + - ti,omap5-l4-wkup + - ti,dra7-l4-cfg + - ti,dra7-l4-per1 + - ti,dra7-l4-per2 + - ti,dra7-l4-per3 + - ti,dra7-l4-wkup + - ti,am33xx-l4-fast + - ti,am33xx-l4-fw + - ti,am33xx-l4-mpuss + - ti,am33xx-l4-per + - ti,am33xx-l4-wkup + - ti,am4-l4-fast + - ti,am4-l4-per + - ti,am4-l4-wkup + - ti,dm814-l4hs + - ti,dm814-l4ls + - enum: + - simple-bus + - simple-pm-bus + + reg: + minItems: 1 + maxItems: 6 + + reg-names: + minItems: 1 + maxItems: 6 + items: + enum: + - ap + - la + - ia0 + - ia1 + - ia2 + - ia3 + + ranges: true + + dma-ranges: true + + clocks: + maxItems: 1 + + clock-names: + items: + - const: fck + + power-domains: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +required: + - compatible + - ranges + +additionalProperties: + type: object + +examples: + - | + bus@48000000 { + compatible = "ti,omap4-l4-per", "simple-bus"; + reg = <0x48000000 0x800>, + <0x48000800 0x800>, + <0x48001000 0x400>, + <0x48001400 0x400>, + <0x48001800 0x400>, + <0x48001c00 0x400>; + reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x48000000 0x100000>; + }; From e8b51396b575d4586bec83323a8aa9cae97c437c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 13 Aug 2026 09:53:59 -0500 Subject: [PATCH 34/40] dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: Drop invalid JSON pointer The $ref "arm,gic.yaml#/properties/#interrupt-cells" doesn't work when used with another json-schema implementation (rust). The issue is it not a valid URI due to the 2nd "#" character in the JSON pointer. Though a "#" is supposed to be valid within a JSON pointer. A possible solution is to encode the "#" as "%23" instead, but the dtschema tools don't handle that. Just avoid all these issues as the $ref only resolves to a "const: 3" schema and specify it directly. Link: https://patch.msgid.link/20260813145453.1919998-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/mediatek,mt6577-sysirq.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,mt6577-sysirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/mediatek,mt6577-sysirq.yaml index 30d76692ca87..b94fc3cec175 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,mt6577-sysirq.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,mt6577-sysirq.yaml @@ -49,7 +49,8 @@ properties: interrupt-controller: true "#interrupt-cells": - $ref: arm,gic.yaml#/properties/#interrupt-cells + const: 3 + description: The cells have the same encoding as defined in arm,gic.yaml. required: - reg From 7f1e3dd7c80d4f56eaebb289de8794f6a29ff197 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 13 Aug 2026 12:39:58 -0500 Subject: [PATCH 35/40] dt-bindings: devfreq: samsung,exynos-ppmu: Use standard regex syntax The "{,N}" regex syntax is non-standard, but happens to be supported by python re module. It is equivalent to "{0,N}" which is more commonly supported. This fixes using a rust implementation of the DT schema tools. Link: https://patch.msgid.link/20260813174037.2263884-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml b/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml index d27dcb2fef12..a3f0cd508b3a 100644 --- a/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml +++ b/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml @@ -40,7 +40,7 @@ properties: type: object patternProperties: - '^ppmu-event[0-9]+(-[a-z0-9]+){,2}$': + '^ppmu-event[0-9]+(-[a-z0-9]+){0,2}$': type: object properties: event-name: From 3cb36d5626383c3032feaa019a2306345ba0cf23 Mon Sep 17 00:00:00 2001 From: Bhargav Joshi Date: Thu, 13 Aug 2026 05:09:08 +0530 Subject: [PATCH 36/40] media: dt-bindings: ti,da850-vpif: Convert to dt-schema Convert the Texas Instruments DA850/AM18x Video Port Interface (VPIF) device tree binding from text format to YAML dt-schema. Add power-domains property missing from text. Signed-off-by: Bhargav Joshi Link: https://patch.msgid.link/20260813-ti-da850-vpif-v2-1-80ba62ca53d0@gmail.com Signed-off-by: Rob Herring (Arm) --- .../bindings/media/ti,da850-vpif.txt | 106 ----------- .../bindings/media/ti,da850-vpif.yaml | 168 ++++++++++++++++++ 2 files changed, 168 insertions(+), 106 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/ti,da850-vpif.txt create mode 100644 Documentation/devicetree/bindings/media/ti,da850-vpif.yaml diff --git a/Documentation/devicetree/bindings/media/ti,da850-vpif.txt b/Documentation/devicetree/bindings/media/ti,da850-vpif.txt deleted file mode 100644 index e47c7ccc57f1..000000000000 --- a/Documentation/devicetree/bindings/media/ti,da850-vpif.txt +++ /dev/null @@ -1,106 +0,0 @@ -Texas Instruments VPIF ----------------------- - -The TI Video Port InterFace (VPIF) is the primary component for video -capture and display on the DA850/AM18x family of TI DaVinci/Sitara -SoCs. - -TI Document reference: SPRUH82C, Chapter 35 -http://www.ti.com/lit/pdf/spruh82 - -Required properties: -- compatible: must be "ti,da850-vpif" -- reg: physical base address and length of the registers set for the device; -- interrupts: should contain IRQ line for the VPIF - -Video Capture: - -VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a -single 16-bit channel. It should contain one or two port child nodes -with child 'endpoint' node. If there are two ports then port@0 must -describe the input and port@1 output channels. Please refer to the -bindings defined in -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example using 2 8-bit input channels, one of which is connected to an -I2C-connected TVP5147 decoder: - - vpif: vpif@217000 { - compatible = "ti,da850-vpif"; - reg = <0x217000 0x1000>; - interrupts = <92>; - - port@0 { - vpif_input_ch0: endpoint@0 { - reg = <0>; - bus-width = <8>; - remote-endpoint = <&composite_in>; - }; - - vpif_input_ch1: endpoint@1 { - reg = <1>; - bus-width = <8>; - data-shift = <8>; - }; - }; - - port@1 { - vpif_output_ch0: endpoint { - bus-width = <8>; - remote-endpoint = <&composite_out>; - }; - }; - }; - -[ ... ] - -&i2c0 { - - tvp5147@5d { - compatible = "ti,tvp5147"; - reg = <0x5d>; - - port { - composite_in: endpoint { - hsync-active = <1>; - vsync-active = <1>; - pclk-sample = <0>; - - /* VPIF channel 0 (lower 8-bits) */ - remote-endpoint = <&vpif_input_ch0>; - bus-width = <8>; - }; - }; - }; - - adv7343@2a { - compatible = "adi,adv7343"; - reg = <0x2a>; - - port { - composite_out: endpoint { - adi,dac-enable = <1 1 1>; - adi,sd-dac-enable = <1>; - - remote-endpoint = <&vpif_output_ch0>; - bus-width = <8>; - }; - }; - }; -}; - - -Alternatively, an example when the bus is configured as a single -16-bit input (e.g. for raw-capture mode): - - vpif: vpif@217000 { - compatible = "ti,da850-vpif"; - reg = <0x217000 0x1000>; - interrupts = <92>; - - port { - vpif_ch0: endpoint { - bus-width = <16>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/ti,da850-vpif.yaml b/Documentation/devicetree/bindings/media/ti,da850-vpif.yaml new file mode 100644 index 000000000000..77de70be807a --- /dev/null +++ b/Documentation/devicetree/bindings/media/ti,da850-vpif.yaml @@ -0,0 +1,168 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/ti,da850-vpif.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DA850/AM18x Video Port Interface (VPIF) + +maintainers: + - Lad, Prabhakar + +description: + The Video Port Interface (VPIF) is the primary component for video capture + and display on the DA850/AM18x family of TI DaVinci/Sitara SoCs. + + TI Document reference:- SPRUH82C, Chapter 35 + https://www.ti.com/lit/pdf/spruh82 + +properties: + compatible: + const: ti,da850-vpif + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + VPIF port when the bus is configured as a single 16-bit input + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-width: + enum: [8, 16] + +patternProperties: + ^port@[0-1]$: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a + single 16-bit channel. It should contain one or two port child nodes + with child 'endpoint' node. If there are two ports then port@0 must + describe the input and port@1 output channels. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-width: + enum: [8, 16] + + endpoint@0: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + description: + First 8-bit channel using the lower data lines [7:0]. + + properties: + bus-width: + const: 8 + + data-shift: + const: 0 + + endpoint@1: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + description: + Second 8-bit channel using the upper data lines [15:8]. + + properties: + bus-width: + const: 8 + + data-shift: + const: 8 + + anyOf: + - properties: + endpoint@0: false + endpoint@1: false + - properties: + endpoint: false + +required: + - compatible + - reg + - interrupts + +oneOf: + - properties: + port@0: false + port@1: false + - properties: + port: false + +additionalProperties: false + +examples: + - | + vpif@217000 { + compatible = "ti,da850-vpif"; + reg = <0x217000 0x1000>; + interrupts = <92>; + + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + vpif_input_ch0: endpoint@0 { + reg = <0>; + bus-width = <8>; + remote-endpoint = <&composite_in>; + }; + + vpif_input_ch1: endpoint@1 { + reg = <1>; + bus-width = <8>; + data-shift = <8>; + }; + }; + + port@1 { + reg = <1>; + + vpif_output_ch0: endpoint { + bus-width = <8>; + remote-endpoint = <&composite_out>; + }; + }; + }; + + - | + vpif@217000 { + compatible = "ti,da850-vpif"; + reg = <0x217000 0x1000>; + interrupts = <92>; + + port { + vpif_ch0: endpoint { + bus-width = <16>; + }; + }; + }; From 87aec8a16cb6d1bbbafdab2f2be7c31a474cb724 Mon Sep 17 00:00:00 2001 From: Bhargav Joshi Date: Thu, 13 Aug 2026 05:53:55 +0530 Subject: [PATCH 37/40] dt-bindings: power: reset: ti,keystone-reset: Convert to DT schema Convert Texas Instruments Keystone SoC Reset Controller from text to DT schema. no new functional changes. Signed-off-by: Bhargav Joshi Link: https://patch.msgid.link/20260813-ti-keystone-reset-v1-1-189389503324@gmail.com Signed-off-by: Rob Herring (Arm) --- .../bindings/power/reset/keystone-reset.txt | 67 --------------- .../power/reset/ti,keystone-reset.yaml | 81 +++++++++++++++++++ 2 files changed, 81 insertions(+), 67 deletions(-) delete mode 100644 Documentation/devicetree/bindings/power/reset/keystone-reset.txt create mode 100644 Documentation/devicetree/bindings/power/reset/ti,keystone-reset.yaml diff --git a/Documentation/devicetree/bindings/power/reset/keystone-reset.txt b/Documentation/devicetree/bindings/power/reset/keystone-reset.txt deleted file mode 100644 index c5c03789ed1e..000000000000 --- a/Documentation/devicetree/bindings/power/reset/keystone-reset.txt +++ /dev/null @@ -1,67 +0,0 @@ -* Device tree bindings for Texas Instruments keystone reset - -This node is intended to allow SoC reset in case of software reset -of selected watchdogs. - -The Keystone SoCs can contain up to 4 watchdog timers to reset -SoC. Each watchdog timer event input is connected to the Reset Mux -block. The Reset Mux block can be configured to cause reset or not. - -Additionally soft or hard reset can be configured. - -Required properties: - -- compatible: ti,keystone-reset - -- ti,syscon-pll: phandle/offset pair. The phandle to syscon used to - access pll controller registers and the offset to use - reset control registers. - -- ti,syscon-dev: phandle/offset pair. The phandle to syscon used to - access device state control registers and the offset - in order to use mux block registers for all watchdogs. - -Optional properties: - -- ti,soft-reset: Boolean option indicating soft reset. - By default hard reset is used. - -- ti,wdt-list: WDT list that can cause SoC reset. It's not related - to WDT driver, it's just needed to enable a SoC related - reset that's triggered by one of WDTs. The list is - in format: <0>, <2>; It can be in random order and - begins from 0 to 3, as keystone can contain up to 4 SoC - reset watchdogs and can be in random order. - -Example 1: -Setup keystone reset so that in case software reset or -WDT0 is triggered it issues hard reset for SoC. - -pllctrl: pll-controller@2310000 { - compatible = "ti,keystone-pllctrl", "syscon"; - reg = <0x02310000 0x200>; -}; - -devctrl: device-state-control@2620000 { - compatible = "ti,keystone-devctrl", "syscon"; - reg = <0x02620000 0x1000>; -}; - -rstctrl: reset-controller { - compatible = "ti,keystone-reset"; - ti,syscon-pll = <&pllctrl 0xe4>; - ti,syscon-dev = <&devctrl 0x328>; - ti,wdt-list = <0>; -}; - -Example 2: -Setup keystone reset so that in case of software reset or -WDT0 or WDT2 is triggered it issues soft reset for SoC. - -rstctrl: reset-controller { - compatible = "ti,keystone-reset"; - ti,syscon-pll = <&pllctrl 0xe4>; - ti,syscon-dev = <&devctrl 0x328>; - ti,wdt-list = <0>, <2>; - ti,soft-reset; -}; diff --git a/Documentation/devicetree/bindings/power/reset/ti,keystone-reset.yaml b/Documentation/devicetree/bindings/power/reset/ti,keystone-reset.yaml new file mode 100644 index 000000000000..ecc68d37f07e --- /dev/null +++ b/Documentation/devicetree/bindings/power/reset/ti,keystone-reset.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/reset/ti,keystone-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI Keystone SoC Reset Controller + +maintainers: + - Andrew Davis + +description: + This is intended to allow SoC reset in case of software reset of selected + watchdogs. The Keystone SoCs can contain up to 4 watchdog timers to reset + SoC. Each watchdog timer event input is connected to the Reset Mux block. The + Reset Mux block can be configured to cause reset or not. Additionally soft or + hard reset can be configured. + +properties: + compatible: + const: ti,keystone-reset + + reg: + maxItems: 1 + + ti,syscon-pll: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + The phandle to syscon used to access pll controller registers and the + offset to use reset control registers. + items: + - items: + - description: phandle to pll controller syscon + - description: offset within pll controller register space + + ti,syscon-dev: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + The phandle to syscon used to access device state control registers and + the offset in order to use mux block registers for all watchdogs. + items: + - items: + - description: phandle to device state control syscon + - description: offset within device state control register + + ti,soft-reset: + type: boolean + description: + Boolean option indicating soft reset. By default hard reset is used. + + ti,wdt-list: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + WDT list that can cause SoC reset. It's not related to WDT driver, it's + just needed to enable a SoC related reset that's triggered by one of + WDTs. The list is in format- <0>, <2>; It can be in random order and + begins from 0 to 3, as keystone can contain up to 4 SoC reset watchdogs + and can be in random order. + minItems: 1 + maxItems: 4 + items: + minimum: 0 + maximum: 3 + +required: + - compatible + - reg + - ti,syscon-pll + - ti,syscon-dev + +additionalProperties: false + +examples: + - | + reset-controller@328 { + compatible = "ti,keystone-reset"; + reg = <0x328 0x10>; + ti,syscon-pll = <&pllctrl 0xe4>; + ti,syscon-dev = <&devctrl 0x328>; + ti,wdt-list = <0>; + }; From 2d51fa600462a2126d3cc50911a11428d8b8038e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 3 Aug 2026 11:03:04 +0200 Subject: [PATCH 38/40] dtc: dt-check-style: Add missing /dts-v1/ to few test cases The selftest DTS should still look like a real DTS, so it needs '/dts-v1/' marking. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260803-n-dts-style-checker-continued-v3-1-6c9776928cea@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- scripts/dtc/dt-style-selftest/bad/dts-child-name-order.dts | 2 ++ .../dt-style-selftest/bad/dts-extend-node-child-name-order.dts | 2 ++ .../dt-style-selftest/bad/dts-extend-node-digit-node-order.dts | 2 ++ .../dtc/dt-style-selftest/expected/dts-child-name-order.dts.txt | 2 +- .../expected/dts-extend-node-child-name-order.dts.txt | 2 +- .../expected/dts-extend-node-digit-node-order.dts.txt | 2 +- scripts/dtc/dt-style-selftest/good/dts-child-name-order.dts | 2 ++ scripts/dtc/dt-style-selftest/good/dts-digit-node-order.dts | 2 ++ .../dt-style-selftest/good/dts-extend-node-child-name-order.dts | 2 ++ .../dt-style-selftest/good/dts-extend-node-digit-node-order.dts | 2 ++ scripts/dtc/dt-style-selftest/good/soc.dtsi | 2 ++ 11 files changed, 19 insertions(+), 3 deletions(-) diff --git a/scripts/dtc/dt-style-selftest/bad/dts-child-name-order.dts b/scripts/dtc/dt-style-selftest/bad/dts-child-name-order.dts index 49c5c10c92d7..54be9f07b680 100644 --- a/scripts/dtc/dt-style-selftest/bad/dts-child-name-order.dts +++ b/scripts/dtc/dt-style-selftest/bad/dts-child-name-order.dts @@ -1,4 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; diff --git a/scripts/dtc/dt-style-selftest/bad/dts-extend-node-child-name-order.dts b/scripts/dtc/dt-style-selftest/bad/dts-extend-node-child-name-order.dts index 575dadd03c38..296c58a545d5 100644 --- a/scripts/dtc/dt-style-selftest/bad/dts-extend-node-child-name-order.dts +++ b/scripts/dtc/dt-style-selftest/bad/dts-extend-node-child-name-order.dts @@ -1,4 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; diff --git a/scripts/dtc/dt-style-selftest/bad/dts-extend-node-digit-node-order.dts b/scripts/dtc/dt-style-selftest/bad/dts-extend-node-digit-node-order.dts index f3ffc47365a3..813900e3393c 100644 --- a/scripts/dtc/dt-style-selftest/bad/dts-extend-node-digit-node-order.dts +++ b/scripts/dtc/dt-style-selftest/bad/dts-extend-node-digit-node-order.dts @@ -1,4 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; diff --git a/scripts/dtc/dt-style-selftest/expected/dts-child-name-order.dts.txt b/scripts/dtc/dt-style-selftest/expected/dts-child-name-order.dts.txt index 86b1de9bd654..e2eea0862102 100644 --- a/scripts/dtc/dt-style-selftest/expected/dts-child-name-order.dts.txt +++ b/scripts/dtc/dt-style-selftest/expected/dts-child-name-order.dts.txt @@ -1,2 +1,2 @@ # mode=strict -bad/dts-child-name-order.dts:14: [child-name-order] child node 'bar' out of name order +bad/dts-child-name-order.dts:16: [child-name-order] child node 'bar' out of name order diff --git a/scripts/dtc/dt-style-selftest/expected/dts-extend-node-child-name-order.dts.txt b/scripts/dtc/dt-style-selftest/expected/dts-extend-node-child-name-order.dts.txt index e3d8fd367e09..b6e74e6f923e 100644 --- a/scripts/dtc/dt-style-selftest/expected/dts-extend-node-child-name-order.dts.txt +++ b/scripts/dtc/dt-style-selftest/expected/dts-extend-node-child-name-order.dts.txt @@ -1,2 +1,2 @@ # mode=strict -bad/dts-extend-node-child-name-order.dts:20: [child-name-order] child node 'bar' out of name order +bad/dts-extend-node-child-name-order.dts:22: [child-name-order] child node 'bar' out of name order diff --git a/scripts/dtc/dt-style-selftest/expected/dts-extend-node-digit-node-order.dts.txt b/scripts/dtc/dt-style-selftest/expected/dts-extend-node-digit-node-order.dts.txt index 525081867bf7..bf252e4d9815 100644 --- a/scripts/dtc/dt-style-selftest/expected/dts-extend-node-digit-node-order.dts.txt +++ b/scripts/dtc/dt-style-selftest/expected/dts-extend-node-digit-node-order.dts.txt @@ -1,2 +1,2 @@ # mode=strict -bad/dts-extend-node-digit-node-order.dts:21: [child-address-order] child node @10000 out of address order +bad/dts-extend-node-digit-node-order.dts:23: [child-address-order] child node @10000 out of address order diff --git a/scripts/dtc/dt-style-selftest/good/dts-child-name-order.dts b/scripts/dtc/dt-style-selftest/good/dts-child-name-order.dts index d2a278763c3c..af0adf5abf70 100644 --- a/scripts/dtc/dt-style-selftest/good/dts-child-name-order.dts +++ b/scripts/dtc/dt-style-selftest/good/dts-child-name-order.dts @@ -1,4 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; diff --git a/scripts/dtc/dt-style-selftest/good/dts-digit-node-order.dts b/scripts/dtc/dt-style-selftest/good/dts-digit-node-order.dts index d2bf5861c3ee..cdf3f91ebe01 100644 --- a/scripts/dtc/dt-style-selftest/good/dts-digit-node-order.dts +++ b/scripts/dtc/dt-style-selftest/good/dts-digit-node-order.dts @@ -1,4 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; diff --git a/scripts/dtc/dt-style-selftest/good/dts-extend-node-child-name-order.dts b/scripts/dtc/dt-style-selftest/good/dts-extend-node-child-name-order.dts index 47fe5455edfa..97d468051f25 100644 --- a/scripts/dtc/dt-style-selftest/good/dts-extend-node-child-name-order.dts +++ b/scripts/dtc/dt-style-selftest/good/dts-extend-node-child-name-order.dts @@ -1,4 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; diff --git a/scripts/dtc/dt-style-selftest/good/dts-extend-node-digit-node-order.dts b/scripts/dtc/dt-style-selftest/good/dts-extend-node-digit-node-order.dts index 0c292fefa52a..faf49962faf2 100644 --- a/scripts/dtc/dt-style-selftest/good/dts-extend-node-digit-node-order.dts +++ b/scripts/dtc/dt-style-selftest/good/dts-extend-node-digit-node-order.dts @@ -1,4 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; diff --git a/scripts/dtc/dt-style-selftest/good/soc.dtsi b/scripts/dtc/dt-style-selftest/good/soc.dtsi index c60274469555..deec1a973c92 100644 --- a/scripts/dtc/dt-style-selftest/good/soc.dtsi +++ b/scripts/dtc/dt-style-selftest/good/soc.dtsi @@ -1,4 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; From d863ae623af406dd525ecbcd43780e577e09efad Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 3 Aug 2026 11:03:05 +0200 Subject: [PATCH 39/40] dtc: dt-check-style: Simplify setting depth of DtsLine When creating new DtsLine object, pass expected indentation depth as constructor, instead of assigning it immediately after, so the code will be easier to read and explicit (depth is not supposed to change during DtsLine lifetime). Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260803-n-dts-style-checker-continued-v3-2-6c9776928cea@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- scripts/dtc/dt-check-style | 31 +++++++++++-------------------- 1 file changed, 11 insertions(+), 20 deletions(-) diff --git a/scripts/dtc/dt-check-style b/scripts/dtc/dt-check-style index 3985923622e8..96deffc0d8a7 100755 --- a/scripts/dtc/dt-check-style +++ b/scripts/dtc/dt-check-style @@ -82,11 +82,12 @@ class DtsLine: 'node_name', 'node_addr', 'label', 'ref_name', 'depth', 'closures') - def __init__(self, lineno, raw, linetype, indent_str, stripped): + def __init__(self, lineno, raw, linetype, depth, indent_str, stripped): self.lineno = lineno # 1-based within the block self.raw = raw self.linetype = linetype self.indent_str = indent_str # leading whitespace as-is + self.depth = depth self.stripped = stripped self.prop_name = None self.continuations = [] @@ -94,7 +95,6 @@ class DtsLine: self.node_addr = None self.label = None self.ref_name = None - self.depth = 0 # filled in by classify_lines self.closures = 1 # count of '}' on a NODE_CLOSE line @@ -162,16 +162,14 @@ def classify_lines(text): # or a blank line). if in_cpp_macro: dl = DtsLine(i, raw, LineType.PREPROCESSOR, - indent_str, stripped) - dl.depth = depth + depth, indent_str, stripped) out.append(dl) in_cpp_macro = (bool(stripped) and stripped.rstrip().endswith('\\')) continue if not stripped: - dl = DtsLine(i, raw, LineType.BLANK, '', '') - dl.depth = depth + dl = DtsLine(i, raw, LineType.BLANK, depth, '', '') out.append(dl) continue @@ -180,15 +178,13 @@ def classify_lines(text): else LineType.COMMENT_BODY) if ltype == LineType.COMMENT_END: in_block_comment = False - dl = DtsLine(i, raw, ltype, indent_str, stripped) - dl.depth = depth + dl = DtsLine(i, raw, ltype, depth, indent_str, stripped) out.append(dl) continue if (stripped.startswith('#') or stripped.startswith('/')) and is_preprocessor(stripped): - dl = DtsLine(i, raw, LineType.PREPROCESSOR, + dl = DtsLine(i, raw, LineType.PREPROCESSOR, depth, indent_str, stripped) - dl.depth = depth out.append(dl) prev_complete = True in_cpp_macro = stripped.rstrip().endswith('\\') @@ -205,14 +201,12 @@ def classify_lines(text): # structural classification entirely. if not code: ltype = LineType.COMMENT_START if opens_block else LineType.COMMENT - dl = DtsLine(i, raw, ltype, indent_str, stripped) - dl.depth = depth + dl = DtsLine(i, raw, ltype, depth, indent_str, stripped) out.append(dl) continue if not prev_complete: - dl = DtsLine(i, raw, LineType.CONTINUATION, indent_str, code) - dl.depth = depth + dl = DtsLine(i, raw, LineType.CONTINUATION, depth, indent_str, code) out.append(dl) prev_complete = (code.endswith(';') or code.endswith('{') or @@ -227,26 +221,23 @@ def classify_lines(text): if re_only_closures.match(code): closures = code.count('}') depth = max(depth - closures, 0) - dl = DtsLine(i, raw, LineType.NODE_CLOSE, indent_str, code) - dl.depth = depth + dl = DtsLine(i, raw, LineType.NODE_CLOSE, depth, indent_str, code) dl.closures = closures out.append(dl) prev_complete = True continue if code.endswith('{'): - dl = DtsLine(i, raw, LineType.NODE_OPEN, indent_str, code) + dl = DtsLine(i, raw, LineType.NODE_OPEN, depth, indent_str, code) parse_node_header(dl) - dl.depth = depth out.append(dl) depth += 1 prev_complete = True continue # Property (or first line of a multi-line property). - dl = DtsLine(i, raw, LineType.PROPERTY, indent_str, code) + dl = DtsLine(i, raw, LineType.PROPERTY, depth, indent_str, code) parse_property_name(dl) - dl.depth = depth out.append(dl) prev_complete = code.endswith(';') From e1c13aed4a1641550e8c9518c96f016e1d52d09b Mon Sep 17 00:00:00 2001 From: Yijie Yang Date: Tue, 11 Aug 2026 16:46:47 +0800 Subject: [PATCH 40/40] dt-bindings: interconnect: qcom-bwmon: Add Maili cpu-bwmon compatible Add the Qualcomm Maili SoC compatible string for the CPU bandwidth monitor (BWMONv4). This falls back to the sdm845-bwmon compatible, consistent with the existing pattern used by other recent SoCs such as sm8750 and kaanapali. Signed-off-by: Yijie Yang Acked-by: Krzysztof Kozlowski Reviewed-by: Jingyi Wang Link: https://patch.msgid.link/20260811-bwmon-v2-1-80f7f150ab9e@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index c0a5e925ff95..21b4e04727de 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -29,6 +29,7 @@ properties: - qcom,glymur-cpu-bwmon - qcom,hawi-cpu-bwmon - qcom,kaanapali-cpu-bwmon + - qcom,maili-cpu-bwmon - qcom,qcm2290-cpu-bwmon - qcom,qcs615-cpu-bwmon - qcom,qcs8300-cpu-bwmon