From 0cb140d07fc75fb40dc402ba7e6e8c3c3a6f9d71 Mon Sep 17 00:00:00 2001 From: Thor Thayer Date: Tue, 15 May 2018 17:26:27 -0500 Subject: [PATCH 1/5] arm64: dts: stratix10: Add QSPI support for Stratix10 Add qspi_clock The qspi_clk frequency is updated by U-Boot before starting Linux. Add QSPI interface node. Add QSPI flash memory child node. Setup the QSPI memory in 2 partitions. Signed-off-by: Thor Thayer Signed-off-by: Dinh Nguyen --- .../boot/dts/altera/socfpga_stratix10.dtsi | 21 +++++++++++ .../dts/altera/socfpga_stratix10_socdk.dts | 35 +++++++++++++++++++ 2 files changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 67dac595dc72..47fa4b450324 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -119,6 +119,12 @@ osc1: osc1 { #clock-cells = <0>; compatible = "fixed-clock"; }; + + qspi_clk: qspi-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + }; }; gmac0: ethernet@ff800000 { @@ -464,5 +470,20 @@ sdramedac { interrupts = <16 4>, <48 4>; }; }; + + qspi: spi@ff8d2000 { + compatible = "cdns,qspi-nor"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xff8d2000 0x100>, + <0xff900000 0x100000>; + interrupts = <0 3 4>; + cdns,fifo-depth = <128>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x00000000>; + clocks = <&qspi_clk>; + + status = "disabled"; + }; }; }; diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts index f9b1ef12db48..6edc4fa9fd42 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts @@ -147,3 +147,38 @@ rtc@68 { reg = <0x68>; }; }; + +&qspi { + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q00a"; + reg = <0>; + spi-max-frequency = <50000000>; + + m25p,fast-read; + cdns,page-size = <256>; + cdns,block-size = <16>; + cdns,read-delay = <1>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + qspi_boot: partition@0 { + label = "Boot and fpga data"; + reg = <0x0 0x4000000>; + }; + + qspi_rootfs: partition@4000000 { + label = "Root Filesystem - JFFS2"; + reg = <0x4000000 0x4000000>; + }; + }; + }; +}; From 03761ab1b0ab134abcb900d23b32f7c0c615b360 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Wed, 6 Jun 2018 12:07:12 -0500 Subject: [PATCH 2/5] arm64: dts: stratix10: fill in clocks field for usb and watchdog Populate the clocks field for USB and watchdog. Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 47fa4b450324..1412e98fe4c4 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -413,6 +413,7 @@ usb0: usb@ffb00000 { phy-names = "usb2-phy"; resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; + clocks = <&clkmgr STRATIX10_USB_CLK>; status = "disabled"; }; @@ -424,6 +425,7 @@ usb1: usb@ffb40000 { phy-names = "usb2-phy"; resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; + clocks = <&clkmgr STRATIX10_USB_CLK>; status = "disabled"; }; @@ -432,6 +434,7 @@ watchdog0: watchdog@ffd00200 { reg = <0xffd00200 0x100>; interrupts = <0 117 4>; resets = <&rst WATCHDOG0_RESET>; + clocks = <&clkmgr STRATIX10_L4_SYS_FREE_CLK>; status = "disabled"; }; @@ -440,6 +443,7 @@ watchdog1: watchdog@ffd00300 { reg = <0xffd00300 0x100>; interrupts = <0 118 4>; resets = <&rst WATCHDOG1_RESET>; + clocks = <&clkmgr STRATIX10_L4_SYS_FREE_CLK>; status = "disabled"; }; @@ -448,6 +452,7 @@ watchdog2: watchdog@ffd00400 { reg = <0xffd00400 0x100>; interrupts = <0 125 4>; resets = <&rst WATCHDOG2_RESET>; + clocks = <&clkmgr STRATIX10_L4_SYS_FREE_CLK>; status = "disabled"; }; @@ -456,6 +461,7 @@ watchdog3: watchdog@ffd00500 { reg = <0xffd00500 0x100>; interrupts = <0 126 4>; resets = <&rst WATCHDOG3_RESET>; + clocks = <&clkmgr STRATIX10_L4_SYS_FREE_CLK>; status = "disabled"; }; From 05690e8ab29e9d144f634ffa65b8c7f765f627c9 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Wed, 6 Jun 2018 14:55:54 -0500 Subject: [PATCH 3/5] arm64: dts: stratix10: add OCP reset property for ethernet Add the additional OCP reset property for the ethernet nodes. Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 1412e98fe4c4..a77bde19a9d3 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -133,8 +133,8 @@ gmac0: ethernet@ff800000 { interrupts = <0 90 4>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00]; - resets = <&rst EMAC0_RESET>; - reset-names = "stmmaceth"; + resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>; + reset-names = "stmmaceth", "stmmaceth-ocp"; clocks = <&clkmgr STRATIX10_EMAC0_CLK>; clock-names = "stmmaceth"; status = "disabled"; @@ -146,8 +146,8 @@ gmac1: ethernet@ff802000 { interrupts = <0 91 4>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00]; - resets = <&rst EMAC1_RESET>; - reset-names = "stmmaceth"; + resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>; + reset-names = "stmmaceth", "stmmaceth-ocp"; clocks = <&clkmgr STRATIX10_EMAC1_CLK>; clock-names = "stmmaceth"; status = "disabled"; @@ -159,8 +159,8 @@ gmac2: ethernet@ff804000 { interrupts = <0 92 4>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00]; - resets = <&rst EMAC2_RESET>; - reset-names = "stmmaceth"; + resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>; + reset-names = "stmmaceth", "stmmaceth-ocp"; clocks = <&clkmgr STRATIX10_EMAC2_CLK>; clock-names = "stmmaceth"; status = "disabled"; From 84f95684d9503d7cff920c716b2c7fd5522217eb Mon Sep 17 00:00:00 2001 From: Thor Thayer Date: Fri, 22 Jun 2018 13:49:36 -0500 Subject: [PATCH 4/5] ARM: dts: Add SPI0 node for Arria10 Add the SPI0 node for Arria10. Signed-off-by: Thor Thayer Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/socfpga_arria10.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 791ca15c799e..a4dcb68f4322 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -587,6 +587,18 @@ i2c4: i2c@ffc02600 { status = "disabled"; }; + spi0: spi@ffda4000 { + compatible = "snps,dw-apb-ssi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xffda4000 0x100>; + interrupts = <0 101 4>; + num-cs = <4>; + /*32bit_access;*/ + clocks = <&spi_m_clk>; + status = "disabled"; + }; + spi1: spi@ffda5000 { compatible = "snps,dw-apb-ssi"; #address-cells = <1>; From 70455ac7ffb6b707af1e56e1993af82906fddaae Mon Sep 17 00:00:00 2001 From: Thor Thayer Date: Wed, 27 Jun 2018 12:50:27 -0500 Subject: [PATCH 5/5] arm64: dts: stratix10: Add SPI node clocks for Stratix10 Add the required clocks for the new Stratix10 clock bindings to the SPI nodes. Signed-off-by: Thor Thayer Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index a77bde19a9d3..d033da401c26 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -316,6 +316,7 @@ spi0: spi@ffda4000 { resets = <&rst SPIM0_RESET>; reg-io-width = <4>; num-cs = <4>; + clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>; status = "disabled"; }; @@ -328,6 +329,7 @@ spi1: spi@ffda5000 { resets = <&rst SPIM1_RESET>; reg-io-width = <4>; num-cs = <4>; + clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>; status = "disabled"; };