arm64: dts: qcom: x1e80100: Update GPU OPP table

Update the GPU OPP table with new opp levels along with the
speedbin configurations.

Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Link: https://lore.kernel.org/r/20250701-x1e-speedbin-b4-v2-3-a8a7e06d39fb@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Akhil P Oommen
2025-07-01 21:50:46 +05:30
committed by Bjorn Andersson
parent 318d441dfe
commit be6f43c64c
2 changed files with 56 additions and 2 deletions

View File

@@ -3794,6 +3794,9 @@ gpu: gpu@3d00000 {
qcom,gmu = <&gmu>;
#cooling-cells = <2>;
nvmem-cells = <&gpu_speed_bin>;
nvmem-cell-names = "speed_bin";
interconnects = <&gem_noc MASTER_GFX3D 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "gfx-mem";
@@ -3806,11 +3809,28 @@ gpu_zap_shader: zap-shader {
gpu_opp_table: opp-table {
compatible = "operating-points-v2-adreno", "operating-points-v2";
opp-1500000000 {
opp-hz = /bits/ 64 <1500000000>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L5>;
opp-peak-kBps = <16500000>;
qcom,opp-acd-level = <0xa82a5ffd>;
opp-supported-hw = <0x03>;
};
opp-1375000000 {
opp-hz = /bits/ 64 <1375000000>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L4>;
opp-peak-kBps = <16500000>;
qcom,opp-acd-level = <0xa82a5ffd>;
opp-supported-hw = <0x03>;
};
opp-1250000000 {
opp-hz = /bits/ 64 <1250000000>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L3>;
opp-peak-kBps = <16500000>;
qcom,opp-acd-level = <0xa82a5ffd>;
opp-supported-hw = <0x07>;
};
opp-1175000000 {
@@ -3818,13 +3838,24 @@ opp-1175000000 {
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L2>;
opp-peak-kBps = <14398438>;
qcom,opp-acd-level = <0xa82a5ffd>;
opp-supported-hw = <0x07>;
};
opp-1100000000 {
opp-1100000000-0 {
opp-hz = /bits/ 64 <1100000000>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
opp-peak-kBps = <14398438>;
qcom,opp-acd-level = <0xa82a5ffd>;
opp-supported-hw = <0x07>;
};
/* Only applicable for SKUs which has 1100Mhz as Fmax */
opp-1100000000-1 {
opp-hz = /bits/ 64 <1100000000>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
opp-peak-kBps = <16500000>;
qcom,opp-acd-level = <0xa82a5ffd>;
opp-supported-hw = <0x08>;
};
opp-1000000000 {
@@ -3832,6 +3863,7 @@ opp-1000000000 {
opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
opp-peak-kBps = <14398438>;
qcom,opp-acd-level = <0xa82b5ffd>;
opp-supported-hw = <0x0f>;
};
opp-925000000 {
@@ -3839,6 +3871,7 @@ opp-925000000 {
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
opp-peak-kBps = <14398438>;
qcom,opp-acd-level = <0xa82b5ffd>;
opp-supported-hw = <0x0f>;
};
opp-800000000 {
@@ -3846,6 +3879,7 @@ opp-800000000 {
opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
opp-peak-kBps = <12449219>;
qcom,opp-acd-level = <0xa82c5ffd>;
opp-supported-hw = <0x0f>;
};
opp-744000000 {
@@ -3853,13 +3887,24 @@ opp-744000000 {
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
opp-peak-kBps = <10687500>;
qcom,opp-acd-level = <0x882e5ffd>;
opp-supported-hw = <0x0f>;
};
opp-687000000 {
opp-687000000-0 {
opp-hz = /bits/ 64 <687000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
opp-peak-kBps = <8171875>;
qcom,opp-acd-level = <0x882e5ffd>;
opp-supported-hw = <0x0f>;
};
/* Only applicable for SKUs which has 687Mhz as Fmax */
opp-687000000-1 {
opp-hz = /bits/ 64 <687000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
opp-peak-kBps = <16500000>;
qcom,opp-acd-level = <0x882e5ffd>;
opp-supported-hw = <0x10>;
};
opp-550000000 {
@@ -3867,6 +3912,7 @@ opp-550000000 {
opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
opp-peak-kBps = <6074219>;
qcom,opp-acd-level = <0xc0285ffd>;
opp-supported-hw = <0x1f>;
};
opp-390000000 {
@@ -3874,6 +3920,7 @@ opp-390000000 {
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
opp-peak-kBps = <3000000>;
qcom,opp-acd-level = <0xc0285ffd>;
opp-supported-hw = <0x1f>;
};
opp-300000000 {
@@ -3881,6 +3928,7 @@ opp-300000000 {
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
opp-peak-kBps = <2136719>;
qcom,opp-acd-level = <0xc02b5ffd>;
opp-supported-hw = <0x1f>;
};
};
};
@@ -8297,6 +8345,11 @@ qfprom: efuse@221c8000 {
reg = <0 0x221c8000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
gpu_speed_bin: gpu-speed-bin@119 {
reg = <0x119 0x2>;
bits = <7 8>;
};
};
pmu@24091000 {

View File

@@ -18,6 +18,7 @@
/delete-node/ &cpu_pd10;
/delete-node/ &cpu_pd11;
/delete-node/ &gpu_opp_table;
/delete-node/ &gpu_speed_bin;
/delete-node/ &pcie3_phy;
/delete-node/ &thermal_zones;