From dfce0738256e4cca93ad3a3069698a44c95489a6 Mon Sep 17 00:00:00 2001 From: Ritesh Harjani Date: Mon, 21 Nov 2016 12:07:14 +0530 Subject: [PATCH 1/2] ARM: dts: Add xo to sdhc clock node on qcom platforms Add xo entry to sdhc clock node on all qcom platforms. Signed-off-by: Ritesh Harjani Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 10 ++++++---- arch/arm64/boot/dts/qcom/msm8996.dtsi | 9 +++++---- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 4221b7d2c0ce..1353f0e10f47 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -521,8 +521,9 @@ sdhc_1: sdhci@07824000 { interrupts = <0 123 0>, <0 138 0>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC1_APPS_CLK>, - <&gcc GCC_SDCC1_AHB_CLK>; - clock-names = "core", "iface"; + <&gcc GCC_SDCC1_AHB_CLK>, + <&xo_board>; + clock-names = "core", "iface", "xo"; bus-width = <8>; non-removable; status = "disabled"; @@ -536,8 +537,9 @@ sdhc_2: sdhci@07864000 { interrupts = <0 125 0>, <0 221 0>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC2_APPS_CLK>, - <&gcc GCC_SDCC2_AHB_CLK>; - clock-names = "core", "iface"; + <&gcc GCC_SDCC2_AHB_CLK>, + <&xo_board>; + clock-names = "core", "iface", "xo"; bus-width = <4>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index cde4114bae5a..9d1d7ad9b075 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -228,14 +228,14 @@ timer { }; clocks { - xo_board { + xo_board: xo_board { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; clock-output-names = "xo_board"; }; - sleep_clk { + sleep_clk: sleep_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32764>; @@ -405,9 +405,10 @@ sdhc2: sdhci@74a4900 { interrupts = <0 125 0>, <0 221 0>; interrupt-names = "hc_irq", "pwr_irq"; - clock-names = "iface", "core"; + clock-names = "iface", "core", "xo"; clocks = <&gcc GCC_SDCC2_AHB_CLK>, - <&gcc GCC_SDCC2_APPS_CLK>; + <&gcc GCC_SDCC2_APPS_CLK>, + <&xo_board>; bus-width = <4>; }; From c987775aa4af1034186ba17f67c21636451dc6d4 Mon Sep 17 00:00:00 2001 From: Ritesh Harjani Date: Mon, 21 Nov 2016 12:07:22 +0530 Subject: [PATCH 2/2] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 This adds mmc-ddr-1_8v support to DT for sdhc1 of msm8916. Signed-off-by: Ritesh Harjani Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 1353f0e10f47..f8ff327667c5 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -524,6 +524,7 @@ sdhc_1: sdhci@07824000 { <&gcc GCC_SDCC1_AHB_CLK>, <&xo_board>; clock-names = "core", "iface", "xo"; + mmc-ddr-1_8v; bus-width = <8>; non-removable; status = "disabled";