diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index d7fb1ddb8789..01673fe96930 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -175,8 +175,6 @@ static u64 __xe_pt_empty_pte(struct xe_gt *gt, struct xe_vm *vm,
 	if (level == 0) {
 		u64 empty = gen8_pte_encode(NULL, vm->scratch_bo[id], 0,
 					    XE_CACHE_WB, 0, 0);
-		if (vm->flags & XE_VM_FLAGS_64K)
-			empty |= GEN12_PTE_PS64;
 
 		return empty;
 	} else {
@@ -331,13 +329,23 @@ int xe_pt_create_scratch(struct xe_device *xe, struct xe_gt *gt,
 			 struct xe_vm *vm)
 {
 	u8 id = gt->info.id;
+	unsigned int flags;
 	int i;
 
+	/*
+	 * So we don't need to worry about 64K TLB hints when dealing with
+	 * scratch entires, rather keep the scratch page in system memory on
+	 * platforms where 64K pages are needed for VRAM.
+	 */
+	flags = XE_BO_CREATE_PINNED_BIT;
+	if (vm->flags & XE_VM_FLAGS_64K)
+		flags |= XE_BO_CREATE_SYSTEM_BIT;
+	else
+		flags |= XE_BO_CREATE_VRAM_IF_DGFX(gt);
+
 	vm->scratch_bo[id] = xe_bo_create_pin_map(xe, gt, vm, SZ_4K,
 						  ttm_bo_type_kernel,
-						  XE_BO_CREATE_VRAM_IF_DGFX(gt) |
-						  XE_BO_CREATE_IGNORE_MIN_PAGE_SIZE_BIT |
-						  XE_BO_CREATE_PINNED_BIT);
+						  flags);
 	if (IS_ERR(vm->scratch_bo[id]))
 		return PTR_ERR(vm->scratch_bo[id]);