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arm64: dts: qcom: qcm6490-idp: Add WSA8830 speakers and WCD9370 headset codec
Add nodes for WSA8830 speakers and WCD9370 headset codec on qcm6490-idp board and enable lpass macros along with audio support pin controls. Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250903151337.1037246-8-mohammad.rafi.shaik@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
committed by
Bjorn Andersson
parent
48b5ea6de4
commit
aa04c29861
@@ -18,6 +18,7 @@
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#include "pm7325.dtsi"
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#include "pm8350c.dtsi"
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#include "pmk8350.dtsi"
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#include "qcs6490-audioreach.dtsi"
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/delete-node/ &ipa_fw_mem;
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/delete-node/ &rmtfs_mem;
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@@ -169,6 +170,30 @@ vph_pwr: vph-pwr-regulator {
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regulator-min-microvolt = <3700000>;
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regulator-max-microvolt = <3700000>;
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};
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wcd9370: audio-codec-0 {
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compatible = "qcom,wcd9370-codec";
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pinctrl-0 = <&wcd_default>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
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vdd-buck-supply = <&vreg_l17b_1p7>;
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vdd-rxtx-supply = <&vreg_l18b_1p8>;
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vdd-px-supply = <&vreg_l18b_1p8>;
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vdd-mic-bias-supply = <&vreg_bob_3p296>;
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qcom,micbias1-microvolt = <1800000>;
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qcom,micbias2-microvolt = <1800000>;
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qcom,micbias3-microvolt = <1800000>;
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qcom,micbias4-microvolt = <1800000>;
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qcom,rx-device = <&wcd937x_rx>;
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qcom,tx-device = <&wcd937x_tx>;
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#sound-dai-cells = <1>;
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};
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};
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&apps_rsc {
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@@ -536,6 +561,22 @@ &gpu_zap_shader {
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firmware-name = "qcom/qcm6490/a660_zap.mbn";
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};
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&lpass_rx_macro {
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status = "okay";
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};
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&lpass_tx_macro {
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status = "okay";
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};
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&lpass_va_macro {
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status = "okay";
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};
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&lpass_wsa_macro {
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status = "okay";
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};
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&mdss {
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status = "okay";
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};
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@@ -716,6 +757,81 @@ &sdhc_2 {
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cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
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};
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&swr0 {
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status = "okay";
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wcd937x_rx: codec@0,4 {
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compatible = "sdw20217010a00";
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reg = <0 4>;
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/*
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* WCD9370 RX Port 1 (HPH_L/R) <==> SWR1 Port 1 (HPH_L/R)
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* WCD9370 RX Port 2 (CLSH) <==> SWR1 Port 2 (CLSH)
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* WCD9370 RX Port 3 (COMP_L/R) <==> SWR1 Port 3 (COMP_L/R)
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* WCD9370 RX Port 4 (LO) <==> SWR1 Port 4 (LO)
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* WCD9370 RX Port 5 (DSD_L/R) <==> SWR1 Port 5 (DSD)
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*/
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qcom,rx-port-mapping = <1 2 3 4 5>;
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/*
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* Static channels mapping between slave and master rx port channels.
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* In the order of slave port channels, which is
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* hph_l, hph_r, clsh, comp_l, comp_r, lo, dsd_r, dsd_l.
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*/
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qcom,rx-channel-mapping = /bits/ 8 <1 2 1 1 2 1 1 2>;
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};
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};
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&swr1 {
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status = "okay";
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wcd937x_tx: codec@0,3 {
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compatible = "sdw20217010a00";
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reg = <0 3>;
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/*
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* WCD9370 TX Port 1 (ADC1) <=> SWR2 Port 2
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* WCD9370 TX Port 2 (ADC2, 3) <=> SWR2 Port 2
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* WCD9370 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3
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* WCD9370 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4
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*/
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qcom,tx-port-mapping = <1 1 2 3>;
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/*
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* Static channel mapping between slave and master tx port channels.
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* In the order of slave port channels which is adc1, adc2, adc3,
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* mic0, dmic1, mbhc, dmic2, dmic3, dmci4, dmic5, dmic6, dmic7.
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*/
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qcom,tx-channel-mapping = /bits/ 8 <1 2 1 1 2 3 3 4 1 2 3 4>;
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};
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};
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&swr2 {
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status = "okay";
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left_spkr: speaker@0,1 {
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compatible = "sdw10217020200";
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reg = <0 1>;
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powerdown-gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "SpkrLeft";
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#thermal-sensor-cells = <0>;
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vdd-supply = <&vreg_l18b_1p8>;
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qcom,port-mapping = <1 2 3 7>;
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};
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right_spkr: speaker@0,2 {
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compatible = "sdw10217020200";
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reg = <0 2>;
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powerdown-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "SpkrRight";
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#thermal-sensor-cells = <0>;
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vdd-supply = <&vreg_l18b_1p8>;
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qcom,port-mapping = <4 5 6 8>;
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};
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};
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&tlmm {
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gpio-reserved-ranges = <32 2>, /* ADSP */
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<48 4>; /* NFC */
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@@ -725,6 +841,13 @@ sd_cd: sd-cd-state {
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function = "gpio";
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bias-pull-up;
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};
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wcd_default: wcd-reset-n-active-state {
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pins = "gpio83";
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function = "gpio";
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drive-strength = <16>;
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bias-disable;
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};
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};
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&uart5 {
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@@ -3029,21 +3029,33 @@ lpass_dmic23_data: dmic23-data-state {
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lpass_rx_swr_clk: rx-swr-clk-state {
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pins = "gpio3";
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function = "swr_rx_clk";
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drive-strength = <2>;
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slew-rate = <1>;
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bias-disable;
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};
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lpass_rx_swr_data: rx-swr-data-state {
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pins = "gpio4", "gpio5";
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function = "swr_rx_data";
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drive-strength = <2>;
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slew-rate = <1>;
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bias-bus-hold;
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};
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lpass_tx_swr_clk: tx-swr-clk-state {
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pins = "gpio0";
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function = "swr_tx_clk";
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drive-strength = <2>;
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slew-rate = <1>;
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bias-disable;
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};
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lpass_tx_swr_data: tx-swr-data-state {
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pins = "gpio1", "gpio2", "gpio14";
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function = "swr_tx_data";
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drive-strength = <2>;
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slew-rate = <1>;
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bias-bus-hold;
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};
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lpass_wsa_swr_clk: wsa-swr-clk-state {
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