From a947c8662ef9a5fe16eccf84fbe1b17c7ad97dc3 Mon Sep 17 00:00:00 2001 From: Srinivasan Shanmugam Date: Fri, 10 Jul 2026 16:33:24 +0530 Subject: [PATCH] drm/amdgpu/gfx9.4.3: Fix MEC rollback loop in EOP IRQ setup Fix the error cleanup path in gfx_v9_4_3_set_userq_eop_interrupts() by using the correct loop condition. This ensures all previously enabled EOP IRQs are released if setup fails. Fixes: 832f0aa050ff ("drm/amdgpu/gfx9.4.3: add support for disabling kernel queues") Reported-by: Dan Carpenter Cc: Kent Russell Cc: Alex Deucher Signed-off-by: Srinivasan Shanmugam Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index 44d38b76cb4f..9512fef81d84 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -2331,7 +2331,7 @@ static int gfx_v9_4_3_set_userq_eop_interrupts(struct amdgpu_device *adev, } } for (xcc_id--; xcc_id >= 0; xcc_id--) { - for (m = adev->gfx.mec.num_mec - 1; m <= 0; m--) { + for (m = adev->gfx.mec.num_mec - 1; m >= 0; m--) { for (p = adev->gfx.mec.num_pipe_per_mec - 1; p >= 0; p--) { irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + (m * adev->gfx.mec.num_pipe_per_mec) + p;