reset: imx8mp-audiomix: Prepare the code for more reset bits

Current code supports EARC PHY Software Reset and EARC Software Reset
but it is not easily extensible to more reset bits.

So, refactor the code in order to easily allow more reset bits in the
future.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20250311085812.1296243-6-daniel.baluta@nxp.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
This commit is contained in:
Daniel Baluta
2025-03-11 10:58:08 +02:00
committed by Mathieu Poirier
parent 9df5c535a2
commit a83bc87cd3

View File

@@ -3,6 +3,8 @@
* Copyright 2024 NXP
*/
#include <dt-bindings/reset/imx8mp-reset-audiomix.h>
#include <linux/auxiliary_bus.h>
#include <linux/device.h>
#include <linux/io.h>
@@ -12,7 +14,24 @@
#include <linux/reset-controller.h>
#define IMX8MP_AUDIOMIX_EARC_RESET_OFFSET 0x200
#define IMX8MP_AUDIOMIX_EARC_RESET_MASK 0x3
#define IMX8MP_AUDIOMIX_EARC_RESET_MASK BIT(1)
#define IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK BIT(2)
struct imx8mp_reset_map {
unsigned int offset;
unsigned int mask;
};
static const struct imx8mp_reset_map reset_map[] = {
[IMX8MP_AUDIOMIX_EARC_RESET] = {
.offset = IMX8MP_AUDIOMIX_EARC_RESET_OFFSET,
.mask = IMX8MP_AUDIOMIX_EARC_RESET_MASK,
},
[IMX8MP_AUDIOMIX_EARC_PHY_RESET] = {
.offset = IMX8MP_AUDIOMIX_EARC_RESET_OFFSET,
.mask = IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK,
},
};
struct imx8mp_audiomix_reset {
struct reset_controller_dev rcdev;
@@ -30,13 +49,15 @@ static int imx8mp_audiomix_reset_assert(struct reset_controller_dev *rcdev,
{
struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
void __iomem *reg_addr = priv->base;
unsigned int mask, reg;
unsigned int mask, offset, reg;
unsigned long flags;
mask = BIT(id);
mask = reset_map[id].mask;
offset = reset_map[id].offset;
spin_lock_irqsave(&priv->lock, flags);
reg = readl(reg_addr + IMX8MP_AUDIOMIX_EARC_RESET_OFFSET);
writel(reg & ~mask, reg_addr + IMX8MP_AUDIOMIX_EARC_RESET_OFFSET);
reg = readl(reg_addr + offset);
writel(reg & ~mask, reg_addr + offset);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
@@ -47,13 +68,15 @@ static int imx8mp_audiomix_reset_deassert(struct reset_controller_dev *rcdev,
{
struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
void __iomem *reg_addr = priv->base;
unsigned int mask, reg;
unsigned int mask, offset, reg;
unsigned long flags;
mask = BIT(id);
mask = reset_map[id].mask;
offset = reset_map[id].offset;
spin_lock_irqsave(&priv->lock, flags);
reg = readl(reg_addr + IMX8MP_AUDIOMIX_EARC_RESET_OFFSET);
writel(reg | mask, reg_addr + IMX8MP_AUDIOMIX_EARC_RESET_OFFSET);
reg = readl(reg_addr + offset);
writel(reg | mask, reg_addr + offset);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
@@ -78,7 +101,7 @@ static int imx8mp_audiomix_reset_probe(struct auxiliary_device *adev,
spin_lock_init(&priv->lock);
priv->rcdev.owner = THIS_MODULE;
priv->rcdev.nr_resets = fls(IMX8MP_AUDIOMIX_EARC_RESET_MASK);
priv->rcdev.nr_resets = ARRAY_SIZE(reset_map);
priv->rcdev.ops = &imx8mp_audiomix_reset_ops;
priv->rcdev.of_node = dev->parent->of_node;
priv->rcdev.dev = dev;