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drm/amd/pm: Deprecate print_clock_levels interface

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Use emit_clock_levels instead of print_clock_levels

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar
2025-11-26 16:08:14 +05:30
committed by Alex Deucher
parent 6186199f32
commit a50d32c41f
4 changed files with 5 additions and 74 deletions
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19
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
View File

@@ -1243,25 +1243,6 @@ int amdgpu_dpm_odn_edit_dpm_table(struct amdgpu_device *adev,
return ret;
}
int amdgpu_dpm_print_clock_levels(struct amdgpu_device *adev,
enum pp_clock_type type,
char *buf)
{
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
int ret = 0;
if (!pp_funcs->print_clock_levels)
return 0;
mutex_lock(&adev->pm.mutex);
ret = pp_funcs->print_clock_levels(adev->powerplay.pp_handle,
type,
buf);
mutex_unlock(&adev->pm.mutex);
return ret;
}
int amdgpu_dpm_emit_clock_levels(struct amdgpu_device *adev,
enum pp_clock_type type,
char *buf,

16
drivers/gpu/drm/amd/pm/amdgpu_pm.c
View File

@@ -863,14 +863,6 @@ static ssize_t amdgpu_get_pp_od_clk_voltage(struct device *dev,
if (ret)
break;
}
if (ret == -ENOENT) {
size = amdgpu_dpm_print_clock_levels(adev, OD_SCLK, buf);
size += amdgpu_dpm_print_clock_levels(adev, OD_MCLK, buf + size);
size += amdgpu_dpm_print_clock_levels(adev, OD_VDDC_CURVE, buf + size);
size += amdgpu_dpm_print_clock_levels(adev, OD_VDDGFX_OFFSET, buf + size);
size += amdgpu_dpm_print_clock_levels(adev, OD_RANGE, buf + size);
size += amdgpu_dpm_print_clock_levels(adev, OD_CCLK, buf + size);
}
if (size == 0)
size = sysfs_emit(buf, "\n");
@@ -999,8 +991,8 @@ static ssize_t amdgpu_get_pp_dpm_clock(struct device *dev,
return ret;
ret = amdgpu_dpm_emit_clock_levels(adev, type, buf, &size);
if (ret == -ENOENT)
size = amdgpu_dpm_print_clock_levels(adev, type, buf);
if (ret)
return ret;
if (size == 0)
size = sysfs_emit(buf, "\n");
@@ -3921,7 +3913,9 @@ static int amdgpu_retrieve_od_settings(struct amdgpu_device *adev,
if (ret)
return ret;
size = amdgpu_dpm_print_clock_levels(adev, od_type, buf);
ret = amdgpu_dpm_emit_clock_levels(adev, od_type, buf, &size);
if (ret)
return ret;
if (size == 0)
size = sysfs_emit(buf, "\n");

16
drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
View File

@@ -724,21 +724,6 @@ static int pp_dpm_emit_clock_levels(void *handle,
return hwmgr->hwmgr_func->emit_clock_levels(hwmgr, type, buf, offset);
}
static int pp_dpm_print_clock_levels(void *handle,
enum pp_clock_type type, char *buf)
{
struct pp_hwmgr *hwmgr = handle;
if (!hwmgr || !hwmgr->pm_en)
return -EINVAL;
if (hwmgr->hwmgr_func->print_clock_levels == NULL) {
pr_info_ratelimited("%s was not implemented.\n", __func__);
return 0;
}
return hwmgr->hwmgr_func->print_clock_levels(hwmgr, type, buf);
}
static int pp_dpm_get_sclk_od(void *handle)
{
struct pp_hwmgr *hwmgr = handle;
@@ -1582,7 +1567,6 @@ static const struct amd_pm_funcs pp_dpm_funcs = {
.set_pp_table = pp_dpm_set_pp_table,
.force_clock_level = pp_dpm_force_clock_level,
.emit_clock_levels = pp_dpm_emit_clock_levels,
.print_clock_levels = pp_dpm_print_clock_levels,
.get_sclk_od = pp_dpm_get_sclk_od,
.set_sclk_od = pp_dpm_set_sclk_od,
.get_mclk_od = pp_dpm_get_mclk_od,

28
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
View File

@@ -3014,19 +3014,6 @@ static int smu_set_power_limit(void *handle, uint32_t limit_type, uint32_t limit
return 0;
}
static int smu_print_smuclk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf)
{
int ret = 0;
if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EOPNOTSUPP;
if (smu->ppt_funcs->print_clk_levels)
ret = smu->ppt_funcs->print_clk_levels(smu, clk_type, buf);
return ret;
}
static enum smu_clk_type smu_convert_to_smuclk(enum pp_clock_type type)
{
enum smu_clk_type clk_type;
@@ -3091,20 +3078,6 @@ static enum smu_clk_type smu_convert_to_smuclk(enum pp_clock_type type)
return clk_type;
}
static int smu_print_ppclk_levels(void *handle,
enum pp_clock_type type,
char *buf)
{
struct smu_context *smu = handle;
enum smu_clk_type clk_type;
clk_type = smu_convert_to_smuclk(type);
if (clk_type == SMU_CLK_COUNT)
return -EINVAL;
return smu_print_smuclk_levels(smu, clk_type, buf);
}
static int smu_emit_ppclk_levels(void *handle, enum pp_clock_type type, char *buf, int *offset)
{
struct smu_context *smu = handle;
@@ -3941,7 +3914,6 @@ static const struct amd_pm_funcs swsmu_pm_funcs = {
.set_fan_speed_pwm = smu_set_fan_speed_pwm,
.get_fan_speed_pwm = smu_get_fan_speed_pwm,
.force_clock_level = smu_force_ppclk_levels,
.print_clock_levels = smu_print_ppclk_levels,
.emit_clock_levels = smu_emit_ppclk_levels,
.force_performance_level = smu_force_performance_level,
.read_sensor = smu_read_sensor,