From a37ff8f985cbc5333b735244ffd586e6e0e47346 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Sun, 20 May 2018 16:48:44 +0300 Subject: [PATCH 01/10] ARM: dts: tegra20: Add Memory Client reset to VDE Hook up Memory Client reset of the Video Decoder to the decoders DT node. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra20.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 983dd5c14794..f9495f12e731 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include #include +#include #include #include @@ -282,7 +283,8 @@ vde@6001a000 { ; /* SXE interrupt */ interrupt-names = "sync-token", "bsev", "sxe"; clocks = <&tegra_car TEGRA20_CLK_VDE>; - resets = <&tegra_car 61>; + reset-names = "vde", "mc"; + resets = <&tegra_car 61>, <&mc TEGRA20_MC_RESET_VDE>; }; apbmisc@70000800 { @@ -593,11 +595,12 @@ pmc@7000e400 { clock-names = "pclk", "clk32k_in"; }; - memory-controller@7000f000 { + mc: memory-controller@7000f000 { compatible = "nvidia,tegra20-mc"; reg = <0x7000f000 0x024 0x7000f03c 0x3c4>; interrupts = ; + #reset-cells = <1>; }; iommu@7000f024 { From d072094b0d4e96a55661f07c0b56077162b38927 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Sun, 20 May 2018 16:48:46 +0300 Subject: [PATCH 02/10] ARM: dts: tegra30: Add Memory Client reset to VDE Hook up Memory Client reset of the Video Decoder to the decoders DT node. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 09087b9c5e26..3300ff976053 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -404,7 +404,8 @@ vde@6001a000 { ; /* SXE interrupt */ interrupt-names = "sync-token", "bsev", "sxe"; clocks = <&tegra_car TEGRA30_CLK_VDE>; - resets = <&tegra_car 61>; + reset-names = "vde", "mc"; + resets = <&tegra_car 61>, <&mc TEGRA30_MC_RESET_VDE>; }; apbmisc@70000800 { @@ -712,6 +713,7 @@ mc: memory-controller@7000f000 { interrupts = ; #iommu-cells = <1>; + #reset-cells = <1>; }; fuse@7000f800 { From 6e1811900b6fe6f2b4665dba6bd6ed32c6b98575 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 3 Jul 2018 09:59:47 +0100 Subject: [PATCH 03/10] ARM: tegra: Fix Tegra30 Cardhu PCA954x reset On all versions of Tegra30 Cardhu, the reset signal to the NXP PCA9546 I2C mux is connected to the Tegra GPIO BB0. Currently, this pin on the Tegra is not configured as a GPIO but as a special-function IO (SFIO) that is multiplexing the pin to an I2S controller. On exiting system suspend, I2C commands sent to the PCA9546 are failing because there is no ACK. Although it is not possible to see exactly what is happening to the reset during suspend, by ensuring it is configured as a GPIO and driven high, to de-assert the reset, the failures are no longer seen. Please note that this GPIO is also used to drive the reset signal going to the camera connector on the board. However, given that there is no camera support currently for Cardhu, this should not have any impact. Fixes: 40431d16ff11 ("ARM: tegra: enable PCA9546 on Cardhu") Cc: stable@vger.kernel.org Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-cardhu.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index 92a9740c533f..3b1db7b9ec50 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -206,6 +206,7 @@ i2cmux@70 { #address-cells = <1>; #size-cells = <0>; reg = <0x70>; + reset-gpio = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>; }; }; From 700253e7b2b293785218faef6a69bc8cb49b6345 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Tue, 3 Jul 2018 17:03:39 +0200 Subject: [PATCH 04/10] ARM: tegra: Fix can2 on Tegra30 Apalis CAN2 currently fails on probe as follows: mcp251x spi1.1: Probe failed, err=19 Fix this by enabling input on pin mux of resp. SPI4 pins. Signed-off-by: Marcel Ziswiler Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index d1d21ec2a844..9ff6aafd72b3 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -118,6 +118,7 @@ gmi_a16_pj7 { nvidia,function = "spi4"; nvidia,pull = ; nvidia,tristate = ; + nvidia,enable-input = ; }; /* CAN_INT2 */ spi2_cs2_n_pw3 { From f48ba1ae6ac5e5df6fd4ebd8e9593296396e0831 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 9 Jul 2018 18:05:16 +0200 Subject: [PATCH 05/10] ARM: tegra: Remove usage of deprecated skeleton.dtsi Remove the usage of skeleton.dtsi because it was deprecated since commit 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"). It also allows later to fix DTC warnings for missing unit name in /memory nodes. Compiled DTBs are the same as before this commit. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Stefan Agner Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra114.dtsi | 8 ++++++-- arch/arm/boot/dts/tegra124.dtsi | 6 ++++-- arch/arm/boot/dts/tegra20.dtsi | 8 ++++++-- arch/arm/boot/dts/tegra30-apalis.dtsi | 4 ++++ arch/arm/boot/dts/tegra30.dtsi | 8 ++++++-- 5 files changed, 26 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 84c4358dacac..d45337f61b92 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -5,11 +5,15 @@ #include #include -#include "skeleton.dtsi" - / { compatible = "nvidia,tegra114"; interrupt-parent = <&lic>; + #address-cells = <1>; + #size-cells = <1>; + + memory { + device_type = "memory"; + }; host1x@50000000 { compatible = "nvidia,tegra114-host1x", "simple-bus"; diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 174092bfac90..951feea784af 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -7,14 +7,16 @@ #include #include -#include "skeleton.dtsi" - / { compatible = "nvidia,tegra124"; interrupt-parent = <&lic>; #address-cells = <2>; #size-cells = <2>; + memory { + device_type = "memory"; + }; + pcie@1003000 { compatible = "nvidia,tegra124-pcie"; device_type = "pci"; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index f9495f12e731..20ea6b1bbe2f 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -5,11 +5,15 @@ #include #include -#include "skeleton.dtsi" - / { compatible = "nvidia,tegra20"; interrupt-parent = <&lic>; + #address-cells = <1>; + #size-cells = <1>; + + memory { + device_type = "memory"; + }; iram@40000000 { compatible = "mmio-sram"; diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index 9ff6aafd72b3..01796dcc5fce 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -10,6 +10,10 @@ / { model = "Toradex Apalis T30"; compatible = "toradex,apalis_t30", "nvidia,tegra30"; + memory { + reg = <0 0>; + }; + pcie@3000 { avdd-pexa-supply = <&vdd2_reg>; vdd-pexa-supply = <&vdd2_reg>; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 3300ff976053..0a3267aebbe3 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -5,11 +5,15 @@ #include #include -#include "skeleton.dtsi" - / { compatible = "nvidia,tegra30"; interrupt-parent = <&lic>; + #address-cells = <1>; + #size-cells = <1>; + + memory { + device_type = "memory"; + }; pcie@3000 { compatible = "nvidia,tegra30-pcie"; From 482997699ef038af7553399d49b7ba74c3301424 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 9 Jul 2018 18:05:17 +0200 Subject: [PATCH 06/10] ARM: tegra: Fix unit_address_vs_reg DTC warnings for /memory Add a generic /memory node in each Tegra DTSI (with empty reg property, to be overidden by each DTS) and set proper unit address for /memory nodes to fix the DTC warnings: arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name The DTB after the change is the same as before except adding unit-address to /memory node. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Stefan Agner Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra114-dalmore.dts | 2 +- arch/arm/boot/dts/tegra114-roth.dts | 2 +- arch/arm/boot/dts/tegra114-tn7.dts | 2 +- arch/arm/boot/dts/tegra114.dtsi | 3 ++- arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +- arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +- arch/arm/boot/dts/tegra124-jetson-tk1.dts | 2 +- arch/arm/boot/dts/tegra124-nyan.dtsi | 2 +- arch/arm/boot/dts/tegra124-venice2.dts | 2 +- arch/arm/boot/dts/tegra124.dtsi | 3 ++- arch/arm/boot/dts/tegra20-colibri-512.dtsi | 2 +- arch/arm/boot/dts/tegra20-harmony.dts | 2 +- arch/arm/boot/dts/tegra20-paz00.dts | 2 +- arch/arm/boot/dts/tegra20-seaboard.dts | 2 +- arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +- arch/arm/boot/dts/tegra20-trimslice.dts | 2 +- arch/arm/boot/dts/tegra20-ventana.dts | 2 +- arch/arm/boot/dts/tegra20.dtsi | 3 ++- arch/arm/boot/dts/tegra30-apalis.dtsi | 4 ++-- arch/arm/boot/dts/tegra30-beaver.dts | 2 +- arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +- arch/arm/boot/dts/tegra30.dtsi | 3 ++- 23 files changed, 28 insertions(+), 24 deletions(-) diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index eafff16765b4..1788556b4977 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -23,7 +23,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@80000000 { reg = <0x80000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts index 7ed7370ee67a..3d3835591cd2 100644 --- a/arch/arm/boot/dts/tegra114-roth.dts +++ b/arch/arm/boot/dts/tegra114-roth.dts @@ -28,7 +28,7 @@ trusted-foundations { }; }; - memory { + memory@80000000 { /* memory >= 0x79600000 is reserved for firmware usage */ reg = <0x80000000 0x79600000>; }; diff --git a/arch/arm/boot/dts/tegra114-tn7.dts b/arch/arm/boot/dts/tegra114-tn7.dts index 7fc4a8b31e45..bfdd1bf61816 100644 --- a/arch/arm/boot/dts/tegra114-tn7.dts +++ b/arch/arm/boot/dts/tegra114-tn7.dts @@ -28,7 +28,7 @@ trusted-foundations { }; }; - memory { + memory@80000000 { /* memory >= 0x37e00000 is reserved for firmware usage */ reg = <0x80000000 0x37e00000>; }; diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index d45337f61b92..0d7a6327e404 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -11,8 +11,9 @@ / { #address-cells = <1>; #size-cells = <1>; - memory { + memory@80000000 { device_type = "memory"; + reg = <0x80000000 0x0>; }; host1x@50000000 { diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi index 3455822350c5..573aaa50fff1 100644 --- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi @@ -15,7 +15,7 @@ / { compatible = "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1", "nvidia,tegra124"; - memory { + memory@80000000 { reg = <0x0 0x80000000 0x0 0x80000000>; }; diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index 9f960c84ba10..0f0d4a4988b9 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -50,7 +50,7 @@ / { model = "Toradex Apalis TK1"; compatible = "toradex,apalis-tk1", "nvidia,tegra124"; - memory { + memory@80000000 { reg = <0x0 0x80000000 0x0 0x80000000>; }; diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index 6dbcf84dafbc..9151b3ebb839 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -24,7 +24,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@80000000 { reg = <0x0 0x80000000 0x0 0x80000000>; }; diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi index 3609367037a6..d5f11d6d987e 100644 --- a/arch/arm/boot/dts/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/tegra124-nyan.dtsi @@ -13,7 +13,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@80000000 { reg = <0x0 0x80000000 0x0 0x80000000>; }; diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index 89bcc178994d..82d139648ef1 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -18,7 +18,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@80000000 { reg = <0x0 0x80000000 0x0 0x80000000>; }; diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 951feea784af..183c5acafb22 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -13,8 +13,9 @@ / { #address-cells = <2>; #size-cells = <2>; - memory { + memory@80000000 { device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x0>; }; pcie@1003000 { diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi index 5c202b3e3bb1..5623ff8d128c 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -10,7 +10,7 @@ aliases { rtc1 = "/rtc@7000e000"; }; - memory { + memory@0 { reg = <0x00000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index 628a55a9318b..1d96d92b72a7 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -18,7 +18,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@0 { reg = <0x00000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 30436969adc0..ef245291924f 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -19,7 +19,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@0 { reg = <0x00000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index 284aae351ff2..f91441683aad 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -18,7 +18,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@0 { reg = <0x00000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index 872046d48709..20137fc578b1 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -15,7 +15,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@0 { reg = <0x00000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index d55c6b240a30..9eb26dc15f6b 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -18,7 +18,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@0 { reg = <0x00000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index ee3fbf941e79..f44551e2d9d0 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -18,7 +18,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@0 { reg = <0x00000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 20ea6b1bbe2f..86d8cd6f9548 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -11,8 +11,9 @@ / { #address-cells = <1>; #size-cells = <1>; - memory { + memory@0 { device_type = "memory"; + reg = <0 0>; }; iram@40000000 { diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index 01796dcc5fce..349c04d18f63 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -10,8 +10,8 @@ / { model = "Toradex Apalis T30"; compatible = "toradex,apalis_t30", "nvidia,tegra30"; - memory { - reg = <0 0>; + memory@80000000 { + reg = <0x80000000 0x40000000>; }; pcie@3000 { diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index ae52a5039506..1434d50438f9 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -17,7 +17,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@80000000 { reg = <0x80000000 0x7ff00000>; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index 3b1db7b9ec50..fb9222b479d2 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -40,7 +40,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - memory { + memory@80000000 { reg = <0x80000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index c44d8c40c410..9bf3327665d3 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -10,7 +10,7 @@ / { model = "Toradex Colibri T30"; compatible = "toradex,colibri_t30", "nvidia,tegra30"; - memory { + memory@80000000 { reg = <0x80000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 0a3267aebbe3..a6781f653310 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -11,8 +11,9 @@ / { #address-cells = <1>; #size-cells = <1>; - memory { + memory@80000000 { device_type = "memory"; + reg = <0x80000000 0x0>; }; pcie@3000 { From 35a21229f8e0b461b1db7ab96a4ef390b42b13d2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 9 Jul 2018 18:05:18 +0200 Subject: [PATCH 07/10] ARM: tegra: Fix unit_address_vs_reg and avoid_unnecessary_addr_size DTC warnings Remove unneeded address/size cells properties and unit addresses to fix DTC warnings like: arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning (unit_address_vs_reg): /i2c@7000d000/stmpe811@41/stmpe_touchscreen@0: node has a unit name, but no reg property arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning (avoid_unnecessary_addr_size): /i2c@7000d000/stmpe811@41: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Krzysztof Kozlowski Reviewed-by: Stefan Agner Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis.dtsi | 4 +--- arch/arm/boot/dts/tegra30-beaver.dts | 3 --- arch/arm/boot/dts/tegra30-colibri.dtsi | 2 -- 3 files changed, 1 insertion(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index 349c04d18f63..2f807d40c1b7 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -590,8 +590,6 @@ ldo8_reg: ldo8 { /* STMPE811 touch screen controller */ stmpe811@41 { compatible = "st,stmpe811"; - #address-cells = <1>; - #size-cells = <0>; reg = <0x41>; interrupts = ; interrupt-parent = <&gpio>; @@ -600,7 +598,7 @@ stmpe811@41 { blocks = <0x5>; irq-trigger = <0x1>; - stmpe_touchscreen@0 { + stmpe_touchscreen { compatible = "st,stmpe-ts"; /* 3.25 MHz ADC clock speed */ st,adc-freq = <1>; diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index 1434d50438f9..b0d40ac8ac6e 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -1790,9 +1790,6 @@ pmic: tps65911@2d { vccio-supply = <&vdd_5v_in_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - vdd1_reg: vdd1 { regulator-name = "vddio_ddr_1v2"; regulator-min-microvolt = <1200000>; diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 9bf3327665d3..526ed71cf7a3 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -351,8 +351,6 @@ ldo8_reg: ldo8 { /* STMPE811 touch screen controller */ stmpe811@41 { compatible = "st,stmpe811"; - #address-cells = <1>; - #size-cells = <0>; reg = <0x41>; interrupts = ; interrupt-parent = <&gpio>; From 8ab11f8068ef57e5763e1cc91b3dfe23a2482e68 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 9 Jul 2018 18:05:19 +0200 Subject: [PATCH 08/10] ARM: tegra: Work safely with 256 MB Colibri-T20 modules Colibri-T20 can come in 256 MB RAM (with 512 MB NAND) or 512 MB RAM (with 1024 MB NAND) flavors. Both of them will use the same DTSI expecting the bootloader to do the fixup of /memory node. However in case it does not happen, let's stay on safe side by limiting the memory to 256 MB for both versions of Colibri-T20. Rename to remove the unnecessary memory size from the device tree file name. While at it, also follow the typical Toradex SoC, module, carrier board hierarchy. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Stefan Agner Tested-by: Stefan Agner Signed-off-by: Thierry Reding --- arch/arm/boot/dts/Makefile | 2 +- .../{tegra20-iris-512.dts => tegra20-colibri-iris.dts} | 4 ++-- .../{tegra20-colibri-512.dtsi => tegra20-colibri.dtsi} | 9 +++++++-- 3 files changed, 10 insertions(+), 5 deletions(-) rename arch/arm/boot/dts/{tegra20-iris-512.dts => tegra20-colibri-iris.dts} (95%) rename arch/arm/boot/dts/{tegra20-colibri-512.dtsi => tegra20-colibri.dtsi} (98%) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 37a3de760d40..5daf9ef53cd2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1039,7 +1039,7 @@ dtb-$(CONFIG_ARCH_TANGO) += \ tango4-vantage-1172.dtb dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ tegra20-harmony.dtb \ - tegra20-iris-512.dtb \ + tegra20-colibri-iris.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ tegra20-plutux.dtb \ diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts similarity index 95% rename from arch/arm/boot/dts/tegra20-iris-512.dts rename to arch/arm/boot/dts/tegra20-colibri-iris.dts index 40126388946d..57f16c0e9917 100644 --- a/arch/arm/boot/dts/tegra20-iris-512.dts +++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; -#include "tegra20-colibri-512.dtsi" +#include "tegra20-colibri.dtsi" / { - model = "Toradex Colibri T20 512MB on Iris"; + model = "Toradex Colibri T20 256/512 MB on Iris"; compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20"; aliases { diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi similarity index 98% rename from arch/arm/boot/dts/tegra20-colibri-512.dtsi rename to arch/arm/boot/dts/tegra20-colibri.dtsi index 5623ff8d128c..dc06b23183e1 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri.dtsi @@ -2,7 +2,7 @@ #include "tegra20.dtsi" / { - model = "Toradex Colibri T20 512MB"; + model = "Toradex Colibri T20 256/512 MB"; compatible = "toradex,colibri_t20-512", "nvidia,tegra20"; aliases { @@ -11,7 +11,12 @@ aliases { }; memory@0 { - reg = <0x00000000 0x20000000>; + /* + * Set memory to 256 MB to be safe as this could be used on + * 256 or 512 MB module. It is expected from bootloader + * to fix this up for 512 MB version. + */ + reg = <0x00000000 0x10000000>; }; host1x@50000000 { From 6c468f109884c2cd8d8bc042945fdd861f375523 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Sun, 24 Jun 2018 23:27:26 +0200 Subject: [PATCH 09/10] ARM: dts: tegra: add Tegra20 NAND flash controller node Add basic controller device tree node to be extended by individual boards. Use the assigned-clocks mechanism to set NDFLASH clock to a sensible default rate of 150MHz. Signed-off-by: Lucas Stach Signed-off-by: Stefan Agner Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra20.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 86d8cd6f9548..15b73bd377f0 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -432,6 +432,21 @@ gmi@70009000 { status = "disabled"; }; + nand-controller@70008000 { + compatible = "nvidia,tegra20-nand"; + reg = <0x70008000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&tegra_car TEGRA20_CLK_NDFLASH>; + clock-names = "nand"; + resets = <&tegra_car 13>; + reset-names = "nand"; + assigned-clocks = <&tegra_car TEGRA20_CLK_NDFLASH>; + assigned-clock-rates = <150000000>; + status = "disabled"; + }; + pwm: pwm@7000a000 { compatible = "nvidia,tegra20-pwm"; reg = <0x7000a000 0x100>; From 5def854e370ff5c52172fb185932fdbffbf15692 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Sun, 24 Jun 2018 23:27:27 +0200 Subject: [PATCH 10/10] ARM: dts: tegra: enable NAND flash on Colibri T20 This enables the on-module ONFI conformant NAND flash. Signed-off-by: Lucas Stach Signed-off-by: Stefan Agner Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra20-colibri.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi index dc06b23183e1..e7b9ab09908a 100644 --- a/arch/arm/boot/dts/tegra20-colibri.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri.dtsi @@ -218,6 +218,22 @@ ac97: ac97@70002000 { GPIO_ACTIVE_HIGH>; }; + nand-controller@70008000 { + status = "okay"; + + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + nand-bus-width = <8>; + nand-on-flash-bbt; + nand-ecc-algo = "bch"; + nand-is-boot-medium; + nand-ecc-maximize; + wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; + }; + }; + /* * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier * board)