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drm/amdgpu: enable GFX-V11 userqueue support
This patch enables GFX-v11 IP support in the usermode queue base
code. It typically:
- adds a GFX_v11 specific MQD structure
- sets IP functions to create and destroy MQDs
- sets MQD objects coming from userspace
V10: introduced this spearate patch for GFX V11 enabling (Alex).
V11: Addressed review comments:
- update the comments in GFX mqd structure informing user about using
the INFO IOCTL for object sizes (Alex)
- rename struct drm_amdgpu_userq_mqd_gfx_v11 to
drm_amdgpu_userq_mqd_gfx11 (Marek)
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
d84607e3f7
commit
a1d201e169
@@ -409,6 +409,25 @@ union drm_amdgpu_userq {
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struct drm_amdgpu_userq_out out;
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};
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/* GFX V11 IP specific MQD parameters */
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struct drm_amdgpu_userq_mqd_gfx11 {
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/**
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* @shadow_va: Virtual address of the GPU memory to hold the shadow buffer.
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* Use AMDGPU_INFO_IOCTL to find the exact size of the object.
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*/
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__u64 shadow_va;
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/**
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* @gds_va: Virtual address of the GPU memory to hold the GDS buffer.
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* Use AMDGPU_INFO_IOCTL to find the exact size of the object.
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*/
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__u64 gds_va;
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/**
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* @csa_va: Virtual address of the GPU memory to hold the CSA buffer.
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* Use AMDGPU_INFO_IOCTL to find the exact size of the object.
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*/
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__u64 csa_va;
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};
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/* vm ioctl */
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#define AMDGPU_VM_OP_RESERVE_VMID 1
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#define AMDGPU_VM_OP_UNRESERVE_VMID 2
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