From 95b0ddfd21ed516b8af3375948e0c1e6f409894b Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Thu, 6 Sep 2018 15:26:39 +0530 Subject: [PATCH 1/9] arm64: dts: msm8916: thermal: split address space into two We've earlier added support to split the register address space into TM and SROT regions. Split up the regmap address space into two for msm8916 that has a similar register layout. Since tsens-common.c/init_common() currently only registers one address space, the order is important (TM before SROT). This is OK since the code doesn't really use the SROT functionality yet. Signed-off-by: Amit Kucheria Reviewed-by: Matthias Kaehlcke Acked-by: Andy Gross Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index d302d8d639a1..1bf19a24ffa7 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -758,9 +758,10 @@ tsens_calsel: calsel@ec { }; }; - tsens: thermal-sensor@4a8000 { + tsens: thermal-sensor@4a9000 { compatible = "qcom,msm8916-tsens"; - reg = <0x4a8000 0x2000>; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; nvmem-cell-names = "calib", "calib_sel"; #thermal-sensor-cells = <1>; From 2b4e5fc0edfe071c7ac625038d38dd7682fe7c5f Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Thu, 6 Sep 2018 15:44:34 +0530 Subject: [PATCH 2/9] arm64: dts: msm8916: thermal: Add "qcom,sensors" property This new property allows the number of sensors to be configured from DT instead of being hardcoded in platform data. Use it. Signed-off-by: Amit Kucheria Reviewed-by: Bjorn Andersson Acked-by: Andy Gross Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 1bf19a24ffa7..2288826de3cd 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -764,6 +764,7 @@ tsens: thermal-sensor@4a9000 { <0x4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; nvmem-cell-names = "calib", "calib_sel"; + #qcom,sensors = <5>; #thermal-sensor-cells = <1>; }; From 154233c8988a1549d6f7fc41197c73d8bb4a4670 Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Mon, 10 Sep 2018 12:39:53 +0530 Subject: [PATCH 3/9] arm64: dts: msm8916: Add gpu thermal zone Initialise the gpu thermal zone to export temperature to userspace. Signed-off-by: Amit Kucheria Acked-by: Andy Gross Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 2288826de3cd..392223e68b00 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -234,6 +234,26 @@ map0 { }; }; + gpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 2>; + + trips { + gpu_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + gpu_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; cpu_opp_table: cpu_opp_table { From 9ee80560a32932873548bb867a46970cdfd1ca40 Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Mon, 20 Aug 2018 15:36:26 +0530 Subject: [PATCH 4/9] arm64: dts: msm8916: Add camera thermal zone Initialise the camera thermal zone to export temperature to userspace. Signed-off-by: Amit Kucheria Acked-by: Andy Gross Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 392223e68b00..42e72a3164b9 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -254,6 +254,27 @@ gpu_crit: trip1 { }; }; + camera-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 1>; + + trips { + cam_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cam_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + }; + }; cpu_opp_table: cpu_opp_table { From 4884788b7ba1a2136f8eff5396d33246af7e55f2 Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Tue, 12 Jun 2018 15:26:54 +0300 Subject: [PATCH 5/9] arm64: dts: sdm845: enable tsens thermal zones One thermal zone per cpu is defined Signed-off-by: Amit Kucheria Reviewed-by: Matthias Kaehlcke Tested-by: Matthias Kaehlcke Acked-by: Andy Gross Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 170 +++++++++++++++++++++++++++ 1 file changed, 170 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index b72bdb0a31a5..98d054043266 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1404,4 +1404,174 @@ frame@17d10000 { }; }; }; + + thermal-zones { + cpu0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 1>; + + trips { + cpu_alert0: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit0: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu1-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 2>; + + trips { + cpu_alert1: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit1: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu2-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 3>; + + trips { + cpu_alert2: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit2: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu3-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 4>; + + trips { + cpu_alert3: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit3: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu4-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 7>; + + trips { + cpu_alert4: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit4: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu5-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 8>; + + trips { + cpu_alert5: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit5: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu6-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 9>; + + trips { + cpu_alert6: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit6: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu7-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 10>; + + trips { + cpu_alert7: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit7: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; }; From b59b94f76e7fa257e92d8e8b0c79755493356861 Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Mon, 12 Nov 2018 14:11:25 -0800 Subject: [PATCH 6/9] dt-bindings: iio: vadc: Add unit address to ADC channel node in example The node has a reg property, therefore its name should include a unit address. Also change the name from 'usb_id_nopull' to 'adc-chan', which is the preferred name for ADC channel nodes. Include headers for constants used in the example. Signed-off-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson Signed-off-by: Andy Gross --- .../devicetree/bindings/iio/adc/qcom,spmi-vadc.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt index b3c86f4ac7cd..c81993f8d8c3 100644 --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt +++ b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt @@ -140,6 +140,10 @@ VADC_GND_REF and VADC_VDD_VADC. Example: +#include +#include +/* ... */ + /* VADC node */ pmic_vadc: vadc@3100 { compatible = "qcom,spmi-vadc"; @@ -151,7 +155,7 @@ Example: io-channel-ranges; /* Channel node */ - usb_id_nopull { + adc-chan@VADC_LR_MUX10_USB_ID { reg = ; qcom,decimation = <512>; qcom,ratiometric; From a789fd0bab57d5883e441a09596e1a77f698e62c Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Mon, 12 Nov 2018 14:11:26 -0800 Subject: [PATCH 7/9] arm64: dts: qcom: pm8998: Add die temperature channel node to the ADC Add a channel node for the die temperature to the ADC. Signed-off-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/pm8998.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm8998.dtsi b/arch/arm64/boot/dts/qcom/pm8998.dtsi index 048f19fa0150..f1025a50c227 100644 --- a/arch/arm64/boot/dts/qcom/pm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8998.dtsi @@ -75,6 +75,11 @@ pm8998_adc: adc@3100 { #address-cells = <1>; #size-cells = <0>; #io-channel-cells = <1>; + + adc-chan@ADC5_DIE_TEMP { + reg = ; + label = "die_temp"; + }; }; rtc@6000 { From 6e382cc7ba2931d3e2683787a2d9279e4c31c4df Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Mon, 1 Oct 2018 11:51:50 +0530 Subject: [PATCH 8/9] arm64: dts: msm8996: add prng-ee node RNG hardware in 8996 features (Execution Environment) EE for HLOS to use, add the node for prng-ee for msm8996. Signed-off-by: Vinod Koul Reviewed-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index b29fe80d7288..13bb96444df0 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -370,6 +370,13 @@ rpm_msg_ram: memory@68000 { reg = <0x68000 0x6000>; }; + rng: rng@83000 { + compatible = "qcom,prng-ee"; + reg = <0x00083000 0x1000>; + clocks = <&gcc GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; + tcsr_mutex_regs: syscon@740000 { compatible = "syscon"; reg = <0x740000 0x20000>; From 6e17f8140521a73844721af8a2ff03ad00519ab8 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Mon, 1 Oct 2018 11:51:51 +0530 Subject: [PATCH 9/9] arm64: dts: sdm845: add prng-ee node RNG hardware in SDM845 features (Execution Environment) EE for HLOS to use, add the node for prng-ee for sdm845. Signed-off-by: Vinod Koul Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 98d054043266..1419b0098cb3 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -12,6 +12,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -357,6 +358,13 @@ qusb2s_hstx_trim: hstx-trim-secondary@1eb { }; }; + rng: rng@793000 { + compatible = "qcom,prng-ee"; + reg = <0x00793000 0x1000>; + clocks = <&gcc GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; + qupv3_id_0: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0x8c0000 0x6000>;