diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
index 267a5307041c..58fc1d799371 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
@@ -15,6 +15,8 @@
 
 #include <video/mipi_display.h>
 
+struct ili9882t;
+
 /*
  * Use this descriptor struct to describe different panels using the
  * Ilitek ILI9882T display controller.
@@ -34,7 +36,7 @@ struct panel_desc {
 
 	unsigned long mode_flags;
 	enum mipi_dsi_pixel_format format;
-	const struct panel_init_cmd *init_cmds;
+	int (*init)(struct ili9882t *boe);
 	unsigned int lanes;
 };
 
@@ -52,371 +54,367 @@ struct ili9882t {
 	struct gpio_desc *enable_gpio;
 };
 
-enum dsi_cmd_type {
-	INIT_DCS_CMD,
-	DELAY_CMD,
-};
-
-struct panel_init_cmd {
-	enum dsi_cmd_type type;
-	size_t len;
-	const char *data;
-};
-
-#define _INIT_DCS_CMD(...) { \
-	.type = INIT_DCS_CMD, \
-	.len = sizeof((char[]){__VA_ARGS__}), \
-	.data = (char[]){__VA_ARGS__} }
-
-#define _INIT_DELAY_CMD(...) { \
-	.type = DELAY_CMD,\
-	.len = sizeof((char[]){__VA_ARGS__}), \
-	.data = (char[]){__VA_ARGS__} }
-
 /* ILI9882-specific commands, add new commands as you decode them */
 #define ILI9882T_DCS_SWITCH_PAGE	0xFF
 
-#define _INIT_SWITCH_PAGE_CMD(page) \
-	_INIT_DCS_CMD(ILI9882T_DCS_SWITCH_PAGE, 0x98, 0x82, (page))
+#define ili9882t_switch_page(ctx, page) \
+	mipi_dsi_dcs_write_seq_multi(ctx, ILI9882T_DCS_SWITCH_PAGE, \
+				     0x98, 0x82, (page))
 
-static const struct panel_init_cmd starry_ili9882t_init_cmd[] = {
-	_INIT_DELAY_CMD(5),
-	_INIT_SWITCH_PAGE_CMD(0x01),
-	_INIT_DCS_CMD(0x00, 0x42),
-	_INIT_DCS_CMD(0x01, 0x11),
-	_INIT_DCS_CMD(0x02, 0x00),
-	_INIT_DCS_CMD(0x03, 0x00),
+static int starry_ili9882t_init(struct ili9882t *ili)
+{
+	struct mipi_dsi_multi_context ctx = { .dsi = ili->dsi };
 
-	_INIT_DCS_CMD(0x04, 0x01),
-	_INIT_DCS_CMD(0x05, 0x11),
-	_INIT_DCS_CMD(0x06, 0x00),
-	_INIT_DCS_CMD(0x07, 0x00),
+	usleep_range(5000, 5100);
 
-	_INIT_DCS_CMD(0x08, 0x80),
-	_INIT_DCS_CMD(0x09, 0x81),
-	_INIT_DCS_CMD(0x0A, 0x71),
-	_INIT_DCS_CMD(0x0B, 0x00),
+	ili9882t_switch_page(&ctx, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x42);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x11);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x00);
 
-	_INIT_DCS_CMD(0x0C, 0x00),
-	_INIT_DCS_CMD(0x0E, 0x1A),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x11);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x00);
 
-	_INIT_DCS_CMD(0x24, 0x00),
-	_INIT_DCS_CMD(0x25, 0x00),
-	_INIT_DCS_CMD(0x26, 0x00),
-	_INIT_DCS_CMD(0x27, 0x00),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x81);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x71);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0b, 0x00);
 
-	_INIT_DCS_CMD(0x2C, 0xD4),
-	_INIT_DCS_CMD(0xB9, 0x40),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x1a);
 
-	_INIT_DCS_CMD(0xB0, 0x11),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x24, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x00);
 
-	_INIT_DCS_CMD(0xE6, 0x32),
-	_INIT_DCS_CMD(0xD1, 0x30),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2c, 0xd4);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x40);
 
-	_INIT_DCS_CMD(0xD6, 0x55),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x11);
 
-	_INIT_DCS_CMD(0xD0, 0x01),
-	_INIT_DCS_CMD(0xE3, 0x93),
-	_INIT_DCS_CMD(0xE4, 0x00),
-	_INIT_DCS_CMD(0xE5, 0x80),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x32);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd1, 0x30);
 
-	_INIT_DCS_CMD(0x31, 0x07),
-	_INIT_DCS_CMD(0x32, 0x07),
-	_INIT_DCS_CMD(0x33, 0x07),
-	_INIT_DCS_CMD(0x34, 0x07),
-	_INIT_DCS_CMD(0x35, 0x07),
-	_INIT_DCS_CMD(0x36, 0x01),
-	_INIT_DCS_CMD(0x37, 0x00),
-	_INIT_DCS_CMD(0x38, 0x28),
-	_INIT_DCS_CMD(0x39, 0x29),
-	_INIT_DCS_CMD(0x3A, 0x11),
-	_INIT_DCS_CMD(0x3B, 0x13),
-	_INIT_DCS_CMD(0x3C, 0x15),
-	_INIT_DCS_CMD(0x3D, 0x17),
-	_INIT_DCS_CMD(0x3E, 0x09),
-	_INIT_DCS_CMD(0x3F, 0x0D),
-	_INIT_DCS_CMD(0x40, 0x02),
-	_INIT_DCS_CMD(0x41, 0x02),
-	_INIT_DCS_CMD(0x42, 0x02),
-	_INIT_DCS_CMD(0x43, 0x02),
-	_INIT_DCS_CMD(0x44, 0x02),
-	_INIT_DCS_CMD(0x45, 0x02),
-	_INIT_DCS_CMD(0x46, 0x02),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x55);
 
-	_INIT_DCS_CMD(0x47, 0x07),
-	_INIT_DCS_CMD(0x48, 0x07),
-	_INIT_DCS_CMD(0x49, 0x07),
-	_INIT_DCS_CMD(0x4A, 0x07),
-	_INIT_DCS_CMD(0x4B, 0x07),
-	_INIT_DCS_CMD(0x4C, 0x01),
-	_INIT_DCS_CMD(0x4D, 0x00),
-	_INIT_DCS_CMD(0x4E, 0x28),
-	_INIT_DCS_CMD(0x4F, 0x29),
-	_INIT_DCS_CMD(0x50, 0x10),
-	_INIT_DCS_CMD(0x51, 0x12),
-	_INIT_DCS_CMD(0x52, 0x14),
-	_INIT_DCS_CMD(0x53, 0x16),
-	_INIT_DCS_CMD(0x54, 0x08),
-	_INIT_DCS_CMD(0x55, 0x0C),
-	_INIT_DCS_CMD(0x56, 0x02),
-	_INIT_DCS_CMD(0x57, 0x02),
-	_INIT_DCS_CMD(0x58, 0x02),
-	_INIT_DCS_CMD(0x59, 0x02),
-	_INIT_DCS_CMD(0x5A, 0x02),
-	_INIT_DCS_CMD(0x5B, 0x02),
-	_INIT_DCS_CMD(0x5C, 0x02),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd0, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe3, 0x93);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe4, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x80);
 
-	_INIT_DCS_CMD(0x61, 0x07),
-	_INIT_DCS_CMD(0x62, 0x07),
-	_INIT_DCS_CMD(0x63, 0x07),
-	_INIT_DCS_CMD(0x64, 0x07),
-	_INIT_DCS_CMD(0x65, 0x07),
-	_INIT_DCS_CMD(0x66, 0x01),
-	_INIT_DCS_CMD(0x67, 0x00),
-	_INIT_DCS_CMD(0x68, 0x28),
-	_INIT_DCS_CMD(0x69, 0x29),
-	_INIT_DCS_CMD(0x6A, 0x16),
-	_INIT_DCS_CMD(0x6B, 0x14),
-	_INIT_DCS_CMD(0x6C, 0x12),
-	_INIT_DCS_CMD(0x6D, 0x10),
-	_INIT_DCS_CMD(0x6E, 0x0C),
-	_INIT_DCS_CMD(0x6F, 0x08),
-	_INIT_DCS_CMD(0x70, 0x02),
-	_INIT_DCS_CMD(0x71, 0x02),
-	_INIT_DCS_CMD(0x72, 0x02),
-	_INIT_DCS_CMD(0x73, 0x02),
-	_INIT_DCS_CMD(0x74, 0x02),
-	_INIT_DCS_CMD(0x75, 0x02),
-	_INIT_DCS_CMD(0x76, 0x02),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x37, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0x28);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x29);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x11);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x13);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3c, 0x15);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3d, 0x17);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3e, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3f, 0x0d);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x40, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x41, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x42, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x43, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x44, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x45, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x46, 0x02);
 
-	_INIT_DCS_CMD(0x77, 0x07),
-	_INIT_DCS_CMD(0x78, 0x07),
-	_INIT_DCS_CMD(0x79, 0x07),
-	_INIT_DCS_CMD(0x7A, 0x07),
-	_INIT_DCS_CMD(0x7B, 0x07),
-	_INIT_DCS_CMD(0x7C, 0x01),
-	_INIT_DCS_CMD(0x7D, 0x00),
-	_INIT_DCS_CMD(0x7E, 0x28),
-	_INIT_DCS_CMD(0x7F, 0x29),
-	_INIT_DCS_CMD(0x80, 0x17),
-	_INIT_DCS_CMD(0x81, 0x15),
-	_INIT_DCS_CMD(0x82, 0x13),
-	_INIT_DCS_CMD(0x83, 0x11),
-	_INIT_DCS_CMD(0x84, 0x0D),
-	_INIT_DCS_CMD(0x85, 0x09),
-	_INIT_DCS_CMD(0x86, 0x02),
-	_INIT_DCS_CMD(0x87, 0x07),
-	_INIT_DCS_CMD(0x88, 0x07),
-	_INIT_DCS_CMD(0x89, 0x07),
-	_INIT_DCS_CMD(0x8A, 0x07),
-	_INIT_DCS_CMD(0x8B, 0x07),
-	_INIT_DCS_CMD(0x8C, 0x07),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x47, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x48, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x49, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4a, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4b, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4c, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4d, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4e, 0x28);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4f, 0x29);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x50, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x51, 0x12);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x52, 0x14);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x16);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x54, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x56, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x57, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x58, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x59, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5a, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5b, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5c, 0x02);
 
-	_INIT_SWITCH_PAGE_CMD(0x02),
-	_INIT_DCS_CMD(0x29, 0x3A),
-	_INIT_DCS_CMD(0x2A, 0x3B),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x63, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x64, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x65, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x66, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x67, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x68, 0x28);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x29);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6a, 0x16);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6b, 0x14);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6c, 0x12);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6e, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6f, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x70, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x71, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x72, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x73, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x74, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x75, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x76, 0x02);
 
-	_INIT_DCS_CMD(0x06, 0x01),
-	_INIT_DCS_CMD(0x07, 0x01),
-	_INIT_DCS_CMD(0x08, 0x0C),
-	_INIT_DCS_CMD(0x09, 0x44),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x77, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x78, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7a, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7b, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7c, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7d, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x28);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0x29);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x17);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0x15);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x82, 0x13);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x83, 0x11);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x0d);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x85, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x88, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x89, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x8a, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x8b, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x8c, 0x07);
 
-	_INIT_DCS_CMD(0x3C, 0x0A),
-	_INIT_DCS_CMD(0x39, 0x11),
-	_INIT_DCS_CMD(0x3D, 0x00),
-	_INIT_DCS_CMD(0x3A, 0x0C),
-	_INIT_DCS_CMD(0x3B, 0x44),
+	ili9882t_switch_page(&ctx, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x3a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x3b);
 
-	_INIT_DCS_CMD(0x53, 0x1F),
-	_INIT_DCS_CMD(0x5E, 0x40),
-	_INIT_DCS_CMD(0x84, 0x00),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x44);
 
-	_INIT_SWITCH_PAGE_CMD(0x03),
-	_INIT_DCS_CMD(0x20, 0x01),
-	_INIT_DCS_CMD(0x21, 0x3C),
-	_INIT_DCS_CMD(0x22, 0xFA),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3c, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x11);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3d, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x44);
 
-	_INIT_SWITCH_PAGE_CMD(0x0A),
-	_INIT_DCS_CMD(0xE0, 0x01),
-	_INIT_DCS_CMD(0xE2, 0x01),
-	_INIT_DCS_CMD(0xE5, 0x91),
-	_INIT_DCS_CMD(0xE6, 0x3C),
-	_INIT_DCS_CMD(0xE7, 0x00),
-	_INIT_DCS_CMD(0xE8, 0xFA),
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x1f);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5e, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x00);
 
-	_INIT_SWITCH_PAGE_CMD(0x12),
-	_INIT_DCS_CMD(0x87, 0x2C),
+	ili9882t_switch_page(&ctx, 0x03);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x3c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0xfa);
 
-	_INIT_SWITCH_PAGE_CMD(0x05),
-	_INIT_DCS_CMD(0x73, 0xE5),
-	_INIT_DCS_CMD(0x7F, 0x6B),
-	_INIT_DCS_CMD(0x6D, 0xA4),
-	_INIT_DCS_CMD(0x79, 0x54),
-	_INIT_DCS_CMD(0x69, 0x97),
-	_INIT_DCS_CMD(0x6A, 0x97),
-	_INIT_DCS_CMD(0xA5, 0x3F),
-	_INIT_DCS_CMD(0x61, 0xDA),
-	_INIT_DCS_CMD(0xA7, 0xF1),
-	_INIT_DCS_CMD(0x5F, 0x01),
-	_INIT_DCS_CMD(0x62, 0x3F),
-	_INIT_DCS_CMD(0x1D, 0x90),
-	_INIT_DCS_CMD(0x86, 0x87),
+	ili9882t_switch_page(&ctx, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x91);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x3c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe7, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe8, 0xfa);
 
-	_INIT_SWITCH_PAGE_CMD(0x06),
-	_INIT_DCS_CMD(0xC0, 0x80),
-	_INIT_DCS_CMD(0xC1, 0x07),
-	_INIT_DCS_CMD(0xCA, 0x58),
-	_INIT_DCS_CMD(0xCB, 0x02),
-	_INIT_DCS_CMD(0xCE, 0x58),
-	_INIT_DCS_CMD(0xCF, 0x02),
-	_INIT_DCS_CMD(0x67, 0x60),
-	_INIT_DCS_CMD(0x10, 0x00),
-	_INIT_DCS_CMD(0x92, 0x22),
-	_INIT_DCS_CMD(0xD3, 0x08),
-	_INIT_DCS_CMD(0xD6, 0x55),
-	_INIT_DCS_CMD(0xDC, 0x38),
+	ili9882t_switch_page(&ctx, 0x12);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x2c);
 
-	_INIT_SWITCH_PAGE_CMD(0x08),
-	_INIT_DCS_CMD(0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
-	_INIT_DCS_CMD(0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
+	ili9882t_switch_page(&ctx, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x73, 0xe5);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0x6b);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0xa4);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0x54);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x97);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6a, 0x97);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa5, 0x3f);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0xda);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa7, 0xf1);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5f, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x3f);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x90);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x87);
 
-	_INIT_SWITCH_PAGE_CMD(0x04),
-	_INIT_DCS_CMD(0xBA, 0x81),
+	ili9882t_switch_page(&ctx, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x58);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0x58);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcf, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x67, 0x60);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x10, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x22);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd3, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x55);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0x38);
 
-	_INIT_SWITCH_PAGE_CMD(0x0C),
-	_INIT_DCS_CMD(0x00, 0x02),
-	_INIT_DCS_CMD(0x01, 0x00),
-	_INIT_DCS_CMD(0x02, 0x03),
-	_INIT_DCS_CMD(0x03, 0x01),
-	_INIT_DCS_CMD(0x04, 0x03),
-	_INIT_DCS_CMD(0x05, 0x02),
-	_INIT_DCS_CMD(0x06, 0x04),
-	_INIT_DCS_CMD(0x07, 0x03),
-	_INIT_DCS_CMD(0x08, 0x03),
-	_INIT_DCS_CMD(0x09, 0x04),
-	_INIT_DCS_CMD(0x0A, 0x04),
-	_INIT_DCS_CMD(0x0B, 0x05),
-	_INIT_DCS_CMD(0x0C, 0x04),
-	_INIT_DCS_CMD(0x0D, 0x06),
-	_INIT_DCS_CMD(0x0E, 0x05),
-	_INIT_DCS_CMD(0x0F, 0x07),
-	_INIT_DCS_CMD(0x10, 0x04),
-	_INIT_DCS_CMD(0x11, 0x08),
-	_INIT_DCS_CMD(0x12, 0x05),
-	_INIT_DCS_CMD(0x13, 0x09),
-	_INIT_DCS_CMD(0x14, 0x05),
-	_INIT_DCS_CMD(0x15, 0x0A),
-	_INIT_DCS_CMD(0x16, 0x06),
-	_INIT_DCS_CMD(0x17, 0x0B),
-	_INIT_DCS_CMD(0x18, 0x05),
-	_INIT_DCS_CMD(0x19, 0x0C),
-	_INIT_DCS_CMD(0x1A, 0x06),
-	_INIT_DCS_CMD(0x1B, 0x0D),
-	_INIT_DCS_CMD(0x1C, 0x06),
-	_INIT_DCS_CMD(0x1D, 0x0E),
-	_INIT_DCS_CMD(0x1E, 0x07),
-	_INIT_DCS_CMD(0x1F, 0x0F),
-	_INIT_DCS_CMD(0x20, 0x06),
-	_INIT_DCS_CMD(0x21, 0x10),
-	_INIT_DCS_CMD(0x22, 0x07),
-	_INIT_DCS_CMD(0x23, 0x11),
-	_INIT_DCS_CMD(0x24, 0x07),
-	_INIT_DCS_CMD(0x25, 0x12),
-	_INIT_DCS_CMD(0x26, 0x08),
-	_INIT_DCS_CMD(0x27, 0x13),
-	_INIT_DCS_CMD(0x28, 0x07),
-	_INIT_DCS_CMD(0x29, 0x14),
-	_INIT_DCS_CMD(0x2A, 0x08),
-	_INIT_DCS_CMD(0x2B, 0x15),
-	_INIT_DCS_CMD(0x2C, 0x08),
-	_INIT_DCS_CMD(0x2D, 0x16),
-	_INIT_DCS_CMD(0x2E, 0x09),
-	_INIT_DCS_CMD(0x2F, 0x17),
-	_INIT_DCS_CMD(0x30, 0x08),
-	_INIT_DCS_CMD(0x31, 0x18),
-	_INIT_DCS_CMD(0x32, 0x09),
-	_INIT_DCS_CMD(0x33, 0x19),
-	_INIT_DCS_CMD(0x34, 0x09),
-	_INIT_DCS_CMD(0x35, 0x1A),
-	_INIT_DCS_CMD(0x36, 0x0A),
-	_INIT_DCS_CMD(0x37, 0x1B),
-	_INIT_DCS_CMD(0x38, 0x0A),
-	_INIT_DCS_CMD(0x39, 0x1C),
-	_INIT_DCS_CMD(0x3A, 0x0A),
-	_INIT_DCS_CMD(0x3B, 0x1D),
-	_INIT_DCS_CMD(0x3C, 0x0A),
-	_INIT_DCS_CMD(0x3D, 0x1E),
-	_INIT_DCS_CMD(0x3E, 0x0A),
-	_INIT_DCS_CMD(0x3F, 0x1F),
+	ili9882t_switch_page(&ctx, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0x00, 0x10, 0x2a, 0x4d, 0x61, 0x56, 0x6a, 0x6e,
+				     0x79, 0x76, 0x8f, 0x95, 0x98, 0xae, 0xaa, 0xb2, 0xbb, 0xce,
+				     0xc6, 0xbd, 0xd5, 0xe2, 0xe8);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x00, 0x10, 0x2a, 0x4d, 0x61, 0x56, 0x6a, 0x6e,
+				     0x79, 0x76, 0x8f, 0x95, 0x98, 0xae, 0xaa, 0xb2, 0xbb, 0xce,
+				     0xc6, 0xbd, 0xd5, 0xe2, 0xe8);
 
-	_INIT_SWITCH_PAGE_CMD(0x04),
-	_INIT_DCS_CMD(0xBA, 0x01),
+	ili9882t_switch_page(&ctx, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x81);
 
-	_INIT_SWITCH_PAGE_CMD(0x0E),
-	_INIT_DCS_CMD(0x02, 0x0C),
-	_INIT_DCS_CMD(0x20, 0x10),
-	_INIT_DCS_CMD(0x25, 0x16),
-	_INIT_DCS_CMD(0x26, 0xE0),
-	_INIT_DCS_CMD(0x27, 0x00),
-	_INIT_DCS_CMD(0x29, 0x71),
-	_INIT_DCS_CMD(0x2A, 0x46),
-	_INIT_DCS_CMD(0x2B, 0x1F),
-	_INIT_DCS_CMD(0x2D, 0xC7),
-	_INIT_DCS_CMD(0x31, 0x02),
-	_INIT_DCS_CMD(0x32, 0xDF),
-	_INIT_DCS_CMD(0x33, 0x5A),
-	_INIT_DCS_CMD(0x34, 0xC0),
-	_INIT_DCS_CMD(0x35, 0x5A),
-	_INIT_DCS_CMD(0x36, 0xC0),
-	_INIT_DCS_CMD(0x38, 0x65),
-	_INIT_DCS_CMD(0x80, 0x3E),
-	_INIT_DCS_CMD(0x81, 0xA0),
-	_INIT_DCS_CMD(0xB0, 0x01),
-	_INIT_DCS_CMD(0xB1, 0xCC),
-	_INIT_DCS_CMD(0xC0, 0x12),
-	_INIT_DCS_CMD(0xC2, 0xCC),
-	_INIT_DCS_CMD(0xC3, 0xCC),
-	_INIT_DCS_CMD(0xC4, 0xCC),
-	_INIT_DCS_CMD(0xC5, 0xCC),
-	_INIT_DCS_CMD(0xC6, 0xCC),
-	_INIT_DCS_CMD(0xC7, 0xCC),
-	_INIT_DCS_CMD(0xC8, 0xCC),
-	_INIT_DCS_CMD(0xC9, 0xCC),
-	_INIT_DCS_CMD(0x30, 0x00),
-	_INIT_DCS_CMD(0x00, 0x81),
-	_INIT_DCS_CMD(0x08, 0x02),
-	_INIT_DCS_CMD(0x09, 0x00),
-	_INIT_DCS_CMD(0x07, 0x21),
-	_INIT_DCS_CMD(0x04, 0x10),
+	ili9882t_switch_page(&ctx, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x03);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x03);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x03);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x03);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0b, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x10, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x12, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x13, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x14, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x17, 0x0b);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1a, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x0d);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1c, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x0e);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1e, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x0f);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x11);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x24, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x12);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x13);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x28, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x14);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x15);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2c, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2d, 0x16);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2e, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x17);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x08);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x18);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x19);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x1a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x37, 0x1b);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x1c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x1d);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3c, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3d, 0x1e);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3e, 0x0a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3f, 0x1f);
 
-	_INIT_SWITCH_PAGE_CMD(0x1E),
-	_INIT_DCS_CMD(0x60, 0x00),
-	_INIT_DCS_CMD(0x64, 0x00),
-	_INIT_DCS_CMD(0x6D, 0x00),
+	ili9882t_switch_page(&ctx, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x01);
 
-	_INIT_SWITCH_PAGE_CMD(0x0B),
-	_INIT_DCS_CMD(0xA6, 0x44),
-	_INIT_DCS_CMD(0xA7, 0xB6),
-	_INIT_DCS_CMD(0xA8, 0x03),
-	_INIT_DCS_CMD(0xA9, 0x03),
-	_INIT_DCS_CMD(0xAA, 0x51),
-	_INIT_DCS_CMD(0xAB, 0x51),
-	_INIT_DCS_CMD(0xAC, 0x04),
-	_INIT_DCS_CMD(0xBD, 0x92),
-	_INIT_DCS_CMD(0xBE, 0xA1),
+	ili9882t_switch_page(&ctx, 0x0e);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x0c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x16);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0xe0);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x71);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x46);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x1f);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2d, 0xc7);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0xdf);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0xc0);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x5a);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0xc0);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0x65);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x3e);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0xa0);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0xcc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x12);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0xcc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0xcc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0xcc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0xcc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xcc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0xcc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0xcc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0xcc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x81);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x02);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x21);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x10);
 
-	_INIT_SWITCH_PAGE_CMD(0x05),
-	_INIT_DCS_CMD(0x86, 0x87),
+	ili9882t_switch_page(&ctx, 0x1e);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x60, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x64, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x00);
 
-	_INIT_SWITCH_PAGE_CMD(0x06),
-	_INIT_DCS_CMD(0x92, 0x22),
+	ili9882t_switch_page(&ctx, 0x0b);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa6, 0x44);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa7, 0xb6);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa8, 0x03);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa9, 0x03);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xaa, 0x51);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xab, 0x51);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xac, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x92);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0xa1);
 
-	_INIT_SWITCH_PAGE_CMD(0x00),
-	_INIT_DCS_CMD(MIPI_DCS_EXIT_SLEEP_MODE),
-	_INIT_DELAY_CMD(120),
-	_INIT_DCS_CMD(MIPI_DCS_SET_DISPLAY_ON),
-	_INIT_DELAY_CMD(20),
-	{},
+	ili9882t_switch_page(&ctx, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x87);
+
+	ili9882t_switch_page(&ctx, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x22);
+
+	ili9882t_switch_page(&ctx, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_EXIT_SLEEP_MODE);
+	if (ctx.accum_err)
+		return ctx.accum_err;
+
+	msleep(120);
+
+	mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_SET_DISPLAY_ON);
+	if (ctx.accum_err)
+		return ctx.accum_err;
+
+	msleep(20);
+
+	return 0;
 };
 
 static inline struct ili9882t *to_ili9882t(struct drm_panel *panel)
@@ -424,63 +422,6 @@ static inline struct ili9882t *to_ili9882t(struct drm_panel *panel)
 	return container_of(panel, struct ili9882t, base);
 }
 
-static int ili9882t_init_dcs_cmd(struct ili9882t *ili)
-{
-	struct mipi_dsi_device *dsi = ili->dsi;
-	struct drm_panel *panel = &ili->base;
-	int i, err = 0;
-
-	if (ili->desc->init_cmds) {
-		const struct panel_init_cmd *init_cmds = ili->desc->init_cmds;
-
-		for (i = 0; init_cmds[i].len != 0; i++) {
-			const struct panel_init_cmd *cmd = &init_cmds[i];
-
-			switch (cmd->type) {
-			case DELAY_CMD:
-				msleep(cmd->data[0]);
-				err = 0;
-				break;
-
-			case INIT_DCS_CMD:
-				err = mipi_dsi_dcs_write(dsi, cmd->data[0],
-							 cmd->len <= 1 ? NULL :
-							 &cmd->data[1],
-							 cmd->len - 1);
-				break;
-
-			default:
-				err = -EINVAL;
-			}
-
-			if (err < 0) {
-				dev_err(panel->dev,
-					"failed to write command %u\n", i);
-				return err;
-			}
-		}
-	}
-	return 0;
-}
-
-static int ili9882t_switch_page(struct mipi_dsi_device *dsi, u8 page)
-{
-	int ret;
-	const struct panel_init_cmd cmd = _INIT_SWITCH_PAGE_CMD(page);
-
-	ret = mipi_dsi_dcs_write(dsi, cmd.data[0],
-				 cmd.len <= 1 ? NULL :
-				 &cmd.data[1],
-				 cmd.len - 1);
-	if (ret) {
-		dev_err(&dsi->dev,
-			"error switching panel controller page (%d)\n", ret);
-		return ret;
-	}
-
-	return 0;
-}
-
 static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
 {
 	struct mipi_dsi_device *dsi = ili->dsi;
@@ -502,10 +443,13 @@ static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
 static int ili9882t_disable(struct drm_panel *panel)
 {
 	struct ili9882t *ili = to_ili9882t(panel);
-	struct mipi_dsi_device *dsi = ili->dsi;
+	struct mipi_dsi_multi_context ctx = { .dsi = ili->dsi };
 	int ret;
 
-	ili9882t_switch_page(dsi, 0x00);
+	ili9882t_switch_page(&ctx, 0x00);
+	if (ctx.accum_err)
+		return ctx.accum_err;
+
 	ret = ili9882t_enter_sleep_mode(ili);
 	if (ret < 0) {
 		dev_err(panel->dev, "failed to set panel off: %d\n", ret);
@@ -570,11 +514,9 @@ static int ili9882t_prepare(struct drm_panel *panel)
 	gpiod_set_value(ili->enable_gpio, 1);
 	usleep_range(6000, 10000);
 
-	ret = ili9882t_init_dcs_cmd(ili);
-	if (ret < 0) {
-		dev_err(panel->dev, "failed to init panel: %d\n", ret);
+	ret = ili->desc->init(ili);
+	if (ret < 0)
 		goto poweroff;
-	}
 
 	return 0;
 
@@ -620,7 +562,7 @@ static const struct panel_desc starry_ili9882t_desc = {
 	.format = MIPI_DSI_FMT_RGB888,
 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
 		      MIPI_DSI_MODE_LPM,
-	.init_cmds = starry_ili9882t_init_cmd,
+	.init = starry_ili9882t_init,
 };
 
 static int ili9882t_get_modes(struct drm_panel *panel,