From 4f0303d43973a4086d6355db0c653a5a369b5dbe Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 18 Jul 2019 11:36:23 +0200 Subject: [PATCH 1/6] ARM: dts: meson8b: add ethernet fifo sizes If unspecified in DT, the fifo sizes are not automatically detected by the dwmac1000 dma driver and the reported fifo sizes default to 0. Because of this, flow control will be turned off on the device. Add the fifo sizes provided by the datasheet in the SoC in DT so flow control may be enabled if necessary. Signed-off-by: Jerome Brunet Reviewed-by: Martin Blumenstingl Reviewed-by: Kevin Hilman Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8b.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index fba2c70c2fda..b044ad78b475 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -410,6 +410,8 @@ ðmac { <&clkc CLKID_MPLL2>, <&clkc CLKID_MPLL2>; clock-names = "stmmaceth", "clkin0", "clkin1"; + rx-fifo-depth = <4096>; + tx-fifo-depth = <2048>; resets = <&reset RESET_ETHERNET>; reset-names = "stmmaceth"; From ea241bdfa0ba632416a828ddaa2fde33f30de530 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 27 Jul 2019 14:12:54 +0200 Subject: [PATCH 2/6] ARM: dts: meson8b: add the PWM_D output pin The PWM_D output is used for the VDDEE PWM regulator which supplies for example the Mali GPU on the EC-100 and Odroid-C1 boards. Add the output pin the VDDEE regulators can be added. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8b.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index b044ad78b475..099bf8e711c9 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -361,6 +361,14 @@ mux { }; }; + pwm_d_pins: pwm-d { + mux { + groups = "pwm_d"; + function = "pwm_d"; + bias-disable; + }; + }; + uart_b0_pins: uart-b0 { mux { groups = "uart_tx_b0", From 087a1d8b4e4cd0f84bde82e21bad83ea3d00a216 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 27 Jul 2019 14:12:55 +0200 Subject: [PATCH 3/6] ARM: dts: meson8b: ec100: add the VDDEE regulator The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE supplies for example the Mali GPU and is controlled by PWM_D instead of PWM_C. Add the VDDEE PWM regulator and make it the supply of the Mali GPU. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8b-ec100.dts | 31 ++++++++++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts index 96d239d8334e..bed1dfef1985 100644 --- a/arch/arm/boot/dts/meson8b-ec100.dts +++ b/arch/arm/boot/dts/meson8b-ec100.dts @@ -219,6 +219,27 @@ vcc_rtc: regulator-vcc-rtc { */ vin-supply = <&vcc_3v3>; }; + + vddee: regulator-vddee { + /* + * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz + * Synchronous Step Down Regulator. Also called VDDAO + * in a part of the schematics. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDEE"; + regulator-min-microvolt = <860000>; + regulator-max-microvolt = <1140000>; + + vin-supply = <&vcc_5v>; + + pwms = <&pwm_cd 1 1148 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; }; &cpu0 { @@ -269,6 +290,10 @@ rt5640: codec@1c { }; }; +&mali { + mali-supply = <&vddee>; +}; + &saradc { status = "okay"; vref-supply = <&vcc_1v8>; @@ -350,10 +375,10 @@ &gpio { &pwm_cd { status = "okay"; - pinctrl-0 = <&pwm_c1_pins>; + pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>; - clock-names = "clkin0"; + clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clock-names = "clkin0", "clkin1"; }; &rtc { From 8bdf38be712d49093e51e3cf754fd427d4685ba0 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 27 Jul 2019 14:12:56 +0200 Subject: [PATCH 4/6] ARM: dts: meson8b: odroidc1: add the VDDEE regulator The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE supplies for example the Mali GPU and is controlled by PWM_D instead of PWM_C. Add the VDDEE PWM regulator and make it the supply of the Mali GPU. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8b-odroidc1.dts | 27 +++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts index 86c4614e0a38..90f66dc45115 100644 --- a/arch/arm/boot/dts/meson8b-odroidc1.dts +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts @@ -154,6 +154,23 @@ vddc_ddr: regulator-vddc-ddr { vin-supply = <&p5v0>; }; + vddee: regulator-vddee { + /* Monolithic Power Systems MP2161 */ + compatible = "pwm-regulator"; + + regulator-name = "VDDEE"; + regulator-min-microvolt = <860000>; + regulator-max-microvolt = <1140000>; + + vin-supply = <&p5v0>; + + pwms = <&pwm_cd 1 12218 0>; + pwm-dutycycle-range = <91 0>; + + regulator-boot-on; + regulator-always-on; + }; + vdd_rtc: regulator-vdd-rtc { /* * Torex Semiconductor XC6215 configured for a fixed output of @@ -276,6 +293,10 @@ &ir_receiver { pinctrl-names = "default"; }; +&mali { + mali-supply = <&vddee>; +}; + &saradc { status = "okay"; vref-supply = <&vcc_1v8>; @@ -308,10 +329,10 @@ sd_card_slot: slot@1 { &pwm_cd { status = "okay"; - pinctrl-0 = <&pwm_c1_pins>; + pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>; - clock-names = "clkin0"; + clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clock-names = "clkin0", "clkin1"; }; &rtc { From dee51cd0d2e8af08c74e5bbb10673af1cf0ee4a3 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 27 Jul 2019 14:12:57 +0200 Subject: [PATCH 5/6] ARM: dts: meson8b: mxq: add the VDDEE regulator The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE supplies for example the Mali GPU and is controlled by PWM_D instead of PWM_C. Add the VDDEE PWM regulator and make it the supply of the Mali GPU. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8b-mxq.dts | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts index bb27b34eb346..6e39ad52e42d 100644 --- a/arch/arm/boot/dts/meson8b-mxq.dts +++ b/arch/arm/boot/dts/meson8b-mxq.dts @@ -76,6 +76,22 @@ vcc_5v: regulator-vcc5v { regulator-boot-on; regulator-always-on; }; + + vddee: regulator-vddee { + compatible = "pwm-regulator"; + + regulator-name = "VDDEE"; + regulator-min-microvolt = <860000>; + regulator-max-microvolt = <1140000>; + + vin-supply = <&vcc_5v>; + + pwms = <&pwm_cd 1 1148 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; }; &cpu0 { @@ -112,6 +128,10 @@ eth_phy0: ethernet-phy@0 { }; }; +&mali { + mali-supply = <&vddee>; +}; + &saradc { status = "okay"; vref-supply = <&vcc_1v8>; @@ -143,10 +163,10 @@ sd_card_slot: slot@1 { &pwm_cd { status = "okay"; - pinctrl-0 = <&pwm_c1_pins>; + pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>; - clock-names = "clkin0"; + clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clock-names = "clkin0", "clkin1"; }; &uart_AO { From 6b14dd7267126931e9a95c68a442e8f2dabdc3c4 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Mon, 12 Aug 2019 19:50:04 +0200 Subject: [PATCH 6/6] ARM: dts: meson8b: odroidc1: use the MAC address stored in the eFuse Odroid-C1 uses the MAC address stored in eFuse at offset 0x1b4 (which is defined as a "standard" offset for all Meson8 and Meson8b boards, but testing shows that MXQ doesn't have the eFuse values programmed and EC-100 stores it's MAC address in eMMC). Add the nvmem cell which points to the MAC address and asssign it to the Ethernet controller as "mac-address". As result of this the MAC address which is stored in the eFuse is now assigned to the Ethernet controller and consistent across reboots. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8b-odroidc1.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts index 90f66dc45115..a24eccc354b9 100644 --- a/arch/arm/boot/dts/meson8b-odroidc1.dts +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts @@ -190,6 +190,12 @@ &cpu0 { cpu-supply = <&vcck>; }; +&efuse { + ethernet_mac_address: mac@1b4 { + reg = <0x1b4 0x6>; + }; +}; + ðmac { status = "okay"; @@ -200,6 +206,9 @@ ðmac { phy-handle = <ð_phy>; amlogic,tx-delay-ns = <4>; + nvmem-cells = <ðernet_mac_address>; + nvmem-cell-names = "mac-address"; + mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>;