From f3acb237a17962349b61eed813f62dddf7aead29 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:38:45 +0200 Subject: [PATCH 01/12] arm64: dts: renesas: r8a779h0: Drop "opp-shared" from opp-table-0 The four Cortex-A76 CPU cores on R-Car V4M share their Operating Performance Points (OPP) table, but they have independent clocks. All cores in the cluster can switch DVFS states independently, hence the cluster's OPP table should not have an "opp-shared" property. Fixes: 6bd8b0bc444eae56 ("arm64: dts: renesas: r8a779h0: Add CA76 operating points") Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/4e0227ff4388485cdb1ca2855ee6df92754e756e.1718890585.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index 6af0d59e275f..25e12aa47487 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -16,7 +16,6 @@ / { cluster0_opp: opp-table-0 { compatible = "operating-points-v2"; - opp-shared; opp-500000000 { opp-hz = /bits/ 64 <500000000>; From 6fca24a07e1de664c3d0b280043302e0387726df Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:31 +0200 Subject: [PATCH 02/12] arm64: dts: renesas: r8a779a0: Add missing hypervisor virtual timer IRQ Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: 834c310f541839b6 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support") Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/671416fb31e3992101c32fe7e46147fe4cd623ae.1718890849.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index cfa70b441e32..d76347001cc1 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -2919,6 +2919,9 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; From b1c34567aebe300f9a0f70320eaeef0b3d56ffc7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:32 +0200 Subject: [PATCH 03/12] arm64: dts: renesas: r8a779f0: Add missing hypervisor virtual timer IRQ Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: c62331e8222f8f21 ("arm64: dts: renesas: Add Renesas R8A779F0 SoC support") Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/46deba1008f73e4b6864f937642d17f9d4ae7205.1718890849.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi index 72cf30341fc4..9629adb47d99 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -1324,7 +1324,10 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; ufs30_clk: ufs30-clk { From 6775165fc95052a03acc91e25bc20fcf286910a7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:33 +0200 Subject: [PATCH 04/12] arm64: dts: renesas: r8a779g0: Add missing hypervisor virtual timer IRQ Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: 987da486d84a5643 ("arm64: dts: renesas: Add Renesas R8A779G0 SoC support") Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/5eeabbeaea1c5fd518a608f2e8013d260b00fd7e.1718890849.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 2ee306305d83..c33d8c01e301 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -2353,6 +2353,9 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; From 4036bae6dfd782d414040e7d714abc525b2e8792 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:34 +0200 Subject: [PATCH 05/12] arm64: dts: renesas: r9a07g043u: Add missing hypervisor virtual timer IRQ Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: cf40c9689e5109bf ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC") Signed-off-by: Geert Uytterhoeven Reviewed-by: Lad Prabhakar Link: https://lore.kernel.org/15cc7a7522b1658327a2bd0c4990d0131bbcb4d7.1718890849.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index 165bfcfef3bc..18ef297db933 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -50,7 +50,10 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; From ecbc5206a1a0532258144a4703cccf4e70f3fe6c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:35 +0200 Subject: [PATCH 06/12] arm64: dts: renesas: r9a07g044: Add missing hypervisor virtual timer IRQ Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: 68a45525297b2e9a ("arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's") Signed-off-by: Geert Uytterhoeven Reviewed-by: Lad Prabhakar Link: https://lore.kernel.org/21f556eb7e903d5b9f4c96188fd4b6ae0db71856.1718890849.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index c07ddd8124e6..d3838e5820fc 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -1334,6 +1334,9 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; From 2918674704aad620215c41979a331021fe3f1ec4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:36 +0200 Subject: [PATCH 07/12] arm64: dts: renesas: r9a07g054: Add missing hypervisor virtual timer IRQ Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: 7c2b8198f4f321df ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC") Signed-off-by: Geert Uytterhoeven Reviewed-by: Lad Prabhakar Link: https://lore.kernel.org/834244e77e5f407ee6fab1ab5c10c98a8a933085.1718890849.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi index 8448afa8be54..1de2e5f0917d 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi @@ -1342,6 +1342,9 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; From 10f9badc473d43ebfddd1ddedbcb8eb3f8f3fdd9 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:37 +0200 Subject: [PATCH 08/12] arm64: dts: renesas: r9a08g045: Add missing hypervisor virtual timer IRQ Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: e20396d65b959a65 ("arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC") Signed-off-by: Geert Uytterhoeven Reviewed-by: Claudiu Beznea Tested-by: Claudiu Beznea Link: https://lore.kernel.org/884c683fb6c1d1bf7d0d383a8df8f65a0a424dc7.1718890849.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi index 2162c247d6de..0d5c47a65e46 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -294,6 +294,9 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; From 9d30bd7bdfe373f3e9f7e3e047afd8dd2e585feb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:38 +0200 Subject: [PATCH 09/12] ARM: dts: renesas: Add interrupt-names to arch timer nodes Add interrupt-names properties to device nodes that represent ARM architected timers for clarity. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/b964e2f916cc23b6272e158c7b24597c971a82a5.1718890849.git.geert+renesas@glider.be --- arch/arm/boot/dts/renesas/r8a73a4.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7742.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7743.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7744.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7745.dtsi | 1 + arch/arm/boot/dts/renesas/r8a77470.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7790.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7791.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7792.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7793.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7794.dtsi | 1 + arch/arm/boot/dts/renesas/r9a06g032.dtsi | 1 + 12 files changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi index 9a2ae282a46b..85261684b5d5 100644 --- a/arch/arm/boot/dts/renesas/r8a73a4.dtsi +++ b/arch/arm/boot/dts/renesas/r8a73a4.dtsi @@ -58,6 +58,7 @@ timer { , , ; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; tmu0: timer@e61e0000 { diff --git a/arch/arm/boot/dts/renesas/r8a7742.dtsi b/arch/arm/boot/dts/renesas/r8a7742.dtsi index d55c344c1cd2..3a5d6b434d09 100644 --- a/arch/arm/boot/dts/renesas/r8a7742.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7742.dtsi @@ -1938,6 +1938,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7743.dtsi b/arch/arm/boot/dts/renesas/r8a7743.dtsi index d917c0a971f5..8833898d5557 100644 --- a/arch/arm/boot/dts/renesas/r8a7743.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7743.dtsi @@ -1846,6 +1846,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7744.dtsi b/arch/arm/boot/dts/renesas/r8a7744.dtsi index 754859c38a93..c66c1102fb72 100644 --- a/arch/arm/boot/dts/renesas/r8a7744.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7744.dtsi @@ -1832,6 +1832,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7745.dtsi b/arch/arm/boot/dts/renesas/r8a7745.dtsi index 168298300490..6ddde364782b 100644 --- a/arch/arm/boot/dts/renesas/r8a7745.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7745.dtsi @@ -1636,6 +1636,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a77470.dtsi b/arch/arm/boot/dts/renesas/r8a77470.dtsi index 2375438d83c9..a8a12275c98a 100644 --- a/arch/arm/boot/dts/renesas/r8a77470.dtsi +++ b/arch/arm/boot/dts/renesas/r8a77470.dtsi @@ -1061,6 +1061,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7790.dtsi b/arch/arm/boot/dts/renesas/r8a7790.dtsi index 583b74a9f071..20e4d4c6e748 100644 --- a/arch/arm/boot/dts/renesas/r8a7790.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7790.dtsi @@ -2012,6 +2012,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7791.dtsi b/arch/arm/boot/dts/renesas/r8a7791.dtsi index de08ceb62230..f9c9e1d8f669 100644 --- a/arch/arm/boot/dts/renesas/r8a7791.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7791.dtsi @@ -1938,6 +1938,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7792.dtsi b/arch/arm/boot/dts/renesas/r8a7792.dtsi index 7defeb8e4cd1..dd3bc32668b7 100644 --- a/arch/arm/boot/dts/renesas/r8a7792.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7792.dtsi @@ -990,5 +990,6 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; }; diff --git a/arch/arm/boot/dts/renesas/r8a7793.dtsi b/arch/arm/boot/dts/renesas/r8a7793.dtsi index d32a9d5d3faa..24e66ddf37e0 100644 --- a/arch/arm/boot/dts/renesas/r8a7793.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7793.dtsi @@ -1517,6 +1517,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7794.dtsi b/arch/arm/boot/dts/renesas/r8a7794.dtsi index f37f094cecc8..8e6386a79aea 100644 --- a/arch/arm/boot/dts/renesas/r8a7794.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7794.dtsi @@ -1484,6 +1484,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi index 466077a8f0ac..7548291c8d7e 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi @@ -484,6 +484,7 @@ timer { , , ; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; usbphy: usb-phy { From 659c0b4444b24c872ab19e5fa4b96d32043a0a6c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:39 +0200 Subject: [PATCH 10/12] arm64: dts: renesas: Add interrupt-names to arch timer nodes Add interrupt-names properties to device nodes that represent ARM architected timers for clarity. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/e5e2767011322daaebcc8dd6ecfcadc6966042d5.1718890849.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77951.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77960.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77961.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77965.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77990.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77995.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 2 ++ arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 1 + 14 files changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index a8a44fe5e83b..1dbf9d56c68d 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -2853,6 +2853,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clocks - can be overridden by the board */ diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 4fff511e994c..10f22c52e79e 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -2704,6 +2704,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clocks - can be overridden by the board */ diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index 1ef43d78c3a5..3e2af50ce7c6 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -1990,6 +1990,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clocks - can be overridden by the board */ diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index be55ae83944c..1eeb4c7b4c4b 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -2985,6 +2985,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clocks - can be overridden by the board */ diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi index bea4edd17d53..96f3b5fe7e92 100644 --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi @@ -3473,6 +3473,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clocks - can be overridden by the board */ diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi index 7846fea8e40d..1122c470b72f 100644 --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi @@ -3068,6 +3068,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clocks - can be overridden by the board */ diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi index 58f9286a5ab5..bf1130af7de3 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi @@ -2889,6 +2889,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clocks - can be overridden by the board */ diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 692940662d38..f02d1547b881 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -2877,6 +2877,7 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clocks - can be overridden by the board */ diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index d2d3cecc76d5..64fb95b1c89a 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -1223,5 +1223,6 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; }; diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi index c0ba110c74d6..0c2b157036e7 100644 --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -1630,5 +1630,6 @@ IRQ_TYPE_LEVEL_LOW)>, IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; }; diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index 37063e3f4e1b..233af3081e84 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -2157,5 +2157,6 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; }; diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 89990dd8ebf7..5f0828a4675b 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -1476,5 +1476,6 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; }; diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index 25e12aa47487..706f91a65ac0 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -1860,5 +1860,7 @@ timer { <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi index e008236c3d2d..9a4cbef704c1 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi @@ -372,5 +372,6 @@ timer { <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; }; From bd8d7546f9f74a0a70ea79885d5abcf3d66ad5c0 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 24 Jun 2024 00:16:24 +0000 Subject: [PATCH 11/12] arm64: dts: renesas: r8a779g0: Tidy up sound DT settings R-Car V4H (R8A779G0) supports only 1 AUDIO_CLKOUT and 1 SSI, thus, #clock-cells / #sound-dai-cells are both fixed to zero. (#sound-dai-cells is needed for Simple-Audio-Card, but not needed for Audio-Graph-Card). Fix this up. Signed-off-by: Kuninori Morimoto Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/87frt3kxew.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven --- .../r8a779g0-white-hawk-ard-audio-da7212.dtso | 4 ---- arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 17 +++++------------ 2 files changed, 5 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-ard-audio-da7212.dtso b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-ard-audio-da7212.dtso index e6f53377ecd9..e6cf304c77ee 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-ard-audio-da7212.dtso +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-ard-audio-da7212.dtso @@ -155,11 +155,7 @@ &rcar_sound { pinctrl-0 = <&sound_clk_pins>, <&sound_pins>; pinctrl-names = "default"; - /* Single DAI */ - #sound-dai-cells = <0>; - /* audio_clkout */ - #clock-cells = <0>; clock-frequency = <5644800>; /* 44.1kHz groups [(C) clock] */ // clock-frequency = <6144000>; /* 48 kHz groups [(C) clock] */ diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index c33d8c01e301..53d1d4d8197a 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -1718,18 +1718,6 @@ dmac1: dma-controller@e7351000 { }; rcar_sound: sound@ec5a0000 { - /* - * #sound-dai-cells is required - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * audio_clkout0/1/2/3 : #clock-cells = <1>; <&rcar_sound N>; - */ compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4"; reg = <0 0xec5a0000 0 0x020>, <0 0xec540000 0 0x1000>, @@ -1739,6 +1727,11 @@ rcar_sound: sound@ec5a0000 { clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; clock-names = "ssiu.0", "ssi.0", "clkin"; + /* #clock-cells is fixed */ + #clock-cells = <0>; + /* #sound-dai-cells is fixed */ + #sound-dai-cells = <0>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; resets = <&cpg 2926>, <&cpg 2927>; reset-names = "ssiu.0", "ssi.0"; From 07e777318911d76fa787fc57f02b595481382291 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 24 Jun 2024 00:16:30 +0000 Subject: [PATCH 12/12] arm64: dts: renesas: r8a779h0: R-Car Sound support Add sound support for R-Car V4M. [Kuninori: adjusted to latest upstream kernel] Co-developed-by: Khanh Le Signed-off-by: Khanh Le Signed-off-by: Kuninori Morimoto Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/87ed8nkxeq.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 68 +++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index 706f91a65ac0..a03ab2b6a859 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -14,6 +14,13 @@ / { #address-cells = <2>; #size-cells = <2>; + /* External Audio clock - to be overridden by boards that provide it */ + audio_clkin: audio_clkin { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + cluster0_opp: opp-table-0 { compatible = "operating-points-v2"; @@ -1458,6 +1465,67 @@ dmac2: dma-controller@e7351000 { <&ipmmu_ds0 22>, <&ipmmu_ds0 23>; }; + rcar_sound: sound@ec400000 { + compatible = "renesas,rcar_sound-r8a779h0", "renesas,rcar_sound-gen4"; + reg = <0 0xec400000 0 0x40000>, + <0 0xec540000 0 0x1000>, + <0 0xec541000 0 0x050>, + <0 0xec5a0000 0 0x020>; + reg-names = "sdmc", "ssiu", "ssi", "adg"; + clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; + clock-names = "ssiu.0", "ssi.0", "clkin"; + /* #clock-cells is fixed */ + #clock-cells = <0>; + /* #sound-dai-cells is fixed */ + #sound-dai-cells = <0>; + + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 2926>, <&cpg 2927>; + reset-names = "ssiu.0", "ssi.0"; + status = "disabled"; + + rcar_sound,ssiu { + ssiu00: ssiu-0 { + dmas = <&dmac1 0x6e>, <&dmac1 0x6f>; + dma-names = "tx", "rx"; + }; + ssiu01: ssiu-1 { + dmas = <&dmac1 0x6c>, <&dmac1 0x6d>; + dma-names = "tx", "rx"; + }; + ssiu02: ssiu-2 { + dmas = <&dmac1 0x6a>, <&dmac1 0x6b>; + dma-names = "tx", "rx"; + }; + ssiu03: ssiu-3 { + dmas = <&dmac1 0x68>, <&dmac1 0x69>; + dma-names = "tx", "rx"; + }; + ssiu04: ssiu-4 { + dmas = <&dmac1 0x66>, <&dmac1 0x67>; + dma-names = "tx", "rx"; + }; + ssiu05: ssiu-5 { + dmas = <&dmac1 0x64>, <&dmac1 0x65>; + dma-names = "tx", "rx"; + }; + ssiu06: ssiu-6 { + dmas = <&dmac1 0x62>, <&dmac1 0x63>; + dma-names = "tx", "rx"; + }; + ssiu07: ssiu-7 { + dmas = <&dmac1 0x60>, <&dmac1 0x61>; + dma-names = "tx", "rx"; + }; + }; + + rcar_sound,ssi { + ssi0: ssi-0 { + interrupts = ; + }; + }; + }; + mmc0: mmc@ee140000 { compatible = "renesas,sdhi-r8a779h0", "renesas,rcar-gen4-sdhi";