From 2ffa24e42317f080e86ea92dc81d26b99fcca611 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 18 Nov 2022 10:20:15 -0300 Subject: [PATCH 01/29] ARM: dts: imx53: Fix sram.yaml warnings Add ranges, #address-cells and #size-cells properties to the sram node to fix the following warnings when checking sram.yaml: make dtbs_check DT_SCHEMA_FILES=sram.yaml ... DTC_CHK arch/arm/boot/dts/imx53-qsb.dtb arch/arm/boot/dts/imx53-qsb.dtb: sram@f8000000: '#address-cells' is a required property From schema: Documentation/devicetree/bindings/sram/sram.yaml /home/fabio/linux-next/arch/arm/boot/dts/imx53-qsb.dtb: sram@f8000000: '#size-cells' is a required property From schema: Documentation/devicetree/bindings/sram/sram.yaml /home/fabio/linux-next/arch/arm/boot/dts/imx53-qsb.dtb: sram@f8000000: 'ranges' is a required property From schema: Documentation/devicetree/bindings/sram/sram.yaml Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx53.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 56b3c13f4eb7..17dc13719639 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -850,6 +850,9 @@ sahara: crypto@63ff8000 { ocram: sram@f8000000 { compatible = "mmio-sram"; reg = <0xf8000000 0x20000>; + ranges = <0 0xf8000000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; clocks = <&clks IMX5_CLK_OCRAM>; }; }; From 63e1654d82f3462ff322d71504f3192f2c8636a0 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 18 Nov 2022 10:20:16 -0300 Subject: [PATCH 02/29] ARM: dts: imx51: Fix sram.yaml warnings Add ranges, #address-cells and #size-cells properties to the sram node to fix the following warnings when checking sram.yaml: make dtbs_check DT_SCHEMA_FILES=sram.yaml ... arch/arm/boot/dts/imx51-apf51.dtb: sram@1ffe0000: '#address-cells' is a required property From schema: Documentation/devicetree/bindings/sram/sram.yaml arch/arm/boot/dts/imx51-apf51.dtb: sram@1ffe0000: '#size-cells' is a required property From schema: Documentation/devicetree/bindings/sram/sram.yaml arch/arm/boot/dts/imx51-apf51.dtb: sram@1ffe0000: 'ranges' is a required property From schema: Documentation/devicetree/bindings/sram/sram.yaml Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx51.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 853707574d2e..ba92a3ea6872 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -124,6 +124,9 @@ soc: soc { iram: sram@1ffe0000 { compatible = "mmio-sram"; reg = <0x1ffe0000 0x20000>; + ranges = <0 0x1ffe0000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; }; gpu: gpu@30000000 { From 242daa52594e5f0605338cab1718fa609e36ab13 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Tue, 22 Nov 2022 16:54:34 +0100 Subject: [PATCH 03/29] ARM: dts: apalis-imx6: Disable usb over-current Disable usb over-current of the chipidea driver on all Carrier-Boards used by Toradex. Do this as we don't want to use this functionality on our Carrier Boards and to leave it open to someone who includes our module-level device-trees. Remove the now obsolete disable-over-current flag from module-level device-tree imx6qdl-apalis.dtsi and leave it as already mentioned to the people actually implementing the carrier-board to implement this. This will prevent the warning "No over current polarity defined" from being printed on boot. Signed-off-by: Philippe Schenker Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-apalis-eval.dts | 2 ++ arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts | 2 ++ arch/arm/boot/dts/imx6q-apalis-ixora.dts | 2 ++ arch/arm/boot/dts/imx6qdl-apalis.dtsi | 1 - 4 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index fa160a389870..3fc079dfd61e 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -147,11 +147,13 @@ &uart5 { }; &usbh1 { + disable-over-current; vbus-supply = <®_usb_host_vbus>; status = "okay"; }; &usbotg { + disable-over-current; vbus-supply = <®_usb_otg_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts index f9f7d99bd4db..717decda0ceb 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts @@ -202,11 +202,13 @@ &uart5 { }; &usbh1 { + disable-over-current; vbus-supply = <®_usb_host_vbus>; status = "okay"; }; &usbotg { + disable-over-current; vbus-supply = <®_usb_otg_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index ce39c6a3f640..f338be435277 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -151,11 +151,13 @@ &uart5 { }; &usbh1 { + disable-over-current; vbus-supply = <®_usb_host_vbus>; status = "okay"; }; &usbotg { + disable-over-current; vbus-supply = <®_usb_otg_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 7c17b91f0965..f912697bfdb3 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -824,7 +824,6 @@ &uart5 { }; &usbotg { - disable-over-current; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; status = "disabled"; From 500cd5b741781906a5d62073bf59c3ab2f2ff3b9 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Tue, 22 Nov 2022 16:54:35 +0100 Subject: [PATCH 04/29] ARM: dts: colibri-imx6: Disable usb over-current Disable usb over-current of the chipidea driver on all Carrier-Boards used by Toradex. Do this as we don't want to use this functionality on our Carrier Boards and to leave it open to someone who includes our module-level device-trees. Remove the now obsolete disable-over-current flag from module-level device-tree imx6qdl-colibri.dtsi and leave it as already mentioned to the people actually implementing the carrier-board to implement this. This will prevent the warning "No over current polarity defined" from being printed on boot. Signed-off-by: Philippe Schenker Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6dl-colibri-aster.dts | 2 ++ arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 2 ++ arch/arm/boot/dts/imx6dl-colibri-iris.dts | 2 ++ arch/arm/boot/dts/imx6qdl-colibri.dtsi | 1 - 4 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6dl-colibri-aster.dts b/arch/arm/boot/dts/imx6dl-colibri-aster.dts index a28e083f29d5..82a0d1a28d12 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-aster.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-aster.dts @@ -99,10 +99,12 @@ &uart3 { }; &usbh1 { + disable-over-current; status = "okay"; }; &usbotg { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts index a02981d4a3fc..f50a26dd34c0 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts @@ -111,10 +111,12 @@ &uart3 { }; &usbh1 { + disable-over-current; status = "okay"; }; &usbotg { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris.dts b/arch/arm/boot/dts/imx6dl-colibri-iris.dts index c5797ff35b71..4303c88bb2a9 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-iris.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-iris.dts @@ -138,10 +138,12 @@ &uart3 { }; &usbh1 { + disable-over-current; status = "okay"; }; &usbotg { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi index d8f985f297e4..f894d6907604 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -684,7 +684,6 @@ &usbh1 { /* Colibri USBC */ &usbotg { - disable-over-current; dr_mode = "otg"; extcon = <0>, <&extcon_usbc_det>; status = "disabled"; From 1abf12f84d873f474a2d560e747cde16959b42d6 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Tue, 22 Nov 2022 16:54:36 +0100 Subject: [PATCH 05/29] ARM: dts: colibri-imx6ull: Disable usb over-current Disable usb over-current of the chipidea driver on all Carrier-Boards used by Toradex. Do this as we don't want to use this functionality on our Carrier Boards and to leave it open to someone who includes our module-level device-trees. This will prevent the warning "No over current polarity defined" from being printed on boot. Signed-off-by: Philippe Schenker Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ull-colibri-aster.dtsi | 2 ++ arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 2 ++ arch/arm/boot/dts/imx6ull-colibri-iris.dtsi | 2 ++ 3 files changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi index c9133ba2d705..de4dc7c1a03a 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi @@ -130,11 +130,13 @@ &uart5 { }; &usbotg1 { + disable-over-current; vbus-supply = <®_usbh_vbus>; status = "okay"; }; &usbotg2 { + disable-over-current; vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi index e29907428c20..692ef26fbab3 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -106,11 +106,13 @@ &uart5 { }; &usbotg1 { + disable-over-current; vbus-supply = <®_usbh_vbus>; status = "okay"; }; &usbotg2 { + disable-over-current; vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi b/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi index 166a0aefc869..f52f8b5ad8a6 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi @@ -117,11 +117,13 @@ &uart5 { }; &usbotg1 { + disable-over-current; vbus-supply = <®_usbh_vbus>; status = "okay"; }; &usbotg2 { + disable-over-current; vbus-supply = <®_usbh_vbus>; status = "okay"; }; From 91ccc78165c262cdb36dfb5cc4b68d989f8f7f94 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Tue, 22 Nov 2022 16:54:37 +0100 Subject: [PATCH 06/29] ARM: dts: colibri-imx7: Disable usb over-current Disable usb over-current of the chipidea driver on all Carrier-Boards used by Toradex. Do this as we don't want to use this functionality on our Carrier Boards and to leave it open to someone who includes our module-level device-trees. This will prevent the warning "No over current polarity defined" from being printed on boot. Signed-off-by: Philippe Schenker Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 1 + arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 1 + arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi | 1 + arch/arm/boot/dts/imx7-colibri-iris.dtsi | 1 + arch/arm/boot/dts/imx7d-colibri-aster.dts | 1 + arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts | 1 + arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts | 1 + arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts | 1 + arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts | 1 + arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 1 + arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 1 + arch/arm/boot/dts/imx7d-colibri-iris-v2.dts | 1 + arch/arm/boot/dts/imx7d-colibri-iris.dts | 1 + 13 files changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index fa488a6de0d4..01612741f792 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -70,6 +70,7 @@ &uart3 { /* Colibri USBC */ &usbotg1 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 826f13da5b81..326440f2b4f4 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -101,6 +101,7 @@ &uart3 { /* Colibri USBC */ &usbotg1 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi index 6e199613583c..b687727f956a 100644 --- a/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi @@ -99,6 +99,7 @@ &uart3 { /* Colibri USBC */ &usbotg1 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-iris.dtsi b/arch/arm/boot/dts/imx7-colibri-iris.dtsi index 175c5d478d2e..6a9e5ab59691 100644 --- a/arch/arm/boot/dts/imx7-colibri-iris.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-iris.dtsi @@ -99,6 +99,7 @@ &uart3 { /* Colibri USBC */ &usbotg1 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index 90aaeddfb4f6..00ab92e56da4 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -36,5 +36,6 @@ &panel_dpi { /* Colibri USBH */ &usbotg2 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts index 3ec9ef6baaa4..d9c7045a55ba 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts @@ -18,5 +18,6 @@ / { /* Colibri USBH */ &usbotg2 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts index 6d505cb02aad..96b599439dde 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts @@ -17,5 +17,6 @@ / { /* Colibri USBH */ &usbotg2 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts index 7347659557f3..5eccb837b158 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts @@ -17,5 +17,6 @@ / { /* Colibri USBH */ &usbotg2 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts index 5324c92e368d..ae10e8a66ff1 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts @@ -17,5 +17,6 @@ / { /* Colibri USBH */ &usbotg2 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index 2fb4d2133a1b..3740e34ef99f 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -51,6 +51,7 @@ &gpio6 { /* Colibri USBH */ &usbotg2 { + disable-over-current; dr_mode = "host"; vbus-supply = <®_usbh_vbus>; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index c7a8b5aa2408..33d787617db0 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -52,5 +52,6 @@ &pwm3 { /* Colibri USBH */ &usbotg2 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts b/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts index 5762f51d5f0f..afdb1d06c7f6 100644 --- a/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts +++ b/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts @@ -79,5 +79,6 @@ &panel_dpi { /* Colibri USBH */ &usbotg2 { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-iris.dts b/arch/arm/boot/dts/imx7d-colibri-iris.dts index 9c63cb9d9a64..531b0b99bd5a 100644 --- a/arch/arm/boot/dts/imx7d-colibri-iris.dts +++ b/arch/arm/boot/dts/imx7d-colibri-iris.dts @@ -52,5 +52,6 @@ &pwm3 { /* Colibri USBH */ &usbotg2 { + disable-over-current; status = "okay"; }; From 4b0d1f2738899dbcc7a026d826373530019aa31b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 25 Nov 2022 15:42:22 +0100 Subject: [PATCH 07/29] ARM: dts: imx: align LED node names with dtschema The node names should be generic and DT schema expects certain pattern: imx50-kobo-aura.dtb: gpio-leds: 'on' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' imx6dl-yapp4-draco.dtb: led-controller@30: 'chan@0', 'chan@1', 'chan@2' do not match any of the regexes: '^led@[0-8]$', '^multi-led@[0-8]$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx50-kobo-aura.dts | 2 +- arch/arm/boot/dts/imx53-cx9020.dts | 10 +++++----- arch/arm/boot/dts/imx53-m53evk.dts | 4 ++-- arch/arm/boot/dts/imx53-m53menlo.dts | 6 +++--- arch/arm/boot/dts/imx53-tx53.dtsi | 2 +- arch/arm/boot/dts/imx53-usbarmory.dts | 2 +- arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi | 6 +++--- arch/arm/boot/dts/imx6dl-riotboard.dts | 4 ++-- arch/arm/boot/dts/imx6dl-yapp4-common.dtsi | 6 +++--- arch/arm/boot/dts/imx6q-gw5400-a.dts | 6 +++--- arch/arm/boot/dts/imx6q-h100.dts | 6 +++--- arch/arm/boot/dts/imx6q-kp.dtsi | 4 ++-- arch/arm/boot/dts/imx6q-marsboard.dts | 4 ++-- arch/arm/boot/dts/imx6q-tbs2910.dts | 2 +- arch/arm/boot/dts/imx6qdl-emcon.dtsi | 4 ++-- arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 4 ++-- arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 6 +++--- arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 6 +++--- arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 6 +++--- arch/arm/boot/dts/imx6qdl-gw551x.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 6 +++--- arch/arm/boot/dts/imx6qdl-gw553x.dtsi | 4 ++-- arch/arm/boot/dts/imx6qdl-gw560x.dtsi | 6 +++--- arch/arm/boot/dts/imx6qdl-gw5903.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 6 +++--- arch/arm/boot/dts/imx6qdl-gw5907.dtsi | 4 ++-- arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 6 +++--- arch/arm/boot/dts/imx6qdl-gw5912.dtsi | 6 +++--- arch/arm/boot/dts/imx6qdl-gw5913.dtsi | 4 ++-- arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi | 10 +++++----- arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi | 4 ++-- arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi | 6 +++--- arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 4 ++-- arch/arm/boot/dts/imx6qdl-rex.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-ts7970.dtsi | 4 ++-- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 2 +- arch/arm/boot/dts/imx6sl-evk.dts | 2 +- arch/arm/boot/dts/imx6sll-evk.dts | 2 +- arch/arm/boot/dts/imx6sx-sabreauto.dts | 2 +- arch/arm/boot/dts/imx6sx-udoo-neo.dtsi | 4 ++-- arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 2 +- arch/arm/boot/dts/imx6ul-tx6ul.dtsi | 2 +- 44 files changed, 93 insertions(+), 93 deletions(-) diff --git a/arch/arm/boot/dts/imx50-kobo-aura.dts b/arch/arm/boot/dts/imx50-kobo-aura.dts index 51bf6117fb12..467db6b4ed7f 100644 --- a/arch/arm/boot/dts/imx50-kobo-aura.dts +++ b/arch/arm/boot/dts/imx50-kobo-aura.dts @@ -26,7 +26,7 @@ gpio-leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_leds>; - on { + led-on { label = "kobo_aura:orange:on"; gpios = <&gpio6 24 GPIO_ACTIVE_LOW>; panic-indicator; diff --git a/arch/arm/boot/dts/imx53-cx9020.dts b/arch/arm/boot/dts/imx53-cx9020.dts index cfb18849a92b..055d23a9aee7 100644 --- a/arch/arm/boot/dts/imx53-cx9020.dts +++ b/arch/arm/boot/dts/imx53-cx9020.dts @@ -86,27 +86,27 @@ tfp410_out: endpoint { leds { compatible = "gpio-leds"; - pwr-r { + led-pwr-r { gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - pwr-g { + led-pwr-g { gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; default-state = "on"; }; - pwr-b { + led-pwr-b { gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - sd1-b { + led-sd1-b { linux,default-trigger = "mmc0"; gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; }; - sd2-b { + led-sd2-b { linux,default-trigger = "mmc1"; gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts index a1a6228d1aa6..2bd2432d317f 100644 --- a/arch/arm/boot/dts/imx53-m53evk.dts +++ b/arch/arm/boot/dts/imx53-m53evk.dts @@ -52,13 +52,13 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&led_pin_gpio>; - user1 { + led-user1 { label = "user1"; gpios = <&gpio2 8 0>; linux,default-trigger = "heartbeat"; }; - user2 { + led-user2 { label = "user2"; gpios = <&gpio2 9 0>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/imx53-m53menlo.dts b/arch/arm/boot/dts/imx53-m53menlo.dts index d5c68d1ea707..4d77b6077fc1 100644 --- a/arch/arm/boot/dts/imx53-m53menlo.dts +++ b/arch/arm/boot/dts/imx53-m53menlo.dts @@ -34,19 +34,19 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; - user1 { + led-user1 { label = "TestLed601"; gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; }; - user2 { + led-user2 { label = "TestLed602"; gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; - eth { + led-eth { label = "EthLedYe"; gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; linux,default-trigger = "netdev"; diff --git a/arch/arm/boot/dts/imx53-tx53.dtsi b/arch/arm/boot/dts/imx53-tx53.dtsi index 892dd1a4bac3..a439a47fb65a 100644 --- a/arch/arm/boot/dts/imx53-tx53.dtsi +++ b/arch/arm/boot/dts/imx53-tx53.dtsi @@ -94,7 +94,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_stk5led>; - user { + led-user { label = "Heartbeat"; gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/imx53-usbarmory.dts b/arch/arm/boot/dts/imx53-usbarmory.dts index f34993a490ee..acc44010d510 100644 --- a/arch/arm/boot/dts/imx53-usbarmory.dts +++ b/arch/arm/boot/dts/imx53-usbarmory.dts @@ -67,7 +67,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; - user { + led-user { label = "LED"; gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi b/arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi index 337db29b0010..37697fac9dea 100644 --- a/arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi +++ b/arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi @@ -211,17 +211,17 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_q7_gpio1 &pinctrl_q7_gpio3 &pinctrl_q7_gpio5>; - alarm1 { + led-alarm1 { label = "alarm:red"; gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; }; - alarm2 { + led-alarm2 { label = "alarm:yellow"; gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>; }; - alarm3 { + led-alarm3 { label = "alarm:blue"; gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts index e7be05f205d3..24c7f535f63b 100644 --- a/arch/arm/boot/dts/imx6dl-riotboard.dts +++ b/arch/arm/boot/dts/imx6dl-riotboard.dts @@ -25,14 +25,14 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; default-state = "off"; diff --git a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi index 52162e8c7274..aacbf317feea 100644 --- a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi +++ b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi @@ -274,7 +274,7 @@ leds: led-controller@30 { #address-cells = <1>; #size-cells = <0>; - chan@0 { + led@0 { chan-name = "R"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; @@ -282,7 +282,7 @@ chan@0 { color = ; }; - chan@1 { + led@1 { chan-name = "G"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; @@ -290,7 +290,7 @@ chan@1 { color = ; }; - chan@2 { + led@2 { chan-name = "B"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts index e894faba571f..522a51042965 100644 --- a/arch/arm/boot/dts/imx6q-gw5400-a.dts +++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts @@ -34,20 +34,20 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* 106 -> MX6_PANLEDR */ default-state = "off"; }; - led2: user3 { + led2: led-user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* 111 -> MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6q-h100.dts b/arch/arm/boot/dts/imx6q-h100.dts index b8feadbff967..6406ade14f57 100644 --- a/arch/arm/boot/dts/imx6q-h100.dts +++ b/arch/arm/boot/dts/imx6q-h100.dts @@ -76,19 +76,19 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_h100_leds>; - led0: power { + led0: led-power { label = "power"; gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; default-state = "on"; }; - led1: stream { + led1: led-stream { label = "stream"; gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; default-state = "off"; }; - led2: rec { + led2: led-rec { label = "rec"; gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; default-state = "off"; diff --git a/arch/arm/boot/dts/imx6q-kp.dtsi b/arch/arm/boot/dts/imx6q-kp.dtsi index 1ade0bff681d..5e0ed5560040 100644 --- a/arch/arm/boot/dts/imx6q-kp.dtsi +++ b/arch/arm/boot/dts/imx6q-kp.dtsi @@ -66,14 +66,14 @@ lcd_panel_in: endpoint { leds { compatible = "gpio-leds"; - green { + led-green { label = "led1"; gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; linux,default-trigger = "gpio"; default-state = "off"; }; - red { + led-red { label = "led0"; gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; linux,default-trigger = "gpio"; diff --git a/arch/arm/boot/dts/imx6q-marsboard.dts b/arch/arm/boot/dts/imx6q-marsboard.dts index cc1801002394..2c9961333b0a 100644 --- a/arch/arm/boot/dts/imx6q-marsboard.dts +++ b/arch/arm/boot/dts/imx6q-marsboard.dts @@ -73,14 +73,14 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; - user1 { + led-user1 { label = "imx6:green:user1"; gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; default-state = "off"; linux,default-trigger = "heartbeat"; }; - user2 { + led-user2 { label = "imx6:green:user2"; gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; default-state = "off"; diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts index 8daef65d5bb3..2f576e2ce73f 100644 --- a/arch/arm/boot/dts/imx6q-tbs2910.dts +++ b/arch/arm/boot/dts/imx6q-tbs2910.dts @@ -49,7 +49,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - blue { + led-blue { label = "blue_status_led"; gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; default-state = "keep"; diff --git a/arch/arm/boot/dts/imx6qdl-emcon.dtsi b/arch/arm/boot/dts/imx6qdl-emcon.dtsi index 7228b894a763..ee2dd75cead6 100644 --- a/arch/arm/boot/dts/imx6qdl-emcon.dtsi +++ b/arch/arm/boot/dts/imx6qdl-emcon.dtsi @@ -46,14 +46,14 @@ som_leds: leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_som_leds>; - green { + led-green { label = "som:green"; gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; default-state = "on"; }; - red { + led-red { label = "som:red"; gpios = <&gpio3 1 GPIO_ACTIVE_LOW>; default-state = "keep"; diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi index 069c27fab432..e75e1a5364b8 100644 --- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi @@ -71,14 +71,14 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi index 728810b9d677..47d9a8d08197 100644 --- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi @@ -80,20 +80,20 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; - led2: user3 { + led2: led-user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi index 6c0c109046d8..fb1d29abe099 100644 --- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi @@ -80,20 +80,20 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; - led2: user3 { + led2: led-user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi index a9b04f9f1c2b..4e20cb97058e 100644 --- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi @@ -81,20 +81,20 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; - led2: user3 { + led2: led-user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi index 435dec6338fe..0fa4b8eeddee 100644 --- a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi @@ -115,7 +115,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; default-state = "on"; diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi index 2e61102ae694..77ae611b817a 100644 --- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi @@ -72,20 +72,20 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; - led2: user3 { + led2: led-user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw553x.dtsi b/arch/arm/boot/dts/imx6qdl-gw553x.dtsi index 4662408b225a..7f16c602cc07 100644 --- a/arch/arm/boot/dts/imx6qdl-gw553x.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw553x.dtsi @@ -113,14 +113,14 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw560x.dtsi b/arch/arm/boot/dts/imx6qdl-gw560x.dtsi index 4bc4371e6bae..0c31a39d60be 100644 --- a/arch/arm/boot/dts/imx6qdl-gw560x.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw560x.dtsi @@ -139,20 +139,20 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; - led2: user3 { + led2: led-user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw5903.dtsi b/arch/arm/boot/dts/imx6qdl-gw5903.dtsi index 1fdb7ba630f1..a74cde050158 100644 --- a/arch/arm/boot/dts/imx6qdl-gw5903.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw5903.dtsi @@ -123,7 +123,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi index 612b6e068e28..9fc79af2bc9a 100644 --- a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi @@ -120,20 +120,20 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; - led2: user3 { + led2: led-user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw5907.dtsi b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi index fcd3bdfd6182..955a51226eda 100644 --- a/arch/arm/boot/dts/imx6qdl-gw5907.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi @@ -71,14 +71,14 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi index 6bb4855d13ce..218d6e667ed2 100644 --- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi @@ -74,20 +74,20 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; - led2: user3 { + led2: led-user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw5912.dtsi b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi index 0415bcb41640..40e235e315cc 100644 --- a/arch/arm/boot/dts/imx6qdl-gw5912.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi @@ -72,20 +72,20 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; - led2: user3 { + led2: led-user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-gw5913.dtsi b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi index 696427b487f0..82f47c295b08 100644 --- a/arch/arm/boot/dts/imx6qdl-gw5913.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi @@ -71,14 +71,14 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - led0: user1 { + led0: led-user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; - led1: user2 { + led1: led-user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi index a53a5d0766a5..6d4eab1942b9 100644 --- a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi @@ -85,31 +85,31 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_leds>; - j14-pin1 { + led-j14-pin1 { gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; retain-state-suspended; default-state = "off"; }; - j14-pin3 { + led-j14-pin3 { gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; retain-state-suspended; default-state = "off"; }; - j14-pins8-9 { + led-j14-pins8-9 { gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; retain-state-suspended; default-state = "off"; }; - j46-pin2 { + led-j46-pin2 { gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; retain-state-suspended; default-state = "off"; }; - j46-pin3 { + led-j46-pin3 { gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; retain-state-suspended; default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi index 57c21a01f126..81a9a302aec1 100644 --- a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi +++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi @@ -181,13 +181,13 @@ i2c3mux@1 { leds { compatible = "gpio-leds"; - speaker-enable { + led-speaker-enable { gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; retain-state-suspended; default-state = "off"; }; - ttymxc4-rs232 { + led-ttymxc4-rs232 { gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>; retain-state-suspended; default-state = "on"; diff --git a/arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi index 120d6e997a4c..1a599c294ab8 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi @@ -25,17 +25,17 @@ gpio_leds: leds { pinctrl-0 = <&pinctrl_gpioleds>; status = "disabled"; - red { + led-red { label = "phyboard-mira:red"; gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; }; - green { + led-green { label = "phyboard-mira:green"; gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; }; - blue { + led-blue { label = "phyboard-mira:blue"; gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi index 768bc0e3a2b3..80adb2a02cc9 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi @@ -47,12 +47,12 @@ gpio_leds: leds { pinctrl-0 = <&pinctrl_leds>; compatible = "gpio-leds"; - led_green: green { + led_green: led-green { label = "phyflex:green"; gpios = <&gpio1 30 0>; }; - led_red: red { + led_red: led-red { label = "phyflex:red"; gpios = <&gpio2 31 0>; }; diff --git a/arch/arm/boot/dts/imx6qdl-rex.dtsi b/arch/arm/boot/dts/imx6qdl-rex.dtsi index de514eb5aa99..f804ff95a6ad 100644 --- a/arch/arm/boot/dts/imx6qdl-rex.dtsi +++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi @@ -55,7 +55,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; - led0: usr { + led0: led-usr { label = "usr"; gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index eebcfe12142e..f79caa36f3d2 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -21,7 +21,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - user { + led-user { label = "debug"; gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 09f4c2fa3ad6..53b080c97f2d 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -130,7 +130,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - red { + led-red { gpios = <&gpio1 2 0>; default-state = "on"; }; diff --git a/arch/arm/boot/dts/imx6qdl-ts7970.dtsi b/arch/arm/boot/dts/imx6qdl-ts7970.dtsi index c096d25a6f5b..1e0a041e9f60 100644 --- a/arch/arm/boot/dts/imx6qdl-ts7970.dtsi +++ b/arch/arm/boot/dts/imx6qdl-ts7970.dtsi @@ -73,13 +73,13 @@ blue-led { default-state = "off"; }; - en-usb-5v { + en-usb-5v-led { label = "en-usb-5v"; gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; default-state = "on"; }; - sel_dc_usb { + sel-dc-usb-led { label = "sel_dc_usb"; gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; default-state = "off"; diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index f41f86a76ea9..a197bac95cba 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -92,7 +92,7 @@ power { leds { compatible = "gpio-leds"; - user_led: user { + user_led: led-user { label = "Heartbeat"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_user_led>; diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index f16c830f1e91..dc5d596c18db 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -33,7 +33,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; - user { + led-user { label = "debug"; gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/imx6sll-evk.dts b/arch/arm/boot/dts/imx6sll-evk.dts index 32b3d82fec53..269092ac881c 100644 --- a/arch/arm/boot/dts/imx6sll-evk.dts +++ b/arch/arm/boot/dts/imx6sll-evk.dts @@ -37,7 +37,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; - user { + led-user { label = "debug"; gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts index 83ee97252ff1..b0c27b9b0244 100644 --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts @@ -20,7 +20,7 @@ leds { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; - user { + led-user { label = "debug"; gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi index c84ea1fac5e9..725d0b5cb55f 100644 --- a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi +++ b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi @@ -15,14 +15,14 @@ chosen { leds { compatible = "gpio-leds"; - red { + led-red { label = "udoo-neo:red:mmc"; gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; default-state = "off"; linux,default-trigger = "mmc0"; }; - orange { + led-orange { label = "udoo-neo:orange:user"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; default-state = "keep"; diff --git a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi index 5168ed0ffec3..a3ea1b208462 100644 --- a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi +++ b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi @@ -30,7 +30,7 @@ gpio_leds_som: leds { pinctrl-0 = <&pinctrl_gpioleds_som>; compatible = "gpio-leds"; - phycore-green { + led-phycore-green { gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; diff --git a/arch/arm/boot/dts/imx6ul-tx6ul.dtsi b/arch/arm/boot/dts/imx6ul-tx6ul.dtsi index 15ee0275feaf..70cef5e817bd 100644 --- a/arch/arm/boot/dts/imx6ul-tx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul-tx6ul.dtsi @@ -131,7 +131,7 @@ ds1339: rtc@68 { leds { compatible = "gpio-leds"; - user_led: user { + user_led: led-user { label = "Heartbeat"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; From c585dde3c76569341681e265e28cbb75c64fd140 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 25 Nov 2022 15:42:23 +0100 Subject: [PATCH 08/29] ARM: dts: vf610: align LED node names with dtschema The node names should be generic and DT schema expects certain pattern. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm/boot/dts/vf610-bk4.dts | 2 +- arch/arm/boot/dts/vf610-zii-dev.dtsi | 2 +- arch/arm/boot/dts/vf610-zii-scu4-aib.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts index 551a4c3ff4fa..e4f691d601cc 100644 --- a/arch/arm/boot/dts/vf610-bk4.dts +++ b/arch/arm/boot/dts/vf610-bk4.dts @@ -38,7 +38,7 @@ leds { pinctrl-0 = <&pinctrl_gpio_leds>; /* LED D5 */ - led0: heartbeat { + led0: led-heartbeat { label = "heartbeat"; gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; default-state = "on"; diff --git a/arch/arm/boot/dts/vf610-zii-dev.dtsi b/arch/arm/boot/dts/vf610-zii-dev.dtsi index f8299f33a692..ce5e52896b19 100644 --- a/arch/arm/boot/dts/vf610-zii-dev.dtsi +++ b/arch/arm/boot/dts/vf610-zii-dev.dtsi @@ -59,7 +59,7 @@ gpio-leds { pinctrl-0 = <&pinctrl_leds_debug>; pinctrl-names = "default"; - debug { + led-debug { label = "zii:green:debug1"; gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/vf610-zii-scu4-aib.dts b/arch/arm/boot/dts/vf610-zii-scu4-aib.dts index 040a1f8b6130..7b3276cd470f 100644 --- a/arch/arm/boot/dts/vf610-zii-scu4-aib.dts +++ b/arch/arm/boot/dts/vf610-zii-scu4-aib.dts @@ -23,7 +23,7 @@ gpio-leds { pinctrl-0 = <&pinctrl_leds_debug>; pinctrl-names = "default"; - debug { + led-debug { label = "zii:green:debug1"; gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; From a5c75aa3a1538fdb5a8c6e56db20da2d1ab69d62 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Wed, 14 Dec 2022 17:38:17 +0100 Subject: [PATCH 09/29] ARM: dts: imxrt1050: increase mmc max-frequency property According to i.MXRT1050 Datasheet usdhc supports up to 200Mhz clock so let's increase max-frequency property to 200Mhz. Signed-off-by: Giulio Benetti Acked-by: Jesse Taube Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imxrt1050.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imxrt1050.dtsi b/arch/arm/boot/dts/imxrt1050.dtsi index 03e6a858a7be..852861558b47 100644 --- a/arch/arm/boot/dts/imxrt1050.dtsi +++ b/arch/arm/boot/dts/imxrt1050.dtsi @@ -93,7 +93,7 @@ usdhc1: mmc@402c0000 { bus-width = <4>; fsl,wp-controller; no-1-8-v; - max-frequency = <4000000>; + max-frequency = <200000000>; fsl,tuning-start-tap = <20>; fsl,tuning-step = <2>; status = "disabled"; From 4ac665df17696ab8f2453dd1cedc195774277ed7 Mon Sep 17 00:00:00 2001 From: Nikolaus Voss Date: Wed, 2 Nov 2022 15:27:19 +0100 Subject: [PATCH 10/29] ARM: dts: imx6qdl: use MAC-address from nvmem IMX6QDL has fuse locations specified for storing the MAC for the built-in ethernet (Table 5-8 in Reference Manual). Define the fuse location in ocotp and refer to them in fec-ethernet. If the cells are not flashed, the driver behavior is unchanged, i.e. other MAC sources will be probed and a random MAC will be used as a last resort. Signed-off-by: Nikolaus Voss Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index ff1e0173b39b..132eba70caeb 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -1053,6 +1053,8 @@ fec: ethernet@2188000 { <&clks IMX6QDL_CLK_ENET_REF>; clock-names = "ipg", "ahb", "ptp", "enet_out"; fsl,stop-mode = <&gpr 0x34 27>; + nvmem-cells = <&fec_mac_addr>; + nvmem-cell-names = "mac-address"; status = "disabled"; }; @@ -1186,6 +1188,10 @@ tempmon_calib: calib@38 { tempmon_temp_grade: temp-grade@20 { reg = <0x20 4>; }; + + fec_mac_addr: mac-addr@88 { + reg = <0x88 6>; + }; }; tzasc@21d0000 { /* TZASC1 */ From b0bb79339aa02933be07aaec150031776402f5f9 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 17 Dec 2022 02:08:49 +0100 Subject: [PATCH 11/29] ARM: dts: mxs: Drop dma-apb interrupt-names Drop "interrupt-names" property, since it is broken. The drivers/dma/mxs-dma.c in Linux kernel does not use it, the property contains duplicate array entries in existing DTs, and even malformed entries (gmpi, should have been gpmi). Get rid of that optional property altogether. Signed-off-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx23.dtsi | 2 -- arch/arm/boot/dts/imx28.dtsi | 8 -------- 2 files changed, 10 deletions(-) diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 7f4c602454a5..d19508c8f9ed 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -64,8 +64,6 @@ dma_apbh: dma-apbh@80004000 { reg = <0x80004000 0x2000>; interrupts = <0 14 20 0 13 13 13 13>; - interrupt-names = "empty", "ssp0", "ssp1", "empty", - "gpmi0", "gpmi1", "gpmi2", "gpmi3"; #dma-cells = <1>; dma-channels = <8>; clocks = <&clks 15>; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 130b4145af82..a8d3c3113e0f 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -85,10 +85,6 @@ dma_apbh: dma-apbh@80004000 { 88 88 88 88 88 88 88 88 87 86 0 0>; - interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3", - "gpmi0", "gmpi1", "gpmi2", "gmpi3", - "gpmi4", "gmpi5", "gpmi6", "gmpi7", - "hsadc", "lcdif", "empty", "empty"; #dma-cells = <1>; dma-channels = <16>; clocks = <&clks 25>; @@ -1001,10 +997,6 @@ dma_apbx: dma-apbx@80024000 { 80 81 68 69 70 71 72 73 74 75 76 77>; - interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty", - "saif0", "saif1", "i2c0", "i2c1", - "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx", - "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx"; #dma-cells = <1>; dma-channels = <16>; clocks = <&clks 26>; From 5dd1cf3a772421f688383b00dfaa927275aef682 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 17 Dec 2022 02:08:50 +0100 Subject: [PATCH 12/29] ARM: dts: imx6qdl: Drop dma-apb interrupt-names Drop "interrupt-names" property, since it is broken. The drivers/dma/mxs-dma.c in Linux kernel does not use it, the property contains duplicate array entries in existing DTs, and even malformed entries (gmpi, should have been gpmi). Get rid of that optional property altogether. Signed-off-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 132eba70caeb..41e08fa23cce 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -157,7 +157,6 @@ dma_apbh: dma-apbh@110000 { <0 13 IRQ_TYPE_LEVEL_HIGH>, <0 13 IRQ_TYPE_LEVEL_HIGH>, <0 13 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; #dma-cells = <1>; dma-channels = <4>; clocks = <&clks IMX6QDL_CLK_APBH_DMA>; From 16d194d200cd46c756a8fdc1f212940bc7781990 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 17 Dec 2022 02:08:51 +0100 Subject: [PATCH 13/29] ARM: dts: imx6sx: Drop dma-apb interrupt-names Drop "interrupt-names" property, since it is broken. The drivers/dma/mxs-dma.c in Linux kernel does not use it, the property contains duplicate array entries in existing DTs, and even malformed entries (gmpi, should have been gpmi). Get rid of that optional property altogether. Signed-off-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sx.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 80f5efd65c2f..93ac2380ca1e 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -216,7 +216,6 @@ dma_apbh: dma-apbh@1804000 { , , ; - interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; #dma-cells = <1>; dma-channels = <4>; clocks = <&clks IMX6SX_CLK_APBH_DMA>; From f97f635395ae760ba9825e649a47ed7db23ff232 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 17 Dec 2022 02:08:52 +0100 Subject: [PATCH 14/29] ARM: dts: imx6ul: Drop dma-apb interrupt-names Drop "interrupt-names" property, since it is broken. The drivers/dma/mxs-dma.c in Linux kernel does not use it, the property contains duplicate array entries in existing DTs, and even malformed entries (gmpi, should have been gpmi). Get rid of that optional property altogether. Signed-off-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 2b5996395701..f0a9139748b8 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -171,7 +171,6 @@ dma_apbh: dma-apbh@1804000 { <0 13 IRQ_TYPE_LEVEL_HIGH>, <0 13 IRQ_TYPE_LEVEL_HIGH>, <0 13 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; #dma-cells = <1>; dma-channels = <4>; clocks = <&clks IMX6UL_CLK_APBHDMA>; From 9928f0a9e7c0cee3360ca1442b4001d34ad67556 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 17 Dec 2022 02:08:53 +0100 Subject: [PATCH 15/29] ARM: dts: imx7s: Drop dma-apb interrupt-names Drop "interrupt-names" property, since it is broken. The drivers/dma/mxs-dma.c in Linux kernel does not use it, the property contains duplicate array entries in existing DTs, and even malformed entries (gmpi, should have been gpmi). Get rid of that optional property altogether. Signed-off-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7s.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 0fc9e6b8b05d..91a3ba79e525 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -1264,7 +1264,6 @@ dma_apbh: dma-apbh@33000000 { , , ; - interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; #dma-cells = <1>; dma-channels = <4>; clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>; From 0b8576d8440aa275ae2758a60982b177e8c54ec1 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Mon, 2 Jan 2023 02:44:25 +0200 Subject: [PATCH 16/29] ARM: dts: imx: Add support for SK-iMX53 board Add support for the StartKit sk-imx53 board, a simple development board with the iMX536A SoC. Tested and works: - UARTs - SPI - I2C - GPU - USB - uSD - NAND - Ethernet Not tested: - Display - VPU - capture Not yet working: - Sound Signed-off-by: Dmitry Baryshkov Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx53-sk-imx53.dts | 357 +++++++++++++++++++++++++++ 2 files changed, 358 insertions(+) create mode 100644 arch/arm/boot/dts/imx53-sk-imx53.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d08a3c450ce7..d20fd01a8d07 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -465,6 +465,7 @@ dtb-$(CONFIG_SOC_IMX53) += \ imx53-ppd.dtb \ imx53-qsb.dtb \ imx53-qsrb.dtb \ + imx53-sk-imx53.dtb \ imx53-smd.dtb \ imx53-tx53-x03x.dtb \ imx53-tx53-x13x.dtb \ diff --git a/arch/arm/boot/dts/imx53-sk-imx53.dts b/arch/arm/boot/dts/imx53-sk-imx53.dts new file mode 100644 index 000000000000..103e73176e47 --- /dev/null +++ b/arch/arm/boot/dts/imx53-sk-imx53.dts @@ -0,0 +1,357 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2023 Linaro Ltd. + +/dts-v1/; + +#include "imx53.dtsi" + +/ { + model = "StarterKit SK-iMX53 Board"; + compatible = "starterkit,sk-imx53", "fsl,imx53"; + + aliases { + /* + * iMX RTC is not battery powered on this board. + * Use the i2c RTC as rtc0. + */ + rtc0 = &rtc; + rtc1 = &srtc; + }; + + chosen { + stdout-path = &uart1; + }; + + memory@70000000 { + device_type = "memory"; + /* v2 had only 256 MB, v3 has 512 MB */ + reg = <0x70000000 0x20000000>; + }; + + reg_usb1_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb_otg_vbus: regulator-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + status = "okay"; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + cs-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + cs-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&esdhc1 { + cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; + fsl,wp-controller; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "rmii"; + phy-handle = <&phy0>; + mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */ + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + reg = <0>; + reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; + status = "okay"; + + tlv320aic23: codec@1a { + compatible = "ti,tlv320aic23"; + reg = <0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_codec>; + #sound-dai-cells = <0>; + }; + + rtc: rtc@68 { + compatible = "dallas,ds1338"; + reg = <0x68>; + }; +}; + +&iomuxc { + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x1e4 + MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x1e4 + MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x1e4 + MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x1e4 + >; + }; + + pinctrl_can1: can1grp { + fsl,pins = < + MX53_PAD_PATA_INTRQ__CAN1_TXCAN 0x1e4 + MX53_PAD_PATA_DIOR__CAN1_RXCAN 0x1e4 + >; + }; + + pinctrl_codec: codecgrp { + fsl,pins = < + MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4 + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX53_PAD_EIM_D16__ECSPI1_SCLK 0x1e4 + MX53_PAD_EIM_D17__ECSPI1_MISO 0x1e4 + MX53_PAD_EIM_D18__ECSPI1_MOSI 0x1e4 + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX53_PAD_CSI0_DAT9__ECSPI2_MOSI 0x1e4 + MX53_PAD_CSI0_DAT10__ECSPI2_MISO 0x1e4 + MX53_PAD_EIM_CS0__ECSPI2_SCLK 0x1e4 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 + MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 + MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 + MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 + MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 + MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 + MX53_PAD_EIM_DA14__GPIO3_14 0x1f0 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX53_PAD_FEC_MDC__FEC_MDC 0x1e4 + MX53_PAD_FEC_MDIO__FEC_MDIO 0x1e4 + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x1e4 + MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1e4 + MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x1e4 + MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x1e4 + MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x1e4 + MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x1c4 + MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x1e4 + MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x1e4 + MX53_PAD_GPIO_1__GPIO1_1 0x1c4 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4 + MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX53_PAD_KEY_ROW3__I2C2_SDA 0x400001e4 + MX53_PAD_EIM_EB2__I2C2_SCL 0x400001e4 + >; + }; + + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins = < + MX53_PAD_KEY_ROW3__GPIO4_13 0x1e4 + MX53_PAD_EIM_EB2__GPIO2_30 0x1e4 + >; + }; + + pinctrl_nand: nandgrp { + fsl,pins = < + MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4 + MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4 + MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4 + MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4 + MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0 + MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0 + MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4 + MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1 0x4 + MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2 0x4 + MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3 0x4 + MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4 + MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4 + MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4 + MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4 + MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4 + MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4 + MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4 + MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX53_PAD_GPIO_9__PWM1_PWMO 0x5 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 + MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX53_PAD_EIM_D24__UART3_TXD_MUX 0x1e4 + MX53_PAD_EIM_D25__UART3_RXD_MUX 0x1e4 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4 + MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4 + >; + }; +}; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; + nand-bus-width = <8>; + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "boot"; + reg = <0x00000000 0x00100000>; + read-only; + }; + + partition@100000 { + label = "u-boot"; + reg = <0x00100000 0x00100000>; + read-only; + }; + + partition@200000 { + label = "u-boot-env"; + reg = <0x00200000 0x00100000>; + read-only; + }; + + partition@1000000 { + label = "kernel-safe"; + reg = <0x01000000 0x00a00000>; + read-only; + }; + + partition@1a00000 { + label = "kernel"; + reg = <0x01a00000 0x005e0000>; + }; + + partition@2000000 { + label = "ubifs"; + reg = <0x02000000 0x0e000000>; + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&usbh1 { + vbus-supply = <®_usb1_vbus>; + phy_type = "utmi"; + disable-over-current; + status = "okay"; +}; + +&usbotg { + dr_mode = "peripheral"; + disable-over-current; + status = "okay"; +}; From 0bbca347f53451af7a2906343c92bce65d037ca4 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Tue, 3 Jan 2023 08:43:18 +0100 Subject: [PATCH 17/29] ARM: dts: tqma6ul + mba6ulx: Fix temperature sensor compatible Use the correct compatible 'nxp,se97b' as it is an SE97BTP chip. While at it, fix the node name according to device tree spec recommendations. The EEPROM is a separate node anyway. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul-tqma6ul-common.dtsi | 4 ++-- arch/arm/boot/dts/mba6ulx.dtsi | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/imx6ul-tqma6ul-common.dtsi b/arch/arm/boot/dts/imx6ul-tqma6ul-common.dtsi index eca94ed6451b..57e647fc3237 100644 --- a/arch/arm/boot/dts/imx6ul-tqma6ul-common.dtsi +++ b/arch/arm/boot/dts/imx6ul-tqma6ul-common.dtsi @@ -116,8 +116,8 @@ reg_vldo4: vldo4 { }; }; - jc42_1a: eeprom-temperature-sensor@1a { - compatible = "nxp,se97", "jedec,jc-42.4-temp"; + jc42_1a: eeprom-temperature@1a { + compatible = "nxp,se97b", "jedec,jc-42.4-temp"; reg = <0x1a>; }; diff --git a/arch/arm/boot/dts/mba6ulx.dtsi b/arch/arm/boot/dts/mba6ulx.dtsi index aac42df9ecf6..5bf831b072d6 100644 --- a/arch/arm/boot/dts/mba6ulx.dtsi +++ b/arch/arm/boot/dts/mba6ulx.dtsi @@ -226,7 +226,7 @@ tlv320aic32x4: audio-codec@18 { }; jc42: temperature-sensor@19 { - compatible = "nxp,se97", "jedec,jc-42.4-temp"; + compatible = "nxp,se97b", "jedec,jc-42.4-temp"; reg = <0x19>; }; From 1d14345b874af1ce78daf38ab9ac380a2d6b4885 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 16 Jun 2022 01:14:07 +0300 Subject: [PATCH 18/29] ARM: dts: freescale: Use new media bus type macros Now that a header exists with macros for the media interface bus-type values, replace hardcoding numerical constants with the corresponding macros in the DT sources. Signed-off-by: Laurent Pinchart Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul-14x14-evk.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi index c83e64a62d8a..7275a1366413 100644 --- a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi +++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi @@ -2,6 +2,8 @@ // // Copyright (C) 2015 Freescale Semiconductor, Inc. +#include + / { chosen { stdout-path = &uart1; @@ -170,7 +172,7 @@ &csi { port { parallel_from_ov5640: endpoint { remote-endpoint = <&ov5640_to_parallel>; - bus-type = <5>; /* Parallel bus */ + bus-type = ; }; }; }; From 5bd9ffed9e66a27f5b00f5f878f4cef0b981082c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 5 Jan 2023 15:41:45 +0100 Subject: [PATCH 19/29] ARM: dts: vfxxx: Swap SAI DMA order Swap the SAI dmas and dma-names to match the order documented in Documentation/devicetree/bindings/sound/fsl,sai.yaml No functional change. Signed-off-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/vfxxx.dtsi | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index d53f9c9db8bf..ff4479994b60 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -191,9 +191,8 @@ sai0: sai@4002f000 { <&clks VF610_CLK_SAI0_DIV>, <&clks 0>, <&clks 0>; clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dma-names = "tx", "rx"; - dmas = <&edma0 0 17>, - <&edma0 0 16>; + dma-names = "rx", "tx"; + dmas = <&edma0 0 16>, <&edma0 0 17>; status = "disabled"; }; @@ -205,9 +204,8 @@ sai1: sai@40030000 { <&clks VF610_CLK_SAI1_DIV>, <&clks 0>, <&clks 0>; clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dma-names = "tx", "rx"; - dmas = <&edma0 0 19>, - <&edma0 0 18>; + dma-names = "rx", "tx"; + dmas = <&edma0 0 18>, <&edma0 0 19>; status = "disabled"; }; @@ -219,9 +217,8 @@ sai2: sai@40031000 { <&clks VF610_CLK_SAI2_DIV>, <&clks 0>, <&clks 0>; clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dma-names = "tx", "rx"; - dmas = <&edma0 0 21>, - <&edma0 0 20>; + dma-names = "rx", "tx"; + dmas = <&edma0 0 20>, <&edma0 0 21>; status = "disabled"; }; @@ -233,9 +230,8 @@ sai3: sai@40032000 { <&clks VF610_CLK_SAI3_DIV>, <&clks 0>, <&clks 0>; clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dma-names = "tx", "rx"; - dmas = <&edma0 1 9>, - <&edma0 1 8>; + dma-names = "rx", "tx"; + dmas = <&edma0 1 8>, <&edma0 1 9>; status = "disabled"; }; From 9a1bee3fb7e2669eb321b600f3ca57f4f792fd38 Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Sat, 7 Jan 2023 13:36:21 +0100 Subject: [PATCH 20/29] ARM: dts: imx: e70k02: Add touchscreen Add the touchscreen now, since the driver is available. Signed-off-by: Andreas Kemnade Signed-off-by: Shawn Guo --- arch/arm/boot/dts/e70k02.dtsi | 11 ++++++++++- arch/arm/boot/dts/imx6sl-tolino-vision5.dts | 7 +++++++ arch/arm/boot/dts/imx6sll-kobo-librah2o.dts | 7 +++++++ 3 files changed, 24 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/e70k02.dtsi b/arch/arm/boot/dts/e70k02.dtsi index 27ef9a62b23c..ace3eb8a97b8 100644 --- a/arch/arm/boot/dts/e70k02.dtsi +++ b/arch/arm/boot/dts/e70k02.dtsi @@ -122,7 +122,16 @@ &i2c2 { clock-frequency = <100000>; status = "okay"; - /* TODO: CYTTSP5 touch controller at 0x24 */ + touchscreen@24 { + compatible = "cypress,tt21000"; + reg = <0x24>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cyttsp5_gpio>; + interrupt-parent = <&gpio4>; + interrupts = <24 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>; + vdd-supply = <&ldo5_reg>; + }; /* TODO: SY7636 PMIC for E Ink at 0x62 */ diff --git a/arch/arm/boot/dts/imx6sl-tolino-vision5.dts b/arch/arm/boot/dts/imx6sl-tolino-vision5.dts index ff6118df3946..6bc342035e2b 100644 --- a/arch/arm/boot/dts/imx6sl-tolino-vision5.dts +++ b/arch/arm/boot/dts/imx6sl-tolino-vision5.dts @@ -52,6 +52,13 @@ &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; + pinctrl_cyttsp5_gpio: cyttsp5-gpiogrp { + fsl,pins = < + MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x17059 /* TP_INT */ + MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x10059 /* TP_RST */ + >; + }; + pinctrl_gpio_keys: gpio-keysgrp { fsl,pins = < MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x17059 /* PWR_SW */ diff --git a/arch/arm/boot/dts/imx6sll-kobo-librah2o.dts b/arch/arm/boot/dts/imx6sll-kobo-librah2o.dts index a8b0e88064d9..7e4f38dd11e2 100644 --- a/arch/arm/boot/dts/imx6sll-kobo-librah2o.dts +++ b/arch/arm/boot/dts/imx6sll-kobo-librah2o.dts @@ -62,6 +62,13 @@ &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; + pinctrl_cyttsp5_gpio: cyttsp5-gpiogrp { + fsl,pins = < + MX6SLL_PAD_GPIO4_IO24__GPIO4_IO24 0x17059 /* TP_INT */ + MX6SLL_PAD_GPIO4_IO18__GPIO4_IO18 0x10059 /* TP_RST */ + >; + }; + pinctrl_gpio_keys: gpio-keysgrp { fsl,pins = < MX6SLL_PAD_GPIO4_IO25__GPIO4_IO25 0x17059 /* PWR_SW */ From 752ddcd291f30f71de747ce25c4ffe843ec6a380 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 9 Jan 2023 14:19:58 +0100 Subject: [PATCH 21/29] ARM: dts: colibri-imx6: improve wake-up with gpio key The pin GPIO2_IO22 externally pulls down, it is required to sequentially connect this pin (signal WAKE_MICO#) to +3v3 and then disconnect it to trigger a wakeup interrupt. Adding the flag GPIO_PULL_DOWN allows the system to be woken up just connecting the pin GPIO2_IO22 to +3v3. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi index f894d6907604..f69fee94a869 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -38,7 +38,7 @@ gpio-keys { wakeup { debounce-interval = <10>; - gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */ + gpios = <&gpio2 22 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* SODIMM 45 */ label = "Wake-Up"; linux,code = ; wakeup-source; From 800a4ea17eb86b1f2cfad9fd7a252a3803bc5264 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 9 Jan 2023 14:19:59 +0100 Subject: [PATCH 22/29] ARM: dts: colibri-imx6ull: improve wake-up with gpio key The pin GPIO5_IO01 externally pulls down, it is required to sequentially connect this pin (signal WAKE_MICO#) to +3v3 and then disconnect it to trigger a wakeup interrupt. Adding the flag GPIO_PULL_DOWN allows the system to be woken up just connecting the pin GPIO5_IO01 to +3v3. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ull-colibri.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 336ab2e0534c..368d11ae7a8a 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -53,7 +53,7 @@ gpio-keys { wakeup { debounce-interval = <10>; - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */ + gpios = <&gpio5 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* SODIMM 45 */ label = "Wake-Up"; linux,code = ; wakeup-source; From 6e19c001b15c01432e039f1bc70672ca3c7ce938 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 9 Jan 2023 14:20:00 +0100 Subject: [PATCH 23/29] ARM: dts: apalis/colibri-imx6/6ull/7: proper gpio-key node names The node names should be generic and DT schema expects certain pattern (e.g. starting with key/button/switch). Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 2 +- arch/arm/boot/dts/imx6ull-colibri.dtsi | 2 +- arch/arm/boot/dts/imx7-colibri.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index f912697bfdb3..4cc965277c52 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -41,7 +41,7 @@ gpio-keys { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; - wakeup { + key-wakeup { debounce-interval = <10>; gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; label = "Wake-Up"; diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi index f69fee94a869..570995707504 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -36,7 +36,7 @@ gpio-keys { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; - wakeup { + key-wakeup { debounce-interval = <10>; gpios = <&gpio2 22 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* SODIMM 45 */ label = "Wake-Up"; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 368d11ae7a8a..bf64ba84b358 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -51,7 +51,7 @@ gpio-keys { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_snvs_gpiokeys>; - wakeup { + key-wakeup { debounce-interval = <10>; gpios = <&gpio5 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* SODIMM 45 */ label = "Wake-Up"; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index f8b8372b6851..104580d51d74 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -39,7 +39,7 @@ gpio-keys { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpiokeys>; - wakeup { + key-wakeup { debounce-interval = <10>; gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* SODIMM 45 */ label = "Wake-Up"; From 22c0db9f9534bbf7e612c5ffe28313a649822418 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Tue, 17 Jan 2023 12:15:38 +0100 Subject: [PATCH 24/29] ARM: dts: ls1021a: Disable CAN nodes by default These are peripherals with external signals, so disable them by default. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/ls1021a.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 7c5510e34494..49c78c84cd5d 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -866,6 +866,7 @@ can0: can@2a70000 { clocks = <&clockgen 4 1>, <&clockgen 4 1>; clock-names = "ipg", "per"; big-endian; + status = "disabled"; }; can1: can@2a80000 { @@ -875,6 +876,7 @@ can1: can@2a80000 { clocks = <&clockgen 4 1>, <&clockgen 4 1>; clock-names = "ipg", "per"; big-endian; + status = "disabled"; }; can2: can@2a90000 { @@ -884,6 +886,7 @@ can2: can@2a90000 { clocks = <&clockgen 4 1>, <&clockgen 4 1>; clock-names = "ipg", "per"; big-endian; + status = "disabled"; }; can3: can@2aa0000 { @@ -893,6 +896,7 @@ can3: can@2aa0000 { clocks = <&clockgen 4 1>, <&clockgen 4 1>; clock-names = "ipg", "per"; big-endian; + status = "disabled"; }; ocram1: sram@10000000 { From 66bd7a309682db3812ff0680eec84c4a5672ed25 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 23 Jan 2023 16:15:54 +0100 Subject: [PATCH 25/29] ARM: dts: imx: use generic node name for rave-sp Use generic "mcu" node name for rave-sp node, as recommended by Devicetree specification. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx51-zii-rdu1.dts | 2 +- arch/arm/boot/dts/imx51-zii-scu2-mezz.dts | 2 +- arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 2 +- arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 2 +- arch/arm/boot/dts/imx7d-zii-rmu2.dts | 2 +- arch/arm/boot/dts/imx7d-zii-rpu2.dts | 2 +- arch/arm/boot/dts/vf610-zii-spb4.dts | 2 +- arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/imx51-zii-rdu1.dts b/arch/arm/boot/dts/imx51-zii-rdu1.dts index 3140f038aa98..e537e06e11d7 100644 --- a/arch/arm/boot/dts/imx51-zii-rdu1.dts +++ b/arch/arm/boot/dts/imx51-zii-rdu1.dts @@ -556,7 +556,7 @@ &uart3 { pinctrl-0 = <&pinctrl_uart3>; status = "okay"; - rave-sp { + mcu { compatible = "zii,rave-sp-rdu1"; current-speed = <38400>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/imx51-zii-scu2-mezz.dts b/arch/arm/boot/dts/imx51-zii-scu2-mezz.dts index aa91e5dde4b8..21dd3f7abd48 100644 --- a/arch/arm/boot/dts/imx51-zii-scu2-mezz.dts +++ b/arch/arm/boot/dts/imx51-zii-scu2-mezz.dts @@ -311,7 +311,7 @@ &uart3 { pinctrl-0 = <&pinctrl_uart3>; status = "okay"; - rave-sp { + mcu { compatible = "zii,rave-sp-mezz"; current-speed = <57600>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts index 875b10a7d674..9f857eb44bf7 100644 --- a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts +++ b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts @@ -319,7 +319,7 @@ &uart3 { pinctrl-0 = <&pinctrl_uart3>; status = "okay"; - rave-sp { + mcu { compatible = "zii,rave-sp-esb"; current-speed = <57600>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi index 525ff62b47f5..5bb47c79a4da 100644 --- a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +++ b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi @@ -277,7 +277,7 @@ &uart4 { pinctrl-0 = <&pinctrl_uart4>; status = "okay"; - rave-sp { + mcu { compatible = "zii,rave-sp-rdu2"; current-speed = <1000000>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/imx7d-zii-rmu2.dts b/arch/arm/boot/dts/imx7d-zii-rmu2.dts index 1c9f25848bf7..521493342fe9 100644 --- a/arch/arm/boot/dts/imx7d-zii-rmu2.dts +++ b/arch/arm/boot/dts/imx7d-zii-rmu2.dts @@ -204,7 +204,7 @@ &uart4 { assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; status = "okay"; - rave-sp { + mcu { compatible = "zii,rave-sp-rdu2"; current-speed = <1000000>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/imx7d-zii-rpu2.dts b/arch/arm/boot/dts/imx7d-zii-rpu2.dts index 9d29490ab4c9..decc19af3b83 100644 --- a/arch/arm/boot/dts/imx7d-zii-rpu2.dts +++ b/arch/arm/boot/dts/imx7d-zii-rpu2.dts @@ -607,7 +607,7 @@ &uart4 { assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; status = "okay"; - rave-sp { + mcu { compatible = "zii,rave-sp-rdu2"; current-speed = <1000000>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/vf610-zii-spb4.dts b/arch/arm/boot/dts/vf610-zii-spb4.dts index 6c6ec46fd015..180acb0795b9 100644 --- a/arch/arm/boot/dts/vf610-zii-spb4.dts +++ b/arch/arm/boot/dts/vf610-zii-spb4.dts @@ -241,7 +241,7 @@ &uart2 { pinctrl-0 = <&pinctrl_uart2>; status = "okay"; - rave-sp { + mcu { compatible = "zii,rave-sp-rdu2"; current-speed = <1000000>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts b/arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts index fe600ab2e4bd..20beaa8433b6 100644 --- a/arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts +++ b/arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts @@ -254,7 +254,7 @@ &uart1 { pinctrl-0 = <&pinctrl_uart1>; status = "okay"; - rave-sp { + mcu { compatible = "zii,rave-sp-rdu2"; current-speed = <1000000>; #address-cells = <1>; From 0e3e1946606a2919b1dda9967ab2e1c5af2fedd6 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Fri, 23 Dec 2022 11:04:33 +0800 Subject: [PATCH 26/29] ARM: dts: imx7s: correct iomuxc gpr mux controller cells Per binding doc reg-mux.yaml, the #mux-control-cells should be 1 Signed-off-by: Peng Fan Reviewed-by: Marco Felsch Fixes: 94a905a79f2c ("ARM: dts: imx7s: add multiplexer controls") Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7s.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 91a3ba79e525..efe2525b62fa 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -513,7 +513,7 @@ gpr: iomuxc-gpr@30340000 { mux: mux-controller { compatible = "mmio-mux"; - #mux-control-cells = <0>; + #mux-control-cells = <1>; mux-reg-masks = <0x14 0x00000010>; }; From 611b6c891e403b099d39717afa3d098712b58473 Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Sun, 22 Jan 2023 17:20:11 +0100 Subject: [PATCH 27/29] ARM: dts: imx6ull-dhcom: Add DH electronics DHCOM i.MX6ULL SoM and PDK2 board Add support for DH electronics DHCOM SoM and PDK2 rev. 400 carrier board. This is an SoM with i.MX6ULL and an evaluation kit. The baseboard provides Ethernet, UART, USB, CAN and optional display. Signed-off-by: Christoph Niedermaier Reviewed-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6ull-dhcom-pdk2.dts | 222 ++++++++ arch/arm/boot/dts/imx6ull-dhcom-som.dtsi | 633 +++++++++++++++++++++++ arch/arm/boot/dts/imx6ull-dhcor-som.dtsi | 255 +++++++++ 4 files changed, 1111 insertions(+) create mode 100644 arch/arm/boot/dts/imx6ull-dhcom-pdk2.dts create mode 100644 arch/arm/boot/dts/imx6ull-dhcom-som.dtsi create mode 100644 arch/arm/boot/dts/imx6ull-dhcor-som.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d20fd01a8d07..707680e156b1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -741,6 +741,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ull-colibri-wifi-eval-v3.dtb \ imx6ull-colibri-wifi-iris.dtb \ imx6ull-colibri-wifi-iris-v2.dtb \ + imx6ull-dhcom-pdk2.dtb \ imx6ull-jozacp.dtb \ imx6ull-kontron-bl.dtb \ imx6ull-myir-mys-6ulx-eval.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-dhcom-pdk2.dts b/arch/arm/boot/dts/imx6ull-dhcom-pdk2.dts new file mode 100644 index 000000000000..b29713831a74 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-dhcom-pdk2.dts @@ -0,0 +1,222 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2023 DH electronics GmbH + * + * DHCOM iMX6ULL variant: + * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-RTC-WBT-ADC-I-01D2 + * DHCOR PCB number: 578-200 or newer + * DHCOM PCB number: 579-200 or newer + * PDK2 PCB number: 516-400 or newer + */ +/dts-v1/; + +#include "imx6ull-dhcom-som.dtsi" + +/ { + model = "DH electronics i.MX6ULL DHCOM on Premium Developer Kit (2)"; + compatible = "dh,imx6ull-dhcom-pdk2", "dh,imx6ull-dhcom-som", + "dh,imx6ull-dhcor-som", "fsl,imx6ull"; + + clk_ext_audio_codec: clock-codec { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + display_bl: display-bl { + compatible = "pwm-backlight"; + brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>; + default-brightness-level = <8>; + enable-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>; /* GPIO G */ + power-supply = <®_panel_3v3>; + pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-0 { + gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* GPIO A */ + label = "TA1-GPIO-A"; + linux,code = ; + wakeup-source; + }; + + button-1 { + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; /* GPIO B */ + label = "TA2-GPIO-B"; + linux,code = ; + wakeup-source; + }; + + button-2 { + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */ + label = "TA3-GPIO-C"; + linux,code = ; + wakeup-source; + }; + + button-3 { + gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; /* GPIO D */ + label = "TA4-GPIO-D"; + linux,code = ; + wakeup-source; + }; + }; + + led: led { + compatible = "gpio-leds"; + + /* + * Disable PDK2 LED5, because GPIO E is + * already used as touch interrupt. + */ + led-0 { + color = ; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <5>; /* PDK2 LED5 */ + gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>; /* GPIO E */ + status = "disabled"; + }; + + led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <6>; /* PDK2 LED6 */ + gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>; /* GPIO F */ + }; + + /* + * Disable PDK2 LED7, because GPIO H is + * already used for WiFi pin WL_REG_ON. + */ + led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <7>; /* PDK2 LED7 */ + gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; /* GPIO H */ + status = "disabled"; + }; + + /* + * Disable PDK2 LED8, because GPIO I is + * already used for BT pin BT_REG_ON. + */ + led-3 { + color = ; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <8>; /* PDK2 LED8 */ + gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; /* GPIO I */ + status = "disabled"; + }; + }; + + panel { + compatible = "edt,etm0700g0edh6"; + backlight = <&display_bl>; + power-supply = <®_panel_3v3>; + + port { + lcd_panel_in: endpoint { + remote-endpoint = <&lcd_display_out>; + }; + }; + }; + + /* Filtered supply voltage */ + reg_pdk2_24v: regulator-pdk2-24v { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <24000000>; + regulator-min-microvolt = <24000000>; + regulator-name = "24V_PDK2"; + }; + + /* PDK2 U35 */ + reg_pdk2_3v3: regulator-pdk2-3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "3V3_PDK2"; + vin-supply = <®_pdk2_24v>; + }; + + /* 560-200 U1 */ + reg_panel_3v3: regulator-panel-3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "3V3_PANEL"; + vin-supply = <®_pdk2_24v>; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,name = "sgtl5000"; + simple-audio-card,routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "LINE_IN", "Line In Jack", + "Headphone Jack", "HP_OUT"; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Line", "Line In Jack", + "Headphone", "Headphone Jack"; + + simple-audio-card,cpu { + sound-dai = <&sai2>; + }; + + dailink_master: simple-audio-card,codec { + clocks = <&clk_ext_audio_codec>; + sound-dai = <&sgtl5000>; + }; + }; +}; + +/* DHCOM I2C1 */ +&i2c2 { + sgtl5000: audio-codec@a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + #sound-dai-cells = <0>; + clocks = <&clk_ext_audio_codec>; + VDDA-supply = <®_pdk2_3v3>; + VDDIO-supply = <®_pdk2_3v3>; + }; + + touchscreen@38 { + compatible = "edt,edt-ft5406"; + reg = <0x38>; + interrupt-parent = <&gpio5>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */ + power-supply = <®_panel_3v3>; + }; +}; + +&lcdif { + status = "okay"; + + port { + lcd_display_out: endpoint { + remote-endpoint = <&lcd_panel_in>; + }; + }; +}; + +&pwm1 { + status = "okay"; +}; + +&sai2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-dhcom-som.dtsi b/arch/arm/boot/dts/imx6ull-dhcom-som.dtsi new file mode 100644 index 000000000000..17837663c0b0 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-dhcom-som.dtsi @@ -0,0 +1,633 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2023 DH electronics GmbH + */ + +#include "imx6ull-dhcor-som.dtsi" + +/ { + aliases { + /delete-property/ mmc0; /* Avoid double definitions */ + /delete-property/ mmc1; + /delete-property/ spi2; + /delete-property/ spi3; + i2c0 = &i2c2; + i2c1 = &i2c1; + mmc2 = &usdhc2; + rtc0 = &rtc_i2c; + rtc1 = &snvs_rtc; + serial0 = &uart1; + serial1 = &uart6; /* DHCOM UART2, special hardware required */ + serial2 = &uart3; + serial3 = &uart2; /* Use BT UART always as ttymxc3 */ + serial4 = &uart4; + serial5 = &uart5; + spi0 = &ecspi1; + spi1 = &ecspi4; /* DHCOM SPI2, special hardware required */ + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_ext_3v3_ref: regulator-ext-3v3-ref { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "VCC_3V3_REF"; + }; + + reg_usb_otg1_vbus: regulator-usb-otg1-vbus { + compatible = "regulator-fixed"; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb-otg1-vbus"; + }; + + reg_usb_otg2_vbus: regulator-usb-otg2-vbus { + compatible = "regulator-fixed"; + gpio = <&gpio1 5 GPIO_ACTIVE_LOW>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb-otg2-vbus"; + }; + + /* SoM with WiFi/BT: WiFi pin WL_REG_ON is connected to a DHCOM GPIO */ + /omit-if-no-ref/ usdhc1_pwrseq: usdhc1-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; /* GPIO H */ + }; +}; + +/* SoM with WiFi/BT: BT pin BT_REG_ON is connected to a DHCOM GPIO */ +&bluetooth { + shutdown-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; /* GPIO I */ +}; + +&can1 { + pinctrl-0 = <&pinctrl_flexcan1>; + pinctrl-names = "default"; + status = "okay"; +}; + +/* + * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins. + * Only if this pins are used as CAN interface enable it on board layer. + */ +&can2 { + pinctrl-0 = <&pinctrl_flexcan2>; + pinctrl-names = "default"; +}; + +/* DHCOM SPI1 */ +&ecspi1 { + cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinctrl_ecspi1>; + pinctrl-names = "default"; + status = "okay"; +}; + +/* + * DHCOM SPI2 + * Special hardware required that uses the pins of FEC2. Therefore this SPI + * interface can only be used if FEC2 is disabled. + */ +&ecspi4 { + cs-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinctrl_ecspi4>; + pinctrl-names = "default"; +}; + +/* DHCOM ETH1 */ +&fec1 { + phy-handle = <&mdio2_phy0>; + phy-mode = "rmii"; + pinctrl-0 = <&pinctrl_fec1>; + pinctrl-names = "default"; + status = "okay"; +}; + +/* DHCOM ETH2 */ +&fec2 { + phy-handle = <&mdio2_phy1>; + phy-mode = "rmii"; + pinctrl-0 = <&pinctrl_fec2>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + mdio2_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id0007.c0f0", /* SMSC LAN8710Ai */ + "ethernet-phy-ieee802.3-c22"; + reg = <0>; + clock-names = "rmii-ref"; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + interrupt-parent = <&gpio5>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&pinctrl_fec1_phy &pinctrl_snvs_fec1_phy>; + pinctrl-names = "default"; + reset-assert-us = <500>; + reset-deassert-us = <500>; + reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + smsc,disable-energy-detect; /* Make plugin detection reliable */ + }; + + mdio2_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id0007.c0f0", /* SMSC LAN8710Ai */ + "ethernet-phy-ieee802.3-c22"; + reg = <1>; + clock-names = "rmii-ref"; + clocks = <&clks IMX6UL_CLK_ENET2_REF>; + interrupt-parent = <&gpio5>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&pinctrl_fec2_phy &pinctrl_snvs_fec2_phy>; + pinctrl-names = "default"; + reset-assert-us = <500>; + reset-deassert-us = <500>; + reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; + smsc,disable-energy-detect; /* Make plugin detection reliable */ + }; + }; +}; + +&gpio1 { + gpio-line-names = + "", "", "", "", + "", "", "", "", + "", "", "", "DHCOM-INT", + "", "", "", "", + "", "", "DHCOM-I", "", + "", "", "", "", + "", "", "", "", + "", "", "", ""; + pinctrl-0 = <&pinctrl_spi1_switch + &pinctrl_dhcom_i &pinctrl_dhcom_int>; + pinctrl-names = "default"; +}; + +&gpio4 { + gpio-line-names = + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "DHCOM-L", "DHCOM-K", "DHCOM-M", + "DHCOM-J", "DHCOM-U", "DHCOM-T", "DHCOM-S", + "DHCOM-R", "DHCOM-Q", "DHCOM-P", "DHCOM-O", + "DHCOM-N", "", "", ""; + pinctrl-0 = <&pinctrl_dhcom_j &pinctrl_dhcom_k + &pinctrl_dhcom_l &pinctrl_dhcom_m + &pinctrl_dhcom_n &pinctrl_dhcom_o + &pinctrl_dhcom_p &pinctrl_dhcom_q + &pinctrl_dhcom_r &pinctrl_dhcom_s + &pinctrl_dhcom_t &pinctrl_dhcom_u>; + pinctrl-names = "default"; +}; + +&gpio5 { + gpio-line-names = + "DHCOM-A", "DHCOM-B", "DHCOM-C", "DHCOM-D", + "DHCOM-E", "", "", "DHCOM-F", + "DHCOM-G", "DHCOM-H", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", ""; + pinctrl-0 = <&pinctrl_snvs_dhcom_a &pinctrl_snvs_dhcom_b + &pinctrl_snvs_dhcom_c &pinctrl_snvs_dhcom_d + &pinctrl_snvs_dhcom_e &pinctrl_snvs_dhcom_f + &pinctrl_snvs_dhcom_g &pinctrl_snvs_dhcom_h>; + pinctrl-names = "default"; +}; + +/* DHCOM I2C2 */ +&i2c1 { + rtc_i2c: rtc@32 { + compatible = "microcrystal,rv8803"; + reg = <0x32>; + }; + + /* Microchip 24AA025E48T-I/OT containing MAC for DHCOM ETH1 */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + pagesize = <16>; + }; + + /* TI ADC101C027 */ + adc@51 { + compatible = "ti,adc101c"; + reg = <0x51>; + vref-supply = <®_ext_3v3_ref>; + }; + + /* TI ADC101C027 */ + adc@52 { + compatible = "ti,adc101c"; + reg = <0x52>; + vref-supply = <®_ext_3v3_ref>; + }; + + /* Microchip 24AA025E48T-I/OT containing MAC for DHCOM ETH2 */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + pagesize = <16>; + }; +}; + +/* DHCOM I2C1 */ +&i2c2 { + clock-frequency = <100000>; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + pinctrl-names = "default", "gpio"; + scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; +}; + +&lcdif { + pinctrl-0 = <&pinctrl_lcdif>; + pinctrl-names = "default"; +}; + +&pwm1 { + pinctrl-0 = <&pinctrl_pwm1>; + pinctrl-names = "default"; +}; + +&sai2 { + assigned-clock-rates = <320000000>; + assigned-clocks = <&clks IMX6UL_CLK_PLL3_PFD2>; + pinctrl-0 = <&pinctrl_sai2>; + pinctrl-names = "default"; +}; + +&tsc { + measure-delay-time = <0xffff>; + pinctrl-0 = <&pinctrl_tsc>; + pinctrl-names = "default"; + pre-charge-time = <0xfff>; + touchscreen-average-samples = <32>; + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; +}; + +/* DHCOM UART1 */ +&uart1 { + pinctrl-0 = <&pinctrl_uart1>; + pinctrl-names = "default"; + status = "okay"; +}; + +/* + * DHCOM UART2 (alternative) + * Special hardware required that uses DHCOM GPIO pins for DHCOM UART2. + * Therefore this UART interface can only be used if DHCOM GPIOs J/K/L/M are + * removed from GPIO hog muxing. + */ +&uart6 { + pinctrl-0 = <&pinctrl_uart6>; + pinctrl-names = "default"; + uart-has-rtscts; +}; + +&usbotg1 { + adp-disable; + disable-over-current; + dr_mode = "otg"; + hnp-disable; + pinctrl-0 = <&pinctrl_usbotg1>; + pinctrl-names = "default"; + srp-disable; + vbus-supply = <®_usb_otg1_vbus>; + status = "okay"; +}; + +&usbotg2 { + disable-over-current; /* Overcurrent pin is used for TSC */ + dr_mode = "host"; + pinctrl-0 = <&pinctrl_usbotg2>; + pinctrl-names = "default"; + tpl-support; + vbus-supply = <®_usb_otg2_vbus>; + status = "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal = <106>; +}; + +&usbphy2 { + fsl,tx-d-cal = <106>; +}; + +/* WiFi on LGA */ +&usdhc1 { + mmc-pwrseq = <&usdhc1_pwrseq>; +}; + +/* eMMC on module */ +&usdhc2 { + bus-width = <8>; + no-1-8-v; + non-removable; + pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-names = "default"; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_3v3>; + status = "okay"; +}; + +&iomuxc { + /* DHCOM GPIOs I..U + INT_HIGHEST_PRIORITY */ + pinctrl_dhcom_i: dhcom-i-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_j: dhcom-j-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_k: dhcom-k-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_l: dhcom-l-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_m: dhcom-m-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_n: dhcom-n-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_o: dhcom-o-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_p: dhcom-p-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_q: dhcom-q-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_r: dhcom-r-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_s: dhcom-s-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_t: dhcom-t-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_u: dhcom-u-grp { + fsl,pins = ; + }; + + pinctrl_dhcom_int: dhcom-int-grp { + fsl,pins = ; + }; + + pinctrl_ecspi1: ecspi1-grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x100b1 + MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x100b1 + MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x100b1 + MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x1b0b0 /* SS0 */ + >; + }; + + pinctrl_ecspi4: ecspi4-grp { + fsl,pins = < + MX6UL_PAD_ENET2_TX_CLK__ECSPI4_MISO 0x100b1 + MX6UL_PAD_ENET2_TX_EN__ECSPI4_MOSI 0x100b1 + MX6UL_PAD_ENET2_TX_DATA1__ECSPI4_SCLK 0x100b1 + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* SS0 */ + >; + }; + + pinctrl_fec1: fec1-grp { + fsl,pins = < + /* FEC1 uses MDIO bus from FEC2 */ + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b010 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b010 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b010 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b010 + >; + }; + + pinctrl_fec1_phy: fec1-phy-grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0xb0 /* SMSC PHY reset */ + >; + }; + + pinctrl_fec2: fec2-grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b010 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b010 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b010 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b010 + >; + }; + + pinctrl_fec2_phy: fec2-phy-grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0xb0 /* SMSC PHY reset */ + >; + }; + + pinctrl_flexcan1: flexcan1-grp { + fsl,pins = < + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 + >; + }; + + pinctrl_flexcan2: flexcan2-grp { + fsl,pins = < + MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 + MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 + >; + }; + + pinctrl_i2c2: i2c2-grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2_gpio: i2c2-gpio-grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001b8b0 + >; + }; + + pinctrl_lcdif: lcdif-grp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + >; + }; + + pinctrl_pwm1: pwm1-grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + + pinctrl_sai2: sai2-grp { + fsl,pins = < + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0 + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0 + >; + }; + + pinctrl_tsc: tsc-grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 + >; + }; + + pinctrl_uart1: uart1-grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart6: uart6-grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1 + MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1 + MX6UL_PAD_CSI_VSYNC__UART6_DCE_RTS 0x1b0b1 + MX6UL_PAD_CSI_HSYNC__UART6_DCE_CTS 0x1b0b1 + >; + }; + + pinctrl_usbotg1: usbotg1-grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 + >; + }; + + pinctrl_usbotg2: usbotg2-grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x120b0 + >; + }; + + pinctrl_usdhc2: usdhc2-grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17059 /* SD2 Reset */ + >; + }; +}; + +&iomuxc_snvs { + /* DHCOM GPIOs A..H */ + pinctrl_snvs_dhcom_a: snvs-dhcom-a-grp { + fsl,pins = ; + }; + + pinctrl_snvs_dhcom_b: snvs-dhcom-b-grp { + fsl,pins = ; + }; + + pinctrl_snvs_dhcom_c: snvs-dhcom-c-grp { + fsl,pins = ; + }; + + pinctrl_snvs_dhcom_d: snvs-dhcom-d-grp { + fsl,pins = ; + }; + + pinctrl_snvs_dhcom_e: snvs-dhcom-e-grp { + fsl,pins = ; + }; + + pinctrl_snvs_dhcom_f: snvs-dhcom-f-grp { + fsl,pins = ; + }; + + pinctrl_snvs_dhcom_g: snvs-dhcom-g-grp { + fsl,pins = ; + }; + + pinctrl_snvs_dhcom_h: snvs-dhcom-h-grp { + fsl,pins = ; + }; + + pinctrl_snvs_fec1_phy: snvs-fec1-phy-grp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0xb1 /* SMSC PHY Int */ + >; + }; + + pinctrl_snvs_fec2_phy: snvs-fec2-phy-grp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0xb1 /* SMSC PHY Int */ + >; + }; +}; diff --git a/arch/arm/boot/dts/imx6ull-dhcor-som.dtsi b/arch/arm/boot/dts/imx6ull-dhcor-som.dtsi new file mode 100644 index 000000000000..5882c7565f64 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-dhcor-som.dtsi @@ -0,0 +1,255 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2023 DH electronics GmbH + */ + +#include +#include +#include +#include +#include +#include "imx6ull.dtsi" + +/ { + memory@80000000 { + /* Appropriate memory size will be filled by U-Boot */ + reg = <0x80000000 0>; + device_type = "memory"; + }; +}; + +&cpu0 { + /* + * Due to the design as a solderable SOM, there are no capacitors + * below the SoC, therefore higher voltages are required. + */ + operating-points = < + /* kHz uV */ + 900000 1275000 + 792000 1250000 /* Voltage increased */ + 528000 1175000 + 396000 1025000 + 198000 950000 + >; + fsl,soc-operating-points = < + /* KHz uV */ + 900000 1250000 + 792000 1250000 /* Voltage increased */ + 528000 1175000 + 396000 1175000 + 198000 1175000 + >; +}; + +&gpio1 { + pinctrl-0 = <&pinctrl_spi1_switch>; + pinctrl-names = "default"; + /* + * Pin SPI_BOOT_FLASH_EN (GPIO 1.9) is a switch for either using the + * DHCOM SPI1 interface or accessing the SPI bootflash. Both using + * ecspi1, but muxed to different pins. The DHCOM SPI1 interface uses + * the pins PAD_LCD_DATA21..23 and the SPI bootflash uses the pins + * PAD_CSI_DATA04..07. If the SPI bootflash is enabled the pins for + * DHCOM GPIOs N/O/P/Q/R/S/T/U aren't usable anymore, because they + * are used for the bus interface to the SPI bootflash. The GPIOs are + * disconnected by a buffer which is also controlled via the pin + * SPI_BOOT_FLASH_EN. Therefore the access to the bootflash is a + * special case and is disabled by setting GPIO 1.9 to high. + */ + spi1-switch-hog { + gpio-hog; + gpios = <9 0>; + output-high; + line-name = "spi1-switch"; + }; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + pinctrl-names = "default", "gpio"; + scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pmic@58 { + compatible = "dlg,da9061"; + reg = <0x58>; + + onkey { + compatible = "dlg,da9061-onkey", "dlg,da9062-onkey"; + status = "disabled"; + }; + + regulators { + vdd_soc_in_1v4: buck1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1400000>; + regulator-min-microvolt = <1400000>; + regulator-name = "vdd_soc_in_1v4"; + }; + + vcc_3v3: buck2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc_3v3"; + }; + + /* + * The current DRR3 memory can be supplied with a + * voltage of either 1.35V or 1.5V. For reasons of + * backward compatibility to only 1.5V DDR3 memory, + * the voltage is set to 1.5V. + */ + vcc_ddr_1v35: buck3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1500000>; + regulator-min-microvolt = <1500000>; + regulator-name = "vcc_ddr_1v35"; + }; + + vcc_2v5: ldo1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <2500000>; + regulator-min-microvolt = <2500000>; + regulator-name = "vcc_2v5"; + }; + + vdd_snvs_in_3v3: ldo2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vdd_snvs_in_3v3"; + }; + + vcc_1v8: ldo3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + }; + + vcc_1v2: ldo4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1200000>; + regulator-min-microvolt = <1200000>; + regulator-name = "vcc_1v2"; + }; + }; + + thermal { + compatible = "dlg,da9061-thermal", "dlg,da9062-thermal"; + status = "disabled"; + }; + + watchdog { + compatible = "dlg,da9061-watchdog", "dlg,da9062-watchdog"; + status = "disabled"; + }; + }; +}; + +&ocotp { + /* Don't get write access by default */ + read-only; +}; + +®_arm { + vin-supply = <&vdd_soc_in_1v4>; +}; + +®_soc { + vin-supply = <&vdd_soc_in_1v4>; +}; + +/* BT on LGA (BT_REG_ON is connected to LGA pin E1) */ +&uart2 { + pinctrl-0 = <&pinctrl_uart2>; + pinctrl-names = "default"; + uart-has-rtscts; + status = "okay"; + + /* + * Actually, the maximum speed of the chip is 4MBdps, but there are + * limitations that prevent this speed. It hasn't yet been figured out + * what the reason for this is. Currently, the maximum speed of 3MBdps + * can be used without any problems. If the limitation can be overcome, + * the speed can be increased accordingly. + */ + bluetooth: bluetooth { + compatible = "brcm,bcm43430a1-bt"; /* muRata 1DX */ + max-speed = <3000000>; + vbat-supply = <&vcc_3v3>; + vddio-supply = <&vcc_3v3>; + }; +}; + +/* WiFi on LGA (WL_REG_ON is connected to LGA pin E3) */ +&usdhc1 { + #address-cells = <1>; + #size-cells = <0>; + bus-width = <4>; + no-1-8-v; + non-removable; + keep-power-in-suspend; + pinctrl-0 = <&pinctrl_usdhc1_wifi>; + pinctrl-names = "default"; + wakeup-source; + status = "okay"; + + brcmf: wifi@1 { + compatible = "brcm,bcm43430a1-fmac", "brcm,bcm4329-fmac"; /* muRata 1DX */ + reg = <1>; + }; +}; + +&iomuxc { + pinctrl_i2c1: i2c1-grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0 + >; + }; + + pinctrl_spi1_switch: spi1-switch-grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x120b0 /* SPI_BOOT_FLASH_EN */ + >; + }; + + pinctrl_uart2: uart2-grp { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 + MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1 + MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1 + >; + }; + + pinctrl_usdhc1_wifi: usdhc1-wifi-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x1b0b0 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10010 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x1b0b0 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x1b0b0 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x1b0b0 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x1b0b0 + >; + }; +}; From bae9847e120aee3a101fb3e42f9ac131d93351ac Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Sun, 22 Jan 2023 17:20:12 +0100 Subject: [PATCH 28/29] ARM: dts: imx6ull-dhcom: Add DHCOM based PicoITX board Add DT for DH PicoITX unit, which is a bare-bones carrier board for the DHCOM. The board has ethernet port, USB, CAN, LED and a custom board-to-board expansion connector. For this board a DHCOM i.MX6ULL SoM configuration without WiFi/BT is used. The interface is used for the SD card instead. Make this adjustment by using a separate DT include file. Signed-off-by: Christoph Niedermaier Reviewed-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6ull-dhcom-picoitx.dts | 101 ++++++++++++++++++ .../dts/imx6ull-dhcom-som-cfg-sdcard.dtsi | 97 +++++++++++++++++ 3 files changed, 199 insertions(+) create mode 100644 arch/arm/boot/dts/imx6ull-dhcom-picoitx.dts create mode 100644 arch/arm/boot/dts/imx6ull-dhcom-som-cfg-sdcard.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 707680e156b1..e0395da348fe 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -742,6 +742,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ull-colibri-wifi-iris.dtb \ imx6ull-colibri-wifi-iris-v2.dtb \ imx6ull-dhcom-pdk2.dtb \ + imx6ull-dhcom-picoitx.dtb \ imx6ull-jozacp.dtb \ imx6ull-kontron-bl.dtb \ imx6ull-myir-mys-6ulx-eval.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-dhcom-picoitx.dts b/arch/arm/boot/dts/imx6ull-dhcom-picoitx.dts new file mode 100644 index 000000000000..e4cc2223583a --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-dhcom-picoitx.dts @@ -0,0 +1,101 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2023 DH electronics GmbH + * + * DHCOM iMX6ULL variant: + * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-SD-RTC-ADC-I-01D2 + * DHCOR PCB number: 578-200 or newer + * DHCOM PCB number: 579-200 or newer + * PicoITX PCB number: 487-600 or newer + */ +/dts-v1/; + +#include "imx6ull-dhcom-som.dtsi" +#include "imx6ull-dhcom-som-cfg-sdcard.dtsi" + +/ { + model = "DH electronics i.MX6ULL DHCOM on PicoITX"; + compatible = "dh,imx6ull-dhcom-picoitx", "dh,imx6ull-dhcom-som", + "dh,imx6ull-dhcor-som", "fsl,imx6ull"; + + led { + compatible = "gpio-leds"; + + led-0 { + color = ; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */ + }; + }; +}; + +&fec1 { + phy-handle = <&mdio1_phy0>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + mdio1_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id0007.c0f0", /* SMSC LAN8710Ai */ + "ethernet-phy-ieee802.3-c22"; + reg = <0>; + clock-names = "rmii-ref"; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + interrupt-parent = <&gpio5>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&pinctrl_fec1_phy &pinctrl_snvs_fec1_phy>; + pinctrl-names = "default"; + reset-assert-us = <500>; + reset-deassert-us = <500>; + reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + smsc,disable-energy-detect; /* Make plugin detection reliable */ + }; + }; +}; + +&fec2 { + status = "disabled"; +}; + +&gpio4 { + gpio-line-names = + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "PicoITX-HW2", "PicoITX-HW1", "DHCOM-M", + "PicoITX-HW0", "DHCOM-U", "DHCOM-T", "DHCOM-S", + "DHCOM-R", "DHCOM-Q", "DHCOM-P", "DHCOM-O", + "DHCOM-N", "", "", ""; +}; + +&gpio5 { + gpio-line-names = + "DHCOM-A", "DHCOM-B", "PicoITX-In2", "PicoITX-Out2", + "PicoITX-In1", "", "", "PicoITX-Out1", + "DHCOM-G", "DHCOM-H", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&iomuxc { + pinctrl_fec1: fec1-grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b010 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b010 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b010 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b010 + >; + }; +}; diff --git a/arch/arm/boot/dts/imx6ull-dhcom-som-cfg-sdcard.dtsi b/arch/arm/boot/dts/imx6ull-dhcom-som-cfg-sdcard.dtsi new file mode 100644 index 000000000000..040421f9c970 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-dhcom-som-cfg-sdcard.dtsi @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2023 DH electronics GmbH + */ + +/* + * Special SoM configuration: SD card + * + * Enabled: Micro SD card on module or + * external SD card via DHCOM depends on hardware variant + * GPIO H and GPIO I will be available + * DHCOM UART2 will be available + * Disabled: WiFi and BT + */ + +/* + * To use usdhc1 as SD card, the WiFi node must be deleted. + * BT is also not available, so remove BT from the UART node. + */ +/delete-node/ &brcmf; +/delete-node/ &bluetooth; + +/ { + aliases { + mmc1 = &usdhc1; + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + serial3 = &uart4; + serial4 = &uart5; + serial5 = &uart6; + }; + + reg_sd1_vmmc: regulator-sd1-vmmc { + compatible = "regulator-fixed"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "VSD_3V3"; + }; +}; + +/* Micro SD card on module or external SD card via DHCOM */ +&usdhc1 { + /delete-property/ #address-cells; + /delete-property/ #size-cells; + /delete-property/ keep-power-in-suspend; + /delete-property/ mmc-pwrseq; + /delete-property/ non-removable; + /delete-property/ wakeup-source; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + no-1-8-v; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + vmmc-supply = <®_sd1_vmmc>; + status = "okay"; +}; + +&iomuxc { + pinctrl_usdhc1: usdhc1-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x120b0 /* SD1 CD */ + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x120b0 /* SD1 CD */ + + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x120b0 /* SD1 CD */ + >; + }; +}; From addaaf0a18b7964913a289f5933f618974a408b3 Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Sun, 22 Jan 2023 17:20:13 +0100 Subject: [PATCH 29/29] ARM: dts: imx6ull-dhcom: Add DHSOM based DRC02 board Add DT for DH DRC02 unit, which is a universal controller device. The system has two ethernet ports, two CANs, RS485 and RS232, USB, capacitive buttons and an OLED display. For this board a DHCOM i.MX6ULL SoM configuration without WiFi/BT is used. The interface is used for the SD card instead. Signed-off-by: Christoph Niedermaier Reviewed-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6ull-dhcom-drc02.dts | 99 +++++++++++++++++++++++ 2 files changed, 100 insertions(+) create mode 100644 arch/arm/boot/dts/imx6ull-dhcom-drc02.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e0395da348fe..195477b063e2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -741,6 +741,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ull-colibri-wifi-eval-v3.dtb \ imx6ull-colibri-wifi-iris.dtb \ imx6ull-colibri-wifi-iris-v2.dtb \ + imx6ull-dhcom-drc02.dtb \ imx6ull-dhcom-pdk2.dtb \ imx6ull-dhcom-picoitx.dtb \ imx6ull-jozacp.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-dhcom-drc02.dts b/arch/arm/boot/dts/imx6ull-dhcom-drc02.dts new file mode 100644 index 000000000000..b539975a872c --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-dhcom-drc02.dts @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2023 DH electronics GmbH + * + * DHCOM iMX6ULL variant: + * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-SD-RTC-ADC-I-01D2 + * DHCOR PCB number: 578-200 or newer + * DHCOM PCB number: 579-200 or newer + * DRC02 PCB number: 568-100 or newer (2nd ethernet by SoM) + */ +/dts-v1/; + +#include "imx6ull-dhcom-som.dtsi" +#include "imx6ull-dhcom-som-cfg-sdcard.dtsi" + +/ { + model = "DH electronics i.MX6ULL DHCOM on DRC02"; + compatible = "dh,imx6ull-dhcom-drc02", "dh,imx6ull-dhcom-som", + "dh,imx6ull-dhcor-som", "fsl,imx6ull"; +}; + +/* + * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins. + * Therefore the UART RTS/CTS must be output on other DHCOM pins, see uart1 + * node below. + */ +&can2 { + status = "okay"; +}; + +&gpio1 { + gpio-line-names = + "", "", "", "", + "", "", "", "", + "", "", "", "DRC02-In2", + "", "", "", "", + "", "", "DHCOM-I", "", + "", "", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "DRC02-HW0", "DRC02-HW1", "DHCOM-M", + "DRC02-HW2", "DHCOM-U", "DHCOM-T", "DHCOM-S", + "DHCOM-R", "DHCOM-Q", "DHCOM-P", "DHCOM-O", + "DHCOM-N", "", "", ""; + /* + * NOTE: On DRC02, the RS485_RX_En is controlled by a separate + * GPIO line, however the i.MX6ULL UART driver assumes RX happens + * during TX anyway and that it only controls drive enable DE + * line. Hence, the RX is always enabled here. + */ + rs485-rx-en-hog { + gpio-hog; + gpios = <25 0>; /* GPIO Q */ + line-name = "rs485-rx-en"; + output-low; + }; +}; + +&gpio5 { + gpio-line-names = + "DHCOM-A", "DHCOM-B", "DHCOM-C", "DRC02-Out2", + "DHCOM-E", "", "", "DRC02-Out1", + "DRC02-In1", "DHCOM-H", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", ""; +}; + +/* DHCOM I2C2 */ +&i2c1 { + eeprom@56 { + compatible = "atmel,24c04"; + reg = <0x56>; + pagesize = <16>; + }; +}; + +&uart1 { + /delete-property/ uart-has-rtscts; + rts-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; /* GPIO I */ + cts-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; /* GPIO M */ +}; + +/* Use UART as RS485 */ +&uart2 { + /delete-property/ uart-has-rtscts; + linux,rs485-enabled-at-boot-time; + rts-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* GPIO P */ +};