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arm64: dts: exynosautov9: Add dpum SysMMU

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Add System Memory Management Unit(SysMMU) for dpum also called iommu.

This sysmmu is version 7.4, which has same functionality as exynos850.

DPUM has 4 dma channel, each channel is mapped to one iommu.

Signed-off-by: Kwanghoon Son <k.son@samsung.com>
Link: https://lore.kernel.org/r/20240819-add_sysmmu-v1-1-799c0f3f607f@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Kwanghoon Son
2024-08-19 16:55:45 +09:00
committed by Krzysztof Kozlowski
parent 1e6084cf69
commit 71e0b08ed2
1 changed files with 36 additions and 0 deletions
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36
arch/arm64/boot/dts/exynos/exynosautov9.dtsi
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@@ -261,6 +261,42 @@ cmu_dpum: clock-controller@18c00000 {
clock-names = "oscclk", "bus";
};
sysmmu_dpum_0: sysmmu@18c80000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x18c80000 0x10000>;
interrupts = <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_dpum CLK_GOUT_DPUM_SYSMMU_D0_CLK>;
clock-names = "sysmmu";
#iommu-cells = <0>;
};
sysmmu_dpum_1: sysmmu@18c90000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x18c90000 0x10000>;
interrupts = <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_dpum CLK_GOUT_DPUM_SYSMMU_D1_CLK>;
clock-names = "sysmmu";
#iommu-cells = <0>;
};
sysmmu_dpum_2: sysmmu@18ca0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x18ca0000 0x10000>;
interrupts = <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_dpum CLK_GOUT_DPUM_SYSMMU_D2_CLK>;
clock-names = "sysmmu";
#iommu-cells = <0>;
};
sysmmu_dpum_3: sysmmu@18cb0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x18cb0000 0x10000>;
interrupts = <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_dpum CLK_GOUT_DPUM_SYSMMU_D3_CLK>;
clock-names = "sysmmu";
#iommu-cells = <0>;
};
cmu_core: clock-controller@1b030000 {
compatible = "samsung,exynosautov9-cmu-core";
reg = <0x1b030000 0x8000>;