From f2b8f6a933576816058c819f13644cbbc9664121 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Wed, 1 Aug 2018 15:40:31 +0200 Subject: [PATCH 01/13] arm64: dts: meson-axg: add audio fifos Add TODDR and FRDDR audio fifos of the AXG SoC. These fifos are the capture and playback memory interfaces of audio subsystem of the AXG. Signed-off-by: Jerome Brunet Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 67 ++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index c518130e5ce7..32f6dcacc2bc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include / { compatible = "amlogic,meson-axg"; @@ -223,6 +224,72 @@ clkc_audio: clock-controller@0 { resets = <&reset RESET_AUDIO>; }; + toddr_a: audio-controller@100 { + compatible = "amlogic,axg-toddr"; + reg = <0x0 0x100 0x0 0x1c>; + #sound-dai-cells = <0>; + sound-name-prefix = "TODDR_A"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_TODDR_A>; + resets = <&arb AXG_ARB_TODDR_A>; + status = "disabled"; + }; + + toddr_b: audio-controller@140 { + compatible = "amlogic,axg-toddr"; + reg = <0x0 0x140 0x0 0x1c>; + #sound-dai-cells = <0>; + sound-name-prefix = "TODDR_B"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_TODDR_B>; + resets = <&arb AXG_ARB_TODDR_B>; + status = "disabled"; + }; + + toddr_c: audio-controller@180 { + compatible = "amlogic,axg-toddr"; + reg = <0x0 0x180 0x0 0x1c>; + #sound-dai-cells = <0>; + sound-name-prefix = "TODDR_C"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_TODDR_C>; + resets = <&arb AXG_ARB_TODDR_C>; + status = "disabled"; + }; + + frddr_a: audio-controller@1c0 { + compatible = "amlogic,axg-frddr"; + reg = <0x0 0x1c0 0x0 0x1c>; + #sound-dai-cells = <0>; + sound-name-prefix = "FRDDR_A"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; + resets = <&arb AXG_ARB_FRDDR_A>; + status = "disabled"; + }; + + frddr_b: audio-controller@200 { + compatible = "amlogic,axg-frddr"; + reg = <0x0 0x200 0x0 0x1c>; + #sound-dai-cells = <0>; + sound-name-prefix = "FRDDR_B"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; + resets = <&arb AXG_ARB_FRDDR_B>; + status = "disabled"; + }; + + frddr_c: audio-controller@240 { + compatible = "amlogic,axg-frddr"; + reg = <0x0 0x240 0x0 0x1c>; + #sound-dai-cells = <0>; + sound-name-prefix = "FRDDR_C"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; + resets = <&arb AXG_ARB_FRDDR_C>; + status = "disabled"; + }; + arb: reset-controller@280 { compatible = "amlogic,meson-axg-audio-arb"; reg = <0x0 0x280 0x0 0x4>; From a0ef1c1cc8b51d9eb6ceef2e4af0c8deea7be757 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Wed, 1 Aug 2018 15:40:32 +0200 Subject: [PATCH 02/13] arm64: dts: meson-axg: s400: enable audio devices Enable the audio devices on the s400. Signed-off-by: Jerome Brunet Signed-off-by: Kevin Hilman --- .../arm64/boot/dts/amlogic/meson-axg-s400.dts | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts index d5c01427a5ca..9f5d81c3ee29 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -226,6 +226,18 @@ eth_phy0: ethernet-phy@0 { }; }; +&frddr_a { + status = "okay"; +}; + +&frddr_b { + status = "okay"; +}; + +&frddr_c { + status = "okay"; +}; + &uart_A { status = "okay"; pinctrl-0 = <&uart_a_pins>; @@ -334,3 +346,63 @@ &saradc { status = "okay"; vref-supply = <&vddio_ao18>; }; + +&spdifout { + pinctrl-0 = <&spdif_out_a20_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tdmin_a { + status = "okay"; +}; + +&tdmin_b { + status = "okay"; +}; + +&tdmin_c { + status = "okay"; +}; + +&tdmin_lb { + status = "okay"; +}; + +&tdmout_c { + status = "okay"; +}; + +&tdmif_a { + pinctrl-0 = <&tdma_sclk_pins>, <&tdma_fs_pins>, + <&tdma_din0_pins>, <&tdma_dout0_x15_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tdmif_b { + pinctrl-0 = <&tdmb_sclk_pins>, <&tdmb_fs_pins>, + <&tdmb_din3_pins>, <&mclk_b_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tdmif_c { + pinctrl-0 = <&tdmc_sclk_pins>, <&tdmc_fs_pins>, + <&tdmc_din1_pins>, <&tdmc_dout2_pins>, + <&mclk_c_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&toddr_a { + status = "okay"; +}; + +&toddr_b { + status = "okay"; +}; + +&toddr_c { + status = "okay"; +}; From 6f59dc1afbb2e12b218206c03c974dc93dc7db19 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Wed, 1 Aug 2018 15:40:33 +0200 Subject: [PATCH 03/13] arm64: dts: meson-axg: s400: add sound card Add the sound card of the s400. With it the following interface should be working: * Lineout * Daugther card speaker 1 (same output as lineout) * Linein * SPDIF output Signed-off-by: Jerome Brunet Signed-off-by: Kevin Hilman --- .../arm64/boot/dts/amlogic/meson-axg-s400.dts | 108 ++++++++++++++++++ 1 file changed, 108 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts index 9f5d81c3ee29..d399078d1f0c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -204,6 +204,113 @@ spdif_dit: audio-codec@2 { status = "okay"; sound-name-prefix = "DIT"; }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "AXG-S400"; + audio-aux-devs = <&tdmin_a>, <&tdmin_b>, <&tdmin_c>, + <&tdmin_lb>, <&tdmout_c>; + audio-widgets = "Line", "Lineout", + "Line", "Linein", + "Speaker", "Speaker1 Left", + "Speaker", "Speaker1 Right"; + audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2", + "SPDIFOUT IN 0", "FRDDR_A OUT 3", + "TDMOUT_C IN 1", "FRDDR_B OUT 2", + "SPDIFOUT IN 1", "FRDDR_B OUT 3", + "TDMOUT_C IN 2", "FRDDR_C OUT 2", + "SPDIFOUT IN 2", "FRDDR_C OUT 3", + "TDM_C Playback", "TDMOUT_C OUT", + "TDMIN_A IN 2", "TDM_C Capture", + "TDMIN_A IN 5", "TDM_C Loopback", + "TDMIN_B IN 2", "TDM_C Capture", + "TDMIN_B IN 5", "TDM_C Loopback", + "TDMIN_C IN 2", "TDM_C Capture", + "TDMIN_C IN 5", "TDM_C Loopback", + "TDMIN_LB IN 2", "TDM_C Loopback", + "TDMIN_LB IN 5", "TDM_C Capture", + "TODDR_A IN 0", "TDMIN_A OUT", + "TODDR_B IN 0", "TDMIN_A OUT", + "TODDR_C IN 0", "TDMIN_A OUT", + "TODDR_A IN 1", "TDMIN_B OUT", + "TODDR_B IN 1", "TDMIN_B OUT", + "TODDR_C IN 1", "TDMIN_B OUT", + "TODDR_A IN 2", "TDMIN_C OUT", + "TODDR_B IN 2", "TDMIN_C OUT", + "TODDR_C IN 2", "TDMIN_C OUT", + "TODDR_A IN 6", "TDMIN_LB OUT", + "TODDR_B IN 6", "TDMIN_LB OUT", + "TODDR_C IN 6", "TDMIN_LB OUT", + "Lineout", "Lineout AOUTL", + "Lineout", "Lineout AOUTR", + "Speaker1 Left", "SPK1 OUT_A", + "Speaker1 Left", "SPK1 OUT_B", + "Speaker1 Right", "SPK1 OUT_C", + "Speaker1 Right", "SPK1 OUT_D", + "Linein AINL", "Linein", + "Linein AINR", "Linein"; + assigned-clocks = <&clkc CLKID_HIFI_PLL>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <589824000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link@0 { + sound-dai = <&frddr_a>; + }; + + dai-link@1 { + sound-dai = <&frddr_b>; + }; + + dai-link@2 { + sound-dai = <&frddr_c>; + }; + + dai-link@3 { + sound-dai = <&toddr_a>; + }; + + dai-link@4 { + sound-dai = <&toddr_b>; + }; + + dai-link@5 { + sound-dai = <&toddr_c>; + }; + + dai-link@6 { + sound-dai = <&tdmif_c>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-rx-mask-1 = <1 1>; + mclk-fs = <256>; + + codec@0 { + sound-dai = <&lineout>; + }; + + codec@1 { + sound-dai = <&speaker_amp1>; + }; + + codec@2 { + sound-dai = <&linein>; + }; + + }; + + dai-link@7 { + sound-dai = <&spdifout>; + + codec { + sound-dai = <&spdif_dit>; + }; + }; + }; }; ðmac { @@ -272,6 +379,7 @@ speaker_amp1: audio-codec@1b { PVDD_B-supply = <&main_12v>; PVDD_C-supply = <&main_12v>; PVDD_D-supply = <&main_12v>; + sound-name-prefix = "SPK1"; }; }; From 8c0cf40f06af01eb3e14b19ec29f384b5030a85e Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Wed, 29 Aug 2018 17:45:51 +0200 Subject: [PATCH 04/13] arm64: dts: meson-axg: sort nodes consistently Sort DT nodes by address when possible, by node node name otherwise. Signed-off-by: Jerome Brunet Signed-off-by: Kevin Hilman --- .../arm64/boot/dts/amlogic/meson-axg-s400.dts | 232 +- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 2226 ++++++++--------- 2 files changed, 1229 insertions(+), 1229 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts index d399078d1f0c..ff64c429d432 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -60,6 +60,37 @@ aliases { serial1 = &uart_A; }; + linein: audio-codec@0 { + #sound-dai-cells = <0>; + compatible = "everest,es7241"; + VDDA-supply = <&vcc_3v3>; + VDDP-supply = <&vcc_3v3>; + VDDD-supply = <&vcc_3v3>; + status = "okay"; + sound-name-prefix = "Linein"; + }; + + lineout: audio-codec@1 { + #sound-dai-cells = <0>; + compatible = "everest,es7154"; + VDD-supply = <&vcc_3v3>; + PVDD-supply = <&vcc_5v>; + status = "okay"; + sound-name-prefix = "Lineout"; + }; + + spdif_dit: audio-codec@2 { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + status = "okay"; + sound-name-prefix = "DIT"; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + main_12v: regulator-main_12v { compatible = "regulator-fixed"; regulator-name = "12V"; @@ -68,33 +99,6 @@ main_12v: regulator-main_12v { regulator-always-on; }; - vddio_boot: regulator-vddio_boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vddao_3v3>; - regulator-always-on; - }; - - vddao_3v3: regulator-vddao_3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&main_12v>; - regulator-always-on; - }; - - vddio_ao18: regulator-vddio_ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vddao_3v3>; - regulator-always-on; - }; - vcc_3v3: regulator-vcc_3v3 { compatible = "regulator-fixed"; regulator-name = "VCC_3V3"; @@ -115,6 +119,33 @@ vcc_5v: regulator-vcc_5v { enable-active-high; }; + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&main_12v>; + regulator-always-on; + }; + + vddio_ao18: regulator-vddio_ao18 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + usb_pwr: regulator-usb_pwr { compatible = "regulator-fixed"; regulator-name = "USB_PWR"; @@ -126,11 +157,6 @@ usb_pwr: regulator-usb_pwr { enable-active-high; }; - emmc_pwrseq: emmc-pwrseq { - compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; - }; - sdio_pwrseq: sdio-pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>; @@ -138,13 +164,6 @@ sdio_pwrseq: sdio-pwrseq { clock-names = "ext_clock"; }; - wifi32k: wifi32k { - compatible = "pwm-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */ - }; - speaker-leds { compatible = "gpio-leds"; @@ -179,32 +198,6 @@ aled6 { }; }; - linein: audio-codec@0 { - #sound-dai-cells = <0>; - compatible = "everest,es7241"; - VDDA-supply = <&vcc_3v3>; - VDDP-supply = <&vcc_3v3>; - VDDD-supply = <&vcc_3v3>; - status = "okay"; - sound-name-prefix = "Linein"; - }; - - lineout: audio-codec@1 { - #sound-dai-cells = <0>; - compatible = "everest,es7154"; - VDD-supply = <&vcc_3v3>; - PVDD-supply = <&vcc_5v>; - status = "okay"; - sound-name-prefix = "Lineout"; - }; - - spdif_dit: audio-codec@2 { - #sound-dai-cells = <0>; - compatible = "linux,spdif-dit"; - status = "okay"; - sound-name-prefix = "DIT"; - }; - sound { compatible = "amlogic,axg-sound-card"; model = "AXG-S400"; @@ -311,6 +304,13 @@ codec { }; }; }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */ + }; }; ðmac { @@ -345,18 +345,6 @@ &frddr_c { status = "okay"; }; -&uart_A { - status = "okay"; - pinctrl-0 = <&uart_a_pins>; - pinctrl-names = "default"; -}; - -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; -}; - &ir { status = "okay"; pinctrl-0 = <&remote_input_ao_pins>; @@ -403,24 +391,9 @@ &pwm_ab { pinctrl-names = "default"; }; -/* emmc storage */ -&sd_emmc_c { +&saradc { status = "okay"; - pinctrl-0 = <&emmc_pins>; - pinctrl-1 = <&emmc_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <8>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <180000000>; - non-removable; - disable-wp; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vddio_boot>; + vref-supply = <&vddio_ao18>; }; /* wifi module */ @@ -450,9 +423,24 @@ brcmf: wifi@1 { }; }; -&saradc { +/* emmc storage */ +&sd_emmc_c { status = "okay"; - vref-supply = <&vddio_ao18>; + pinctrl-0 = <&emmc_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <180000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; }; &spdifout { @@ -461,26 +449,6 @@ &spdifout { status = "okay"; }; -&tdmin_a { - status = "okay"; -}; - -&tdmin_b { - status = "okay"; -}; - -&tdmin_c { - status = "okay"; -}; - -&tdmin_lb { - status = "okay"; -}; - -&tdmout_c { - status = "okay"; -}; - &tdmif_a { pinctrl-0 = <&tdma_sclk_pins>, <&tdma_fs_pins>, <&tdma_din0_pins>, <&tdma_dout0_x15_pins>; @@ -503,6 +471,26 @@ &tdmif_c { status = "okay"; }; +&tdmin_a { + status = "okay"; +}; + +&tdmin_b { + status = "okay"; +}; + +&tdmin_c { + status = "okay"; +}; + +&tdmin_lb { + status = "okay"; +}; + +&tdmout_c { + status = "okay"; +}; + &toddr_a { status = "okay"; }; @@ -514,3 +502,15 @@ &toddr_b { &toddr_c { status = "okay"; }; + +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>; + pinctrl-names = "default"; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 32f6dcacc2bc..36be63d69e7f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -3,15 +3,15 @@ * Copyright (c) 2017 Amlogic, Inc. All rights reserved. */ -#include -#include -#include +#include #include #include -#include +#include #include -#include +#include +#include #include +#include / { compatible = "amlogic,meson-axg"; @@ -20,22 +20,53 @@ / { #address-cells = <2>; #size-cells = <2>; - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; + tdmif_a: audio-controller@0 { + compatible = "amlogic,axg-tdm-iface"; + #sound-dai-cells = <0>; + sound-name-prefix = "TDM_A"; + clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, + <&clkc_audio AUD_CLKID_MST_A_SCLK>, + <&clkc_audio AUD_CLKID_MST_A_LRCLK>; + clock-names = "mclk", "sclk", "lrclk"; + status = "disabled"; + }; - /* 16 MiB reserved for Hardware ROM Firmware */ - hwrom_reserved: hwrom@0 { - reg = <0x0 0x0 0x0 0x1000000>; - no-map; - }; + tdmif_b: audio-controller@1 { + compatible = "amlogic,axg-tdm-iface"; + #sound-dai-cells = <0>; + sound-name-prefix = "TDM_B"; + clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, + <&clkc_audio AUD_CLKID_MST_B_SCLK>, + <&clkc_audio AUD_CLKID_MST_B_LRCLK>; + clock-names = "mclk", "sclk", "lrclk"; + status = "disabled"; + }; - /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ - secmon_reserved: secmon@5000000 { - reg = <0x0 0x05000000 0x0 0x300000>; - no-map; - }; + tdmif_c: audio-controller@2 { + compatible = "amlogic,axg-tdm-iface"; + #sound-dai-cells = <0>; + sound-name-prefix = "TDM_C"; + clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, + <&clkc_audio AUD_CLKID_MST_C_SCLK>, + <&clkc_audio AUD_CLKID_MST_C_LRCLK>; + clock-names = "mclk", "sclk", "lrclk"; + status = "disabled"; + }; + + ao_alt_xtal: ao_alt_xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <32000000>; + clock-output-names = "ao_alt_xtal"; + #clock-cells = <0>; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; }; cpus { @@ -79,77 +110,27 @@ l2: l2-cache0 { }; }; - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - psci { compatible = "arm,psci-1.0"; method = "smc"; }; - tdmif_a: audio-controller@0 { - compatible = "amlogic,axg-tdm-iface"; - #sound-dai-cells = <0>; - sound-name-prefix = "TDM_A"; - clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, - <&clkc_audio AUD_CLKID_MST_A_SCLK>, - <&clkc_audio AUD_CLKID_MST_A_LRCLK>; - clock-names = "mclk", "sclk", "lrclk"; - status = "disabled"; - }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; - tdmif_b: audio-controller@1 { - compatible = "amlogic,axg-tdm-iface"; - #sound-dai-cells = <0>; - sound-name-prefix = "TDM_B"; - clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, - <&clkc_audio AUD_CLKID_MST_B_SCLK>, - <&clkc_audio AUD_CLKID_MST_B_LRCLK>; - clock-names = "mclk", "sclk", "lrclk"; - status = "disabled"; - }; + /* 16 MiB reserved for Hardware ROM Firmware */ + hwrom_reserved: hwrom@0 { + reg = <0x0 0x0 0x0 0x1000000>; + no-map; + }; - tdmif_c: audio-controller@2 { - compatible = "amlogic,axg-tdm-iface"; - #sound-dai-cells = <0>; - sound-name-prefix = "TDM_C"; - clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, - <&clkc_audio AUD_CLKID_MST_C_SCLK>, - <&clkc_audio AUD_CLKID_MST_C_LRCLK>; - clock-names = "mclk", "sclk", "lrclk"; - status = "disabled"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - }; - - xtal: xtal-clk { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xtal"; - #clock-cells = <0>; - }; - - ao_alt_xtal: ao_alt_xtal-clk { - compatible = "fixed-clock"; - clock-frequency = <32000000>; - clock-output-names = "ao_alt_xtal"; - #clock-cells = <0>; + /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon@5000000 { + reg = <0x0 0x05000000 0x0 0x300000>; + no-map; + }; }; soc { @@ -158,38 +139,839 @@ soc { #size-cells = <2>; ranges; - apb: apb@ffe00000 { + ethmac: ethernet@ff3f0000 { + compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; + reg = <0x0 0xff3f0000 0x0 0x10000 + 0x0 0xff634540 0x0 0x8>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clkc CLKID_ETH>, + <&clkc CLKID_FCLK_DIV2>, + <&clkc CLKID_MPLL2>; + clock-names = "stmmaceth", "clkin0", "clkin1"; + status = "disabled"; + }; + + periphs: bus@ff634000 { compatible = "simple-bus"; - reg = <0x0 0xffe00000 0x0 0x200000>; + reg = <0x0 0xff634000 0x0 0x2000>; #address-cells = <2>; #size-cells = <2>; - ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; + ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; - sd_emmc_b: sd@5000 { - compatible = "amlogic,meson-axg-mmc"; - reg = <0x0 0x5000 0x0 0x800>; - interrupts = ; - status = "disabled"; - clocks = <&clkc CLKID_SD_EMMC_B>, - <&clkc CLKID_SD_EMMC_B_CLK0>, - <&clkc CLKID_FCLK_DIV2>; - clock-names = "core", "clkin0", "clkin1"; - resets = <&reset RESET_SD_EMMC_B>; + hwrng: rng@18 { + compatible = "amlogic,meson-rng"; + reg = <0x0 0x18 0x0 0x4>; + clocks = <&clkc CLKID_RNG0>; + clock-names = "core"; }; - sd_emmc_c: mmc@7000 { - compatible = "amlogic,meson-axg-mmc"; - reg = <0x0 0x7000 0x0 0x800>; - interrupts = ; - status = "disabled"; - clocks = <&clkc CLKID_SD_EMMC_C>, - <&clkc CLKID_SD_EMMC_C_CLK0>, - <&clkc CLKID_FCLK_DIV2>; - clock-names = "core", "clkin0", "clkin1"; - resets = <&reset RESET_SD_EMMC_C>; + pinctrl_periphs: pinctrl@480 { + compatible = "amlogic,meson-axg-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio: bank@480 { + reg = <0x0 0x00480 0x0 0x40>, + <0x0 0x004e8 0x0 0x14>, + <0x0 0x00520 0x0 0x14>, + <0x0 0x00430 0x0 0x3c>; + reg-names = "mux", "pull", "pull-enable", "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_periphs 0 0 86>; + }; + + i2c0_pins: i2c0 { + mux { + groups = "i2c0_sck", + "i2c0_sda"; + function = "i2c0"; + }; + }; + + i2c1_x_pins: i2c1_x { + mux { + groups = "i2c1_sck_x", + "i2c1_sda_x"; + function = "i2c1"; + }; + }; + + i2c1_z_pins: i2c1_z { + mux { + groups = "i2c1_sck_z", + "i2c1_sda_z"; + function = "i2c1"; + }; + }; + + i2c2_a_pins: i2c2_a { + mux { + groups = "i2c2_sck_a", + "i2c2_sda_a"; + function = "i2c2"; + }; + }; + + i2c2_x_pins: i2c2_x { + mux { + groups = "i2c2_sck_x", + "i2c2_sda_x"; + function = "i2c2"; + }; + }; + + i2c3_a6_pins: i2c3_a6 { + mux { + groups = "i2c3_sda_a6", + "i2c3_sck_a7"; + function = "i2c3"; + }; + }; + + i2c3_a12_pins: i2c3_a12 { + mux { + groups = "i2c3_sda_a12", + "i2c3_sck_a13"; + function = "i2c3"; + }; + }; + + i2c3_a19_pins: i2c3_a19 { + mux { + groups = "i2c3_sda_a19", + "i2c3_sck_a20"; + function = "i2c3"; + }; + }; + + emmc_pins: emmc { + mux { + groups = "emmc_nand_d0", + "emmc_nand_d1", + "emmc_nand_d2", + "emmc_nand_d3", + "emmc_nand_d4", + "emmc_nand_d5", + "emmc_nand_d6", + "emmc_nand_d7", + "emmc_clk", + "emmc_cmd", + "emmc_ds"; + function = "emmc"; + }; + }; + + emmc_clk_gate_pins: emmc_clk_gate { + mux { + groups = "BOOT_8"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "BOOT_8"; + bias-pull-down; + }; + }; + + eth_rgmii_x_pins: eth-x-rgmii { + mux { + groups = "eth_mdio_x", + "eth_mdc_x", + "eth_rgmii_rx_clk_x", + "eth_rx_dv_x", + "eth_rxd0_x", + "eth_rxd1_x", + "eth_rxd2_rgmii", + "eth_rxd3_rgmii", + "eth_rgmii_tx_clk", + "eth_txen_x", + "eth_txd0_x", + "eth_txd1_x", + "eth_txd2_rgmii", + "eth_txd3_rgmii"; + function = "eth"; + }; + }; + + eth_rgmii_y_pins: eth-y-rgmii { + mux { + groups = "eth_mdio_y", + "eth_mdc_y", + "eth_rgmii_rx_clk_y", + "eth_rx_dv_y", + "eth_rxd0_y", + "eth_rxd1_y", + "eth_rxd2_rgmii", + "eth_rxd3_rgmii", + "eth_rgmii_tx_clk", + "eth_txen_y", + "eth_txd0_y", + "eth_txd1_y", + "eth_txd2_rgmii", + "eth_txd3_rgmii"; + function = "eth"; + }; + }; + + eth_rmii_x_pins: eth-x-rmii { + mux { + groups = "eth_mdio_x", + "eth_mdc_x", + "eth_rgmii_rx_clk_x", + "eth_rx_dv_x", + "eth_rxd0_x", + "eth_rxd1_x", + "eth_txen_x", + "eth_txd0_x", + "eth_txd1_x"; + function = "eth"; + }; + }; + + eth_rmii_y_pins: eth-y-rmii { + mux { + groups = "eth_mdio_y", + "eth_mdc_y", + "eth_rgmii_rx_clk_y", + "eth_rx_dv_y", + "eth_rxd0_y", + "eth_rxd1_y", + "eth_txen_y", + "eth_txd0_y", + "eth_txd1_y"; + function = "eth"; + }; + }; + + mclk_b_pins: mclk_b { + mux { + groups = "mclk_b"; + function = "mclk_b"; + }; + }; + + mclk_c_pins: mclk_c { + mux { + groups = "mclk_c"; + function = "mclk_c"; + }; + }; + + pdm_dclk_a14_pins: pdm_dclk_a14 { + mux { + groups = "pdm_dclk_a14"; + function = "pdm"; + }; + }; + + pdm_dclk_a19_pins: pdm_dclk_a19 { + mux { + groups = "pdm_dclk_a19"; + function = "pdm"; + }; + }; + + pdm_din0_pins: pdm_din0 { + mux { + groups = "pdm_din0"; + function = "pdm"; + }; + }; + + pdm_din1_pins: pdm_din1 { + mux { + groups = "pdm_din1"; + function = "pdm"; + }; + }; + + pdm_din2_pins: pdm_din2 { + mux { + groups = "pdm_din2"; + function = "pdm"; + }; + }; + + pdm_din3_pins: pdm_din3 { + mux { + groups = "pdm_din3"; + function = "pdm"; + }; + }; + + pwm_a_a_pins: pwm_a_a { + mux { + groups = "pwm_a_a"; + function = "pwm_a"; + }; + }; + + pwm_a_x18_pins: pwm_a_x18 { + mux { + groups = "pwm_a_x18"; + function = "pwm_a"; + }; + }; + + pwm_a_x20_pins: pwm_a_x20 { + mux { + groups = "pwm_a_x20"; + function = "pwm_a"; + }; + }; + + pwm_a_z_pins: pwm_a_z { + mux { + groups = "pwm_a_z"; + function = "pwm_a"; + }; + }; + + pwm_b_a_pins: pwm_b_a { + mux { + groups = "pwm_b_a"; + function = "pwm_b"; + }; + }; + + pwm_b_x_pins: pwm_b_x { + mux { + groups = "pwm_b_x"; + function = "pwm_b"; + }; + }; + + pwm_b_z_pins: pwm_b_z { + mux { + groups = "pwm_b_z"; + function = "pwm_b"; + }; + }; + + pwm_c_a_pins: pwm_c_a { + mux { + groups = "pwm_c_a"; + function = "pwm_c"; + }; + }; + + pwm_c_x10_pins: pwm_c_x10 { + mux { + groups = "pwm_c_x10"; + function = "pwm_c"; + }; + }; + + pwm_c_x17_pins: pwm_c_x17 { + mux { + groups = "pwm_c_x17"; + function = "pwm_c"; + }; + }; + + pwm_d_x11_pins: pwm_d_x11 { + mux { + groups = "pwm_d_x11"; + function = "pwm_d"; + }; + }; + + pwm_d_x16_pins: pwm_d_x16 { + mux { + groups = "pwm_d_x16"; + function = "pwm_d"; + }; + }; + + sdio_pins: sdio { + mux { + groups = "sdio_d0", + "sdio_d1", + "sdio_d2", + "sdio_d3", + "sdio_cmd", + "sdio_clk"; + function = "sdio"; + }; + }; + + sdio_clk_gate_pins: sdio_clk_gate { + mux { + groups = "GPIOX_4"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "GPIOX_4"; + bias-pull-down; + }; + }; + + spdif_in_z_pins: spdif_in_z { + mux { + groups = "spdif_in_z"; + function = "spdif_in"; + }; + }; + + spdif_in_a1_pins: spdif_in_a1 { + mux { + groups = "spdif_in_a1"; + function = "spdif_in"; + }; + }; + + spdif_in_a7_pins: spdif_in_a7 { + mux { + groups = "spdif_in_a7"; + function = "spdif_in"; + }; + }; + + spdif_in_a19_pins: spdif_in_a19 { + mux { + groups = "spdif_in_a19"; + function = "spdif_in"; + }; + }; + + spdif_in_a20_pins: spdif_in_a20 { + mux { + groups = "spdif_in_a20"; + function = "spdif_in"; + }; + }; + + spdif_out_a1_pins: spdif_out_a1 { + mux { + groups = "spdif_out_a1"; + function = "spdif_out"; + }; + }; + + spdif_out_a11_pins: spdif_out_a11 { + mux { + groups = "spdif_out_a11"; + function = "spdif_out"; + }; + }; + + spdif_out_a19_pins: spdif_out_a19 { + mux { + groups = "spdif_out_a19"; + function = "spdif_out"; + }; + }; + + spdif_out_a20_pins: spdif_out_a20 { + mux { + groups = "spdif_out_a20"; + function = "spdif_out"; + }; + }; + + spdif_out_z_pins: spdif_out_z { + mux { + groups = "spdif_out_z"; + function = "spdif_out"; + }; + }; + + spi0_pins: spi0 { + mux { + groups = "spi0_miso", + "spi0_mosi", + "spi0_clk"; + function = "spi0"; + }; + }; + + spi0_ss0_pins: spi0_ss0 { + mux { + groups = "spi0_ss0"; + function = "spi0"; + }; + }; + + spi0_ss1_pins: spi0_ss1 { + mux { + groups = "spi0_ss1"; + function = "spi0"; + }; + }; + + spi0_ss2_pins: spi0_ss2 { + mux { + groups = "spi0_ss2"; + function = "spi0"; + }; + }; + + spi1_a_pins: spi1_a { + mux { + groups = "spi1_miso_a", + "spi1_mosi_a", + "spi1_clk_a"; + function = "spi1"; + }; + }; + + spi1_ss0_a_pins: spi1_ss0_a { + mux { + groups = "spi1_ss0_a"; + function = "spi1"; + }; + }; + + spi1_ss1_pins: spi1_ss1 { + mux { + groups = "spi1_ss1"; + function = "spi1"; + }; + }; + + spi1_x_pins: spi1_x { + mux { + groups = "spi1_miso_x", + "spi1_mosi_x", + "spi1_clk_x"; + function = "spi1"; + }; + }; + + spi1_ss0_x_pins: spi1_ss0_x { + mux { + groups = "spi1_ss0_x"; + function = "spi1"; + }; + }; + + tdma_din0_pins: tdma_din0 { + mux { + groups = "tdma_din0"; + function = "tdma"; + }; + }; + + tdma_dout0_x14_pins: tdma_dout0_x14 { + mux { + groups = "tdma_dout0_x14"; + function = "tdma"; + }; + }; + + tdma_dout0_x15_pins: tdma_dout0_x15 { + mux { + groups = "tdma_dout0_x15"; + function = "tdma"; + }; + }; + + tdma_dout1_pins: tdma_dout1 { + mux { + groups = "tdma_dout1"; + function = "tdma"; + }; + }; + + tdma_din1_pins: tdma_din1 { + mux { + groups = "tdma_din1"; + function = "tdma"; + }; + }; + + tdma_fs_pins: tdma_fs { + mux { + groups = "tdma_fs"; + function = "tdma"; + }; + }; + + tdma_fs_slv_pins: tdma_fs_slv { + mux { + groups = "tdma_fs_slv"; + function = "tdma"; + }; + }; + + tdma_sclk_pins: tdma_sclk { + mux { + groups = "tdma_sclk"; + function = "tdma"; + }; + }; + + tdma_sclk_slv_pins: tdma_sclk_slv { + mux { + groups = "tdma_sclk_slv"; + function = "tdma"; + }; + }; + + tdmb_din0_pins: tdmb_din0 { + mux { + groups = "tdmb_din0"; + function = "tdmb"; + }; + }; + + tdmb_din1_pins: tdmb_din1 { + mux { + groups = "tdmb_din1"; + function = "tdmb"; + }; + }; + + tdmb_din2_pins: tdmb_din2 { + mux { + groups = "tdmb_din2"; + function = "tdmb"; + }; + }; + + tdmb_din3_pins: tdmb_din3 { + mux { + groups = "tdmb_din3"; + function = "tdmb"; + }; + }; + + tdmb_dout0_pins: tdmb_dout0 { + mux { + groups = "tdmb_dout0"; + function = "tdmb"; + }; + }; + + tdmb_dout1_pins: tdmb_dout1 { + mux { + groups = "tdmb_dout1"; + function = "tdmb"; + }; + }; + + tdmb_dout2_pins: tdmb_dout2 { + mux { + groups = "tdmb_dout2"; + function = "tdmb"; + }; + }; + + tdmb_dout3_pins: tdmb_dout3 { + mux { + groups = "tdmb_dout3"; + function = "tdmb"; + }; + }; + + tdmb_fs_pins: tdmb_fs { + mux { + groups = "tdmb_fs"; + function = "tdmb"; + }; + }; + + tdmb_fs_slv_pins: tdmb_fs_slv { + mux { + groups = "tdmb_fs_slv"; + function = "tdmb"; + }; + }; + + tdmb_sclk_pins: tdmb_sclk { + mux { + groups = "tdmb_sclk"; + function = "tdmb"; + }; + }; + + tdmb_sclk_slv_pins: tdmb_sclk_slv { + mux { + groups = "tdmb_sclk_slv"; + function = "tdmb"; + }; + }; + + tdmc_fs_pins: tdmc_fs { + mux { + groups = "tdmc_fs"; + function = "tdmc"; + }; + }; + + tdmc_fs_slv_pins: tdmc_fs_slv { + mux { + groups = "tdmc_fs_slv"; + function = "tdmc"; + }; + }; + + tdmc_sclk_pins: tdmc_sclk { + mux { + groups = "tdmc_sclk"; + function = "tdmc"; + }; + }; + + tdmc_sclk_slv_pins: tdmc_sclk_slv { + mux { + groups = "tdmc_sclk_slv"; + function = "tdmc"; + }; + }; + + tdmc_din0_pins: tdmc_din0 { + mux { + groups = "tdmc_din0"; + function = "tdmc"; + }; + }; + + tdmc_din1_pins: tdmc_din1 { + mux { + groups = "tdmc_din1"; + function = "tdmc"; + }; + }; + + tdmc_din2_pins: tdmc_din2 { + mux { + groups = "tdmc_din2"; + function = "tdmc"; + }; + }; + + tdmc_din3_pins: tdmc_din3 { + mux { + groups = "tdmc_din3"; + function = "tdmc"; + }; + }; + + tdmc_dout0_pins: tdmc_dout0 { + mux { + groups = "tdmc_dout0"; + function = "tdmc"; + }; + }; + + tdmc_dout1_pins: tdmc_dout1 { + mux { + groups = "tdmc_dout1"; + function = "tdmc"; + }; + }; + + tdmc_dout2_pins: tdmc_dout2 { + mux { + groups = "tdmc_dout2"; + function = "tdmc"; + }; + }; + + tdmc_dout3_pins: tdmc_dout3 { + mux { + groups = "tdmc_dout3"; + function = "tdmc"; + }; + }; + + uart_a_pins: uart_a { + mux { + groups = "uart_tx_a", + "uart_rx_a"; + function = "uart_a"; + }; + }; + + uart_a_cts_rts_pins: uart_a_cts_rts { + mux { + groups = "uart_cts_a", + "uart_rts_a"; + function = "uart_a"; + }; + }; + + uart_b_x_pins: uart_b_x { + mux { + groups = "uart_tx_b_x", + "uart_rx_b_x"; + function = "uart_b"; + }; + }; + + uart_b_x_cts_rts_pins: uart_b_x_cts_rts { + mux { + groups = "uart_cts_b_x", + "uart_rts_b_x"; + function = "uart_b"; + }; + }; + + uart_b_z_pins: uart_b_z { + mux { + groups = "uart_tx_b_z", + "uart_rx_b_z"; + function = "uart_b"; + }; + }; + + uart_b_z_cts_rts_pins: uart_b_z_cts_rts { + mux { + groups = "uart_cts_b_z", + "uart_rts_b_z"; + function = "uart_b"; + }; + }; + + uart_ao_b_z_pins: uart_ao_b_z { + mux { + groups = "uart_ao_tx_b_z", + "uart_ao_rx_b_z"; + function = "uart_ao_b_z"; + }; + }; + + uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts { + mux { + groups = "uart_ao_cts_b_z", + "uart_ao_rts_b_z"; + function = "uart_ao_b_z"; + }; + }; }; }; + hiubus: bus@ff63c000 { + compatible = "simple-bus"; + reg = <0x0 0xff63c000 0x0 0x1c00>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; + + sysctrl: system-controller@0 { + compatible = "amlogic,meson-axg-hhi-sysctrl", + "syscon", "simple-mfd"; + reg = <0 0 0 0x400>; + + clkc: clock-controller { + compatible = "amlogic,axg-clkc"; + #clock-cells = <1>; + }; + }; + }; + + mailbox: mailbox@ff63dc00 { + compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; + reg = <0 0xff63dc00 0 0x400>; + interrupts = , + , + ; + #mbox-cells = <1>; + }; + audio: bus@ff642000 { compatible = "simple-bus"; reg = <0x0 0xff642000 0x0 0x2000>; @@ -407,987 +1189,6 @@ tdmout_c: audio-controller@580 { }; }; - cbus: bus@ffd00000 { - compatible = "simple-bus"; - reg = <0x0 0xffd00000 0x0 0x25000>; - #address-cells = <2>; - #size-cells = <2>; - ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; - - gpio_intc: interrupt-controller@f080 { - compatible = "amlogic,meson-gpio-intc"; - reg = <0x0 0xf080 0x0 0x10>; - interrupt-controller; - #interrupt-cells = <2>; - amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; - status = "disabled"; - }; - - pwm_ab: pwm@1b000 { - compatible = "amlogic,meson-axg-ee-pwm"; - reg = <0x0 0x1b000 0x0 0x20>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm_cd: pwm@1a000 { - compatible = "amlogic,meson-axg-ee-pwm"; - reg = <0x0 0x1a000 0x0 0x20>; - #pwm-cells = <3>; - status = "disabled"; - }; - - reset: reset-controller@1004 { - compatible = "amlogic,meson-axg-reset"; - reg = <0x0 0x01004 0x0 0x9c>; - #reset-cells = <1>; - }; - - spicc0: spi@13000 { - compatible = "amlogic,meson-axg-spicc"; - reg = <0x0 0x13000 0x0 0x3c>; - interrupts = ; - clocks = <&clkc CLKID_SPICC0>; - clock-names = "core"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spicc1: spi@15000 { - compatible = "amlogic,meson-axg-spicc"; - reg = <0x0 0x15000 0x0 0x3c>; - interrupts = ; - clocks = <&clkc CLKID_SPICC1>; - clock-names = "core"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c0: i2c@1f000 { - compatible = "amlogic,meson-axg-i2c"; - reg = <0x0 0x1f000 0x0 0x20>; - interrupts = ; - clocks = <&clkc CLKID_I2C>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@1e000 { - compatible = "amlogic,meson-axg-i2c"; - reg = <0x0 0x1e000 0x0 0x20>; - interrupts = ; - clocks = <&clkc CLKID_I2C>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@1d000 { - compatible = "amlogic,meson-axg-i2c"; - reg = <0x0 0x1d000 0x0 0x20>; - interrupts = ; - clocks = <&clkc CLKID_I2C>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@1c000 { - compatible = "amlogic,meson-axg-i2c"; - reg = <0x0 0x1c000 0x0 0x20>; - interrupts = ; - clocks = <&clkc CLKID_I2C>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - uart_A: serial@24000 { - compatible = "amlogic,meson-gx-uart"; - reg = <0x0 0x24000 0x0 0x18>; - interrupts = ; - status = "disabled"; - clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; - clock-names = "xtal", "pclk", "baud"; - }; - - uart_B: serial@23000 { - compatible = "amlogic,meson-gx-uart"; - reg = <0x0 0x23000 0x0 0x18>; - interrupts = ; - status = "disabled"; - clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; - clock-names = "xtal", "pclk", "baud"; - }; - }; - - ethmac: ethernet@ff3f0000 { - compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; - reg = <0x0 0xff3f0000 0x0 0x10000 - 0x0 0xff634540 0x0 0x8>; - interrupts = ; - interrupt-names = "macirq"; - clocks = <&clkc CLKID_ETH>, - <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; - status = "disabled"; - }; - - gic: interrupt-controller@ffc01000 { - compatible = "arm,gic-400"; - reg = <0x0 0xffc01000 0 0x1000>, - <0x0 0xffc02000 0 0x2000>, - <0x0 0xffc04000 0 0x2000>, - <0x0 0xffc06000 0 0x2000>; - interrupt-controller; - interrupts = ; - #interrupt-cells = <3>; - #address-cells = <0>; - }; - - hiubus: bus@ff63c000 { - compatible = "simple-bus"; - reg = <0x0 0xff63c000 0x0 0x1c00>; - #address-cells = <2>; - #size-cells = <2>; - ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; - - sysctrl: system-controller@0 { - compatible = "amlogic,meson-axg-hhi-sysctrl", "syscon", "simple-mfd"; - reg = <0 0 0 0x400>; - - clkc: clock-controller { - compatible = "amlogic,axg-clkc"; - #clock-cells = <1>; - }; - }; - }; - - mailbox: mailbox@ff63dc00 { - compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; - reg = <0 0xff63dc00 0 0x400>; - interrupts = , - , - ; - #mbox-cells = <1>; - }; - - periphs: periphs@ff634000 { - compatible = "simple-bus"; - reg = <0x0 0xff634000 0x0 0x2000>; - #address-cells = <2>; - #size-cells = <2>; - ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; - - hwrng: rng { - compatible = "amlogic,meson-rng"; - reg = <0x0 0x18 0x0 0x4>; - clocks = <&clkc CLKID_RNG0>; - clock-names = "core"; - }; - - pinctrl_periphs: pinctrl@480 { - compatible = "amlogic,meson-axg-periphs-pinctrl"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio: bank@480 { - reg = <0x0 0x00480 0x0 0x40>, - <0x0 0x004e8 0x0 0x14>, - <0x0 0x00520 0x0 0x14>, - <0x0 0x00430 0x0 0x3c>; - reg-names = "mux", "pull", "pull-enable", "gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl_periphs 0 0 86>; - }; - - emmc_pins: emmc { - mux { - groups = "emmc_nand_d0", - "emmc_nand_d1", - "emmc_nand_d2", - "emmc_nand_d3", - "emmc_nand_d4", - "emmc_nand_d5", - "emmc_nand_d6", - "emmc_nand_d7", - "emmc_clk", - "emmc_cmd", - "emmc_ds"; - function = "emmc"; - }; - }; - - emmc_clk_gate_pins: emmc_clk_gate { - mux { - groups = "BOOT_8"; - function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "BOOT_8"; - bias-pull-down; - }; - }; - - sdio_pins: sdio { - mux { - groups = "sdio_d0", - "sdio_d1", - "sdio_d2", - "sdio_d3", - "sdio_cmd", - "sdio_clk"; - function = "sdio"; - }; - }; - - sdio_clk_gate_pins: sdio_clk_gate { - mux { - groups = "GPIOX_4"; - function = "gpio_periphs"; - }; - cfg-pull-down { - pins = "GPIOX_4"; - bias-pull-down; - }; - }; - - eth_rmii_x_pins: eth-x-rmii { - mux { - groups = "eth_mdio_x", - "eth_mdc_x", - "eth_rgmii_rx_clk_x", - "eth_rx_dv_x", - "eth_rxd0_x", - "eth_rxd1_x", - "eth_txen_x", - "eth_txd0_x", - "eth_txd1_x"; - function = "eth"; - }; - }; - - eth_rmii_y_pins: eth-y-rmii { - mux { - groups = "eth_mdio_y", - "eth_mdc_y", - "eth_rgmii_rx_clk_y", - "eth_rx_dv_y", - "eth_rxd0_y", - "eth_rxd1_y", - "eth_txen_y", - "eth_txd0_y", - "eth_txd1_y"; - function = "eth"; - }; - }; - - eth_rgmii_x_pins: eth-x-rgmii { - mux { - groups = "eth_mdio_x", - "eth_mdc_x", - "eth_rgmii_rx_clk_x", - "eth_rx_dv_x", - "eth_rxd0_x", - "eth_rxd1_x", - "eth_rxd2_rgmii", - "eth_rxd3_rgmii", - "eth_rgmii_tx_clk", - "eth_txen_x", - "eth_txd0_x", - "eth_txd1_x", - "eth_txd2_rgmii", - "eth_txd3_rgmii"; - function = "eth"; - }; - }; - - eth_rgmii_y_pins: eth-y-rgmii { - mux { - groups = "eth_mdio_y", - "eth_mdc_y", - "eth_rgmii_rx_clk_y", - "eth_rx_dv_y", - "eth_rxd0_y", - "eth_rxd1_y", - "eth_rxd2_rgmii", - "eth_rxd3_rgmii", - "eth_rgmii_tx_clk", - "eth_txen_y", - "eth_txd0_y", - "eth_txd1_y", - "eth_txd2_rgmii", - "eth_txd3_rgmii"; - function = "eth"; - }; - }; - - pdm_dclk_a14_pins: pdm_dclk_a14 { - mux { - groups = "pdm_dclk_a14"; - function = "pdm"; - }; - }; - - pdm_dclk_a19_pins: pdm_dclk_a19 { - mux { - groups = "pdm_dclk_a19"; - function = "pdm"; - }; - }; - - pdm_din0_pins: pdm_din0 { - mux { - groups = "pdm_din0"; - function = "pdm"; - }; - }; - - pdm_din1_pins: pdm_din1 { - mux { - groups = "pdm_din1"; - function = "pdm"; - }; - }; - - pdm_din2_pins: pdm_din2 { - mux { - groups = "pdm_din2"; - function = "pdm"; - }; - }; - - pdm_din3_pins: pdm_din3 { - mux { - groups = "pdm_din3"; - function = "pdm"; - }; - }; - - pwm_a_a_pins: pwm_a_a { - mux { - groups = "pwm_a_a"; - function = "pwm_a"; - }; - }; - - pwm_a_x18_pins: pwm_a_x18 { - mux { - groups = "pwm_a_x18"; - function = "pwm_a"; - }; - }; - - pwm_a_x20_pins: pwm_a_x20 { - mux { - groups = "pwm_a_x20"; - function = "pwm_a"; - }; - }; - - pwm_a_z_pins: pwm_a_z { - mux { - groups = "pwm_a_z"; - function = "pwm_a"; - }; - }; - - pwm_b_a_pins: pwm_b_a { - mux { - groups = "pwm_b_a"; - function = "pwm_b"; - }; - }; - - pwm_b_x_pins: pwm_b_x { - mux { - groups = "pwm_b_x"; - function = "pwm_b"; - }; - }; - - pwm_b_z_pins: pwm_b_z { - mux { - groups = "pwm_b_z"; - function = "pwm_b"; - }; - }; - - pwm_c_a_pins: pwm_c_a { - mux { - groups = "pwm_c_a"; - function = "pwm_c"; - }; - }; - - pwm_c_x10_pins: pwm_c_x10 { - mux { - groups = "pwm_c_x10"; - function = "pwm_c"; - }; - }; - - pwm_c_x17_pins: pwm_c_x17 { - mux { - groups = "pwm_c_x17"; - function = "pwm_c"; - }; - }; - - pwm_d_x11_pins: pwm_d_x11 { - mux { - groups = "pwm_d_x11"; - function = "pwm_d"; - }; - }; - - pwm_d_x16_pins: pwm_d_x16 { - mux { - groups = "pwm_d_x16"; - function = "pwm_d"; - }; - }; - - spdif_in_z_pins: spdif_in_z { - mux { - groups = "spdif_in_z"; - function = "spdif_in"; - }; - }; - - spdif_in_a1_pins: spdif_in_a1 { - mux { - groups = "spdif_in_a1"; - function = "spdif_in"; - }; - }; - - spdif_in_a7_pins: spdif_in_a7 { - mux { - groups = "spdif_in_a7"; - function = "spdif_in"; - }; - }; - - spdif_in_a19_pins: spdif_in_a19 { - mux { - groups = "spdif_in_a19"; - function = "spdif_in"; - }; - }; - - spdif_in_a20_pins: spdif_in_a20 { - mux { - groups = "spdif_in_a20"; - function = "spdif_in"; - }; - }; - - spdif_out_z_pins: spdif_out_z { - mux { - groups = "spdif_out_z"; - function = "spdif_out"; - }; - }; - - spdif_out_a1_pins: spdif_out_a1 { - mux { - groups = "spdif_out_a1"; - function = "spdif_out"; - }; - }; - - spdif_out_a11_pins: spdif_out_a11 { - mux { - groups = "spdif_out_a11"; - function = "spdif_out"; - }; - }; - - spdif_out_a19_pins: spdif_out_a19 { - mux { - groups = "spdif_out_a19"; - function = "spdif_out"; - }; - }; - - spdif_out_a20_pins: spdif_out_a20 { - mux { - groups = "spdif_out_a20"; - function = "spdif_out"; - }; - }; - - spi0_pins: spi0 { - mux { - groups = "spi0_miso", - "spi0_mosi", - "spi0_clk"; - function = "spi0"; - }; - }; - - spi0_ss0_pins: spi0_ss0 { - mux { - groups = "spi0_ss0"; - function = "spi0"; - }; - }; - - spi0_ss1_pins: spi0_ss1 { - mux { - groups = "spi0_ss1"; - function = "spi0"; - }; - }; - - spi0_ss2_pins: spi0_ss2 { - mux { - groups = "spi0_ss2"; - function = "spi0"; - }; - }; - - - spi1_a_pins: spi1_a { - mux { - groups = "spi1_miso_a", - "spi1_mosi_a", - "spi1_clk_a"; - function = "spi1"; - }; - }; - - spi1_ss0_a_pins: spi1_ss0_a { - mux { - groups = "spi1_ss0_a"; - function = "spi1"; - }; - }; - - spi1_ss1_pins: spi1_ss1 { - mux { - groups = "spi1_ss1"; - function = "spi1"; - }; - }; - - spi1_x_pins: spi1_x { - mux { - groups = "spi1_miso_x", - "spi1_mosi_x", - "spi1_clk_x"; - function = "spi1"; - }; - }; - - spi1_ss0_x_pins: spi1_ss0_x { - mux { - groups = "spi1_ss0_x"; - function = "spi1"; - }; - }; - - i2c0_pins: i2c0 { - mux { - groups = "i2c0_sck", - "i2c0_sda"; - function = "i2c0"; - }; - }; - - i2c1_z_pins: i2c1_z { - mux { - groups = "i2c1_sck_z", - "i2c1_sda_z"; - function = "i2c1"; - }; - }; - - i2c1_x_pins: i2c1_x { - mux { - groups = "i2c1_sck_x", - "i2c1_sda_x"; - function = "i2c1"; - }; - }; - - i2c2_x_pins: i2c2_x { - mux { - groups = "i2c2_sck_x", - "i2c2_sda_x"; - function = "i2c2"; - }; - }; - - i2c2_a_pins: i2c2_a { - mux { - groups = "i2c2_sck_a", - "i2c2_sda_a"; - function = "i2c2"; - }; - }; - - i2c3_a6_pins: i2c3_a6 { - mux { - groups = "i2c3_sda_a6", - "i2c3_sck_a7"; - function = "i2c3"; - }; - }; - - i2c3_a12_pins: i2c3_a12 { - mux { - groups = "i2c3_sda_a12", - "i2c3_sck_a13"; - function = "i2c3"; - }; - }; - - i2c3_a19_pins: i2c3_a19 { - mux { - groups = "i2c3_sda_a19", - "i2c3_sck_a20"; - function = "i2c3"; - }; - }; - - uart_a_pins: uart_a { - mux { - groups = "uart_tx_a", - "uart_rx_a"; - function = "uart_a"; - }; - }; - - uart_a_cts_rts_pins: uart_a_cts_rts { - mux { - groups = "uart_cts_a", - "uart_rts_a"; - function = "uart_a"; - }; - }; - - uart_b_x_pins: uart_b_x { - mux { - groups = "uart_tx_b_x", - "uart_rx_b_x"; - function = "uart_b"; - }; - }; - - uart_b_x_cts_rts_pins: uart_b_x_cts_rts { - mux { - groups = "uart_cts_b_x", - "uart_rts_b_x"; - function = "uart_b"; - }; - }; - - uart_b_z_pins: uart_b_z { - mux { - groups = "uart_tx_b_z", - "uart_rx_b_z"; - function = "uart_b"; - }; - }; - - uart_b_z_cts_rts_pins: uart_b_z_cts_rts { - mux { - groups = "uart_cts_b_z", - "uart_rts_b_z"; - function = "uart_b"; - }; - }; - - uart_ao_b_z_pins: uart_ao_b_z { - mux { - groups = "uart_ao_tx_b_z", - "uart_ao_rx_b_z"; - function = "uart_ao_b_z"; - }; - }; - - uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts { - mux { - groups = "uart_ao_cts_b_z", - "uart_ao_rts_b_z"; - function = "uart_ao_b_z"; - }; - }; - - mclk_b_pins: mclk_b { - mux { - groups = "mclk_b"; - function = "mclk_b"; - }; - }; - - mclk_c_pins: mclk_c { - mux { - groups = "mclk_c"; - function = "mclk_c"; - }; - }; - - tdma_sclk_pins: tdma_sclk { - mux { - groups = "tdma_sclk"; - function = "tdma"; - }; - }; - - tdma_sclk_slv_pins: tdma_sclk_slv { - mux { - groups = "tdma_sclk_slv"; - function = "tdma"; - }; - }; - - tdma_fs_pins: tdma_fs { - mux { - groups = "tdma_fs"; - function = "tdma"; - }; - }; - - tdma_fs_slv_pins: tdma_fs_slv { - mux { - groups = "tdma_fs_slv"; - function = "tdma"; - }; - }; - - tdma_din0_pins: tdma_din0 { - mux { - groups = "tdma_din0"; - function = "tdma"; - }; - }; - - tdma_dout0_x14_pins: tdma_dout0_x14 { - mux { - groups = "tdma_dout0_x14"; - function = "tdma"; - }; - }; - - tdma_dout0_x15_pins: tdma_dout0_x15 { - mux { - groups = "tdma_dout0_x15"; - function = "tdma"; - }; - }; - - tdma_dout1_pins: tdma_dout1 { - mux { - groups = "tdma_dout1"; - function = "tdma"; - }; - }; - - tdma_din1_pins: tdma_din1 { - mux { - groups = "tdma_din1"; - function = "tdma"; - }; - }; - - tdmb_sclk_pins: tdmb_sclk { - mux { - groups = "tdmb_sclk"; - function = "tdmb"; - }; - }; - - tdmb_sclk_slv_pins: tdmb_sclk_slv { - mux { - groups = "tdmb_sclk_slv"; - function = "tdmb"; - }; - }; - - tdmb_fs_pins: tdmb_fs { - mux { - groups = "tdmb_fs"; - function = "tdmb"; - }; - }; - - tdmb_fs_slv_pins: tdmb_fs_slv { - mux { - groups = "tdmb_fs_slv"; - function = "tdmb"; - }; - }; - - tdmb_din0_pins: tdmb_din0 { - mux { - groups = "tdmb_din0"; - function = "tdmb"; - }; - }; - - tdmb_dout0_pins: tdmb_dout0 { - mux { - groups = "tdmb_dout0"; - function = "tdmb"; - }; - }; - - tdmb_din1_pins: tdmb_din1 { - mux { - groups = "tdmb_din1"; - function = "tdmb"; - }; - }; - - tdmb_dout1_pins: tdmb_dout1 { - mux { - groups = "tdmb_dout1"; - function = "tdmb"; - }; - }; - - tdmb_din2_pins: tdmb_din2 { - mux { - groups = "tdmb_din2"; - function = "tdmb"; - }; - }; - - tdmb_dout2_pins: tdmb_dout2 { - mux { - groups = "tdmb_dout2"; - function = "tdmb"; - }; - }; - - tdmb_din3_pins: tdmb_din3 { - mux { - groups = "tdmb_din3"; - function = "tdmb"; - }; - }; - - tdmb_dout3_pins: tdmb_dout3 { - mux { - groups = "tdmb_dout3"; - function = "tdmb"; - }; - }; - - tdmc_sclk_pins: tdmc_sclk { - mux { - groups = "tdmc_sclk"; - function = "tdmc"; - }; - }; - - tdmc_sclk_slv_pins: tdmc_sclk_slv { - mux { - groups = "tdmc_sclk_slv"; - function = "tdmc"; - }; - }; - - tdmc_fs_pins: tdmc_fs { - mux { - groups = "tdmc_fs"; - function = "tdmc"; - }; - }; - - tdmc_fs_slv_pins: tdmc_fs_slv { - mux { - groups = "tdmc_fs_slv"; - function = "tdmc"; - }; - }; - - tdmc_din0_pins: tdmc_din0 { - mux { - groups = "tdmc_din0"; - function = "tdmc"; - }; - }; - - tdmc_dout0_pins: tdmc_dout0 { - mux { - groups = "tdmc_dout0"; - function = "tdmc"; - }; - }; - - tdmc_din1_pins: tdmc_din1 { - mux { - groups = "tdmc_din1"; - function = "tdmc"; - }; - }; - - tdmc_dout1_pins: tdmc_dout1 { - mux { - groups = "tdmc_dout1"; - function = "tdmc"; - }; - }; - - tdmc_din2_pins: tdmc_din2 { - mux { - groups = "tdmc_din2"; - function = "tdmc"; - }; - }; - - tdmc_dout2_pins: tdmc_dout2 { - mux { - groups = "tdmc_dout2"; - function = "tdmc"; - }; - }; - - tdmc_din3_pins: tdmc_din3 { - mux { - groups = "tdmc_din3"; - function = "tdmc"; - }; - }; - - tdmc_dout3_pins: tdmc_dout3 { - mux { - groups = "tdmc_dout3"; - function = "tdmc"; - }; - }; - }; - }; - - sram: sram@fffc0000 { - compatible = "amlogic,meson-axg-sram", "mmio-sram"; - reg = <0x0 0xfffc0000 0x0 0x20000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0xfffc0000 0x20000>; - - cpu_scp_lpri: scp-shmem@0 { - compatible = "amlogic,meson-axg-scp-shmem"; - reg = <0x13000 0x400>; - }; - - cpu_scp_hpri: scp-shmem@200 { - compatible = "amlogic,meson-axg-scp-shmem"; - reg = <0x13400 0x400>; - }; - }; - aobus: bus@ff800000 { compatible = "simple-bus"; reg = <0x0 0xff800000 0x0 0x100000>; @@ -1414,8 +1215,8 @@ pinctrl_aobus: pinctrl@14 { gpio_ao: bank@14 { reg = <0x0 0x00014 0x0 0x8>, - <0x0 0x0002c 0x0 0x4>, - <0x0 0x00024 0x0 0x8>; + <0x0 0x0002c 0x0 0x4>, + <0x0 0x00024 0x0 0x8>; reg-names = "mux", "pull", "gpio"; gpio-controller; #gpio-cells = <2>; @@ -1474,7 +1275,7 @@ mux { uart_ao_a_pins: uart_ao_a { mux { groups = "uart_ao_tx_a", - "uart_ao_rx_a"; + "uart_ao_rx_a"; function = "uart_ao_a"; }; }; @@ -1482,7 +1283,7 @@ mux { uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts { mux { groups = "uart_ao_cts_a", - "uart_ao_rts_a"; + "uart_ao_rts_a"; function = "uart_ao_a"; }; }; @@ -1490,7 +1291,7 @@ mux { uart_ao_b_pins: uart_ao_b { mux { groups = "uart_ao_tx_b", - "uart_ao_rx_b"; + "uart_ao_rx_b"; function = "uart_ao_b"; }; }; @@ -1498,7 +1299,7 @@ mux { uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { mux { groups = "uart_ao_cts_b", - "uart_ao_rts_b"; + "uart_ao_rts_b"; function = "uart_ao_b"; }; }; @@ -1510,13 +1311,6 @@ sec_AO: ao-secure@140 { amlogic,has-chip-id; }; - pwm_AO_ab: pwm@7000 { - compatible = "amlogic,meson-axg-ao-pwm"; - reg = <0x0 0x07000 0x0 0x20>; - #pwm-cells = <3>; - status = "disabled"; - }; - pwm_AO_cd: pwm@2000 { compatible = "amlogic,meson-axg-ao-pwm"; reg = <0x0 0x02000 0x0 0x20>; @@ -1524,16 +1318,6 @@ pwm_AO_cd: pwm@2000 { status = "disabled"; }; - i2c_AO: i2c@5000 { - compatible = "amlogic,meson-axg-i2c"; - reg = <0x0 0x05000 0x0 0x20>; - interrupts = ; - clocks = <&clkc CLKID_AO_I2C>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - uart_AO: serial@3000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>; @@ -1552,6 +1336,23 @@ uart_AO_B: serial@4000 { status = "disabled"; }; + i2c_AO: i2c@5000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x05000 0x0 0x20>; + interrupts = ; + clocks = <&clkc CLKID_AO_I2C>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pwm_AO_ab: pwm@7000 { + compatible = "amlogic,meson-axg-ao-pwm"; + reg = <0x0 0x07000 0x0 0x20>; + #pwm-cells = <3>; + status = "disabled"; + }; + ir: ir@8000 { compatible = "amlogic,meson-gxbb-ir"; reg = <0x0 0x8000 0x0 0x20>; @@ -1566,12 +1367,211 @@ saradc: adc@9000 { #io-channel-cells = <1>; interrupts = ; clocks = <&xtal>, - <&clkc_AO CLKID_AO_SAR_ADC>, - <&clkc_AO CLKID_AO_SAR_ADC_CLK>, - <&clkc_AO CLKID_AO_SAR_ADC_SEL>; + <&clkc_AO CLKID_AO_SAR_ADC>, + <&clkc_AO CLKID_AO_SAR_ADC_CLK>, + <&clkc_AO CLKID_AO_SAR_ADC_SEL>; clock-names = "clkin", "core", "adc_clk", "adc_sel"; status = "disabled"; }; }; + + gic: interrupt-controller@ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, + <0x0 0xffc02000 0 0x2000>, + <0x0 0xffc04000 0 0x2000>, + <0x0 0xffc06000 0 0x2000>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + cbus: bus@ffd00000 { + compatible = "simple-bus"; + reg = <0x0 0xffd00000 0x0 0x25000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + + reset: reset-controller@1004 { + compatible = "amlogic,meson-axg-reset"; + reg = <0x0 0x01004 0x0 0x9c>; + #reset-cells = <1>; + }; + + gpio_intc: interrupt-controller@f080 { + compatible = "amlogic,meson-gpio-intc"; + reg = <0x0 0xf080 0x0 0x10>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; + status = "disabled"; + }; + + pwm_ab: pwm@1b000 { + compatible = "amlogic,meson-axg-ee-pwm"; + reg = <0x0 0x1b000 0x0 0x20>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_cd: pwm@1a000 { + compatible = "amlogic,meson-axg-ee-pwm"; + reg = <0x0 0x1a000 0x0 0x20>; + #pwm-cells = <3>; + status = "disabled"; + }; + + spicc0: spi@13000 { + compatible = "amlogic,meson-axg-spicc"; + reg = <0x0 0x13000 0x0 0x3c>; + interrupts = ; + clocks = <&clkc CLKID_SPICC0>; + clock-names = "core"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spicc1: spi@15000 { + compatible = "amlogic,meson-axg-spicc"; + reg = <0x0 0x15000 0x0 0x3c>; + interrupts = ; + clocks = <&clkc CLKID_SPICC1>; + clock-names = "core"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@1c000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x1c000 0x0 0x20>; + interrupts = ; + clocks = <&clkc CLKID_I2C>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@1d000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x1d000 0x0 0x20>; + interrupts = ; + clocks = <&clkc CLKID_I2C>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@1e000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x1e000 0x0 0x20>; + interrupts = ; + clocks = <&clkc CLKID_I2C>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c0: i2c@1f000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x1f000 0x0 0x20>; + interrupts = ; + clocks = <&clkc CLKID_I2C>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + uart_B: serial@23000 { + compatible = "amlogic,meson-gx-uart"; + reg = <0x0 0x23000 0x0 0x18>; + interrupts = ; + status = "disabled"; + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + }; + + uart_A: serial@24000 { + compatible = "amlogic,meson-gx-uart"; + reg = <0x0 0x24000 0x0 0x18>; + interrupts = ; + status = "disabled"; + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + }; + }; + + apb: bus@ffe00000 { + compatible = "simple-bus"; + reg = <0x0 0xffe00000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; + + sd_emmc_b: sd@5000 { + compatible = "amlogic,meson-axg-mmc"; + reg = <0x0 0x5000 0x0 0x800>; + interrupts = ; + status = "disabled"; + clocks = <&clkc CLKID_SD_EMMC_B>, + <&clkc CLKID_SD_EMMC_B_CLK0>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + resets = <&reset RESET_SD_EMMC_B>; + }; + + sd_emmc_c: mmc@7000 { + compatible = "amlogic,meson-axg-mmc"; + reg = <0x0 0x7000 0x0 0x800>; + interrupts = ; + status = "disabled"; + clocks = <&clkc CLKID_SD_EMMC_C>, + <&clkc CLKID_SD_EMMC_C_CLK0>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + resets = <&reset RESET_SD_EMMC_C>; + }; + }; + + sram: sram@fffc0000 { + compatible = "amlogic,meson-axg-sram", "mmio-sram"; + reg = <0x0 0xfffc0000 0x0 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0xfffc0000 0x20000>; + + cpu_scp_lpri: scp-shmem@0 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13000 0x400>; + }; + + cpu_scp_hpri: scp-shmem@200 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13400 0x400>; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; }; }; From 4cbef415c90a41398b7a6f0a8829b59aab92c784 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Tue, 4 Sep 2018 22:30:43 +0400 Subject: [PATCH 05/13] arm64: dts: meson-gx: increase default shared CMA pool size Devices using the new V4L2 mem2mem vdec require a larger CMA pool. As nearly all GX* devices are video/media focused and will use it, set a larger (256MB) default value. Signed-off-by: Christian Hewitt Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi index b8dc4dbb391b..ef439223f532 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -44,7 +44,7 @@ secmon_reserved_alt: secmon@5000000 { linux,cma { compatible = "shared-dma-pool"; reusable; - size = <0x0 0xbc00000>; + size = <0x0 0x10000000>; alignment = <0x0 0x400000>; linux,cma-default; }; From b7eb0e26cc4a212fde09144cd49d4103170d2b9e Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 30 Aug 2018 12:53:17 +0200 Subject: [PATCH 06/13] arm64: dts: meson: libretech: update board model There is actually several different libretech board with the CC suffix so the model name is not appropriate here. Update to something more specific Reported-by: Da Xue Signed-off-by: Jerome Brunet Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts index f63bceb88caa..90a56af967a7 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts @@ -13,7 +13,7 @@ / { compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl"; - model = "Libre Technology CC"; + model = "Libre Computer Board AML-S905X-CC"; aliases { serial0 = &uart_AO; From f1726043426c73592868e2f447b4e260a4a68d91 Mon Sep 17 00:00:00 2001 From: Maxime Jourdan Date: Thu, 23 Aug 2018 13:49:54 +0200 Subject: [PATCH 07/13] arm64: dts: meson-gx: add dmcbus and canvas nodes. DMC is a small memory region with various registers, including the ones needed for the canvas module. Reviewed-by: Jerome Brunet Signed-off-by: Maxime Jourdan Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi index ef439223f532..49c22f269958 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -423,6 +423,19 @@ hwrng: rng { }; }; + dmcbus: bus@c8838000 { + compatible = "simple-bus"; + reg = <0x0 0xc8838000 0x0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>; + + canvas: video-lut@48 { + compatible = "amlogic,canvas"; + reg = <0x0 0x48 0x0 0x14>; + }; + }; + hiubus: bus@c883c000 { compatible = "simple-bus"; reg = <0x0 0xc883c000 0x0 0x2000>; From c362e4e0052a98b8eec58e2e5b0cdaea58103456 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Fri, 31 Aug 2018 17:02:16 +0200 Subject: [PATCH 08/13] arm64: dts: meson-axg: add pdm Add the PDM device of the axg audio subsystem Signed-off-by: Jerome Brunet Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 36be63d69e7f..883ddfce2374 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -152,6 +152,18 @@ ethmac: ethernet@ff3f0000 { status = "disabled"; }; + pdm: audio-controller@ff632000 { + compatible = "amlogic,axg-pdm"; + reg = <0x0 0xff632000 0x0 0x34>; + #sound-dai-cells = <0>; + sound-name-prefix = "PDM"; + clocks = <&clkc_audio AUD_CLKID_PDM>, + <&clkc_audio AUD_CLKID_PDM_DCLK>, + <&clkc_audio AUD_CLKID_PDM_SYSCLK>; + clock-names = "pclk", "dclk", "sysclk"; + status = "disabled"; + }; + periphs: bus@ff634000 { compatible = "simple-bus"; reg = <0x0 0xff634000 0x0 0x2000>; From 63d1e75742fecf40a54963fcb8b089e78395cae4 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Fri, 31 Aug 2018 17:02:17 +0200 Subject: [PATCH 09/13] arm64: dts: meson-axg: s400: add dmic codec There are 7 digital mics on the MIC daughter board attached to the s400 board, so add the digital microphone codec to its DTS Signed-off-by: Jerome Brunet Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts index ff64c429d432..f3e16cbbc61e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -86,6 +86,15 @@ spdif_dit: audio-codec@2 { sound-name-prefix = "DIT"; }; + dmics: audio-codec@3 { + #sound-dai-cells = <0>; + compatible = "dmic-codec"; + num-channels = <7>; + wakeup-delay-ms = <50>; + status = "okay"; + sound-name-prefix = "MIC"; + }; + emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; From d85163c7ee2d230c6ac287a602cf9620b8fa71bb Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Fri, 31 Aug 2018 17:02:18 +0200 Subject: [PATCH 10/13] arm64: dts: meson-axg: s400: add pdm to the sound card Enable the PDM input device on the S400 and it to the sound card Signed-off-by: Jerome Brunet Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts index f3e16cbbc61e..92d3064d4966 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -240,6 +240,9 @@ sound { "TODDR_A IN 2", "TDMIN_C OUT", "TODDR_B IN 2", "TDMIN_C OUT", "TODDR_C IN 2", "TDMIN_C OUT", + "TODDR_A IN 4", "PDM Capture", + "TODDR_B IN 4", "PDM Capture", + "TODDR_C IN 4", "PDM Capture", "TODDR_A IN 6", "TDMIN_LB OUT", "TODDR_B IN 6", "TDMIN_LB OUT", "TODDR_C IN 6", "TDMIN_LB OUT", @@ -312,6 +315,14 @@ codec { sound-dai = <&spdif_dit>; }; }; + + dai-link@8 { + sound-dai = <&pdm>; + + codec { + sound-dai = <&dmics>; + }; + }; }; wifi32k: wifi32k { @@ -394,6 +405,13 @@ gpio_speaker: gpio-controller@1f { }; }; +&pdm { + pinctrl-0 = <&pdm_dclk_a14_pins>, <&pdm_din0_pins>, + <&pdm_din1_pins>, <&pdm_din2_pins>, <&pdm_din3_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &pwm_ab { status = "okay"; pinctrl-0 = <&pwm_a_x20_pins>; From eaf8f57c0bf5451132932616ab62f9481adefb55 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 10 Sep 2018 20:39:10 +0200 Subject: [PATCH 11/13] arm64: dts: meson-axg: use the proper compatible for ethmac Use the correct compatible for the AXG ethernet mac node. Signed-off-by: Neil Armstrong Acked-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 883ddfce2374..9f614073a219 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -140,7 +140,7 @@ soc { ranges; ethmac: ethernet@ff3f0000 { - compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; + compatible = "amlogic,meson-axg-dwmac", "snps,dwmac"; reg = <0x0 0xff3f0000 0x0 0x10000 0x0 0xff634540 0x0 0x8>; interrupts = ; From 2250e0f57a84e09f8f208ea410f46d39fb3ca767 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 10 Sep 2018 20:33:15 +0200 Subject: [PATCH 12/13] arm64: dts: meson-axg-s400: Add chosen and memory nodes Add missing chosen and memory nodes. Signed-off-by: Neil Armstrong Acked-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts index 92d3064d4966..d4961dc8356b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -100,6 +100,15 @@ emmc_pwrseq: emmc-pwrseq { reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; }; + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + main_12v: regulator-main_12v { compatible = "regulator-fixed"; regulator-name = "12V"; From 445f2bda3501508b801b3571baee33de0ac44e1f Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 13 Sep 2018 09:12:27 +0200 Subject: [PATCH 13/13] arm64: dts: meson: Switch simple-mfd and syscon order The order between "syscon" and "simple-mfd" is important because in these particular cases, the node needs to be first a "simple-mfd" to expose it's sub-nodes, and later on a "syscon" to permit other nodes to access this register space through the "syscon" mechanism. Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 9f614073a219..df017dbd2e57 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -965,7 +965,7 @@ hiubus: bus@ff63c000 { sysctrl: system-controller@0 { compatible = "amlogic,meson-axg-hhi-sysctrl", - "syscon", "simple-mfd"; + "simple-mfd", "syscon"; reg = <0 0 0 0x400>; clkc: clock-controller { @@ -1209,7 +1209,7 @@ aobus: bus@ff800000 { ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; sysctrl_AO: sys-ctrl@0 { - compatible = "amlogic,meson-axg-ao-sysctrl", "syscon", "simple-mfd"; + compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon"; reg = <0x0 0x0 0x0 0x100>; clkc_AO: clock-controller { diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi index 49c22f269958..f1e5cdbade5e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -344,7 +344,7 @@ aobus: bus@c8100000 { ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; sysctrl_AO: sys-ctrl@0 { - compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"; + compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon"; reg = <0x0 0x0 0x0 0x100>; pwrc_vpu: power-controller-vpu { @@ -444,7 +444,7 @@ hiubus: bus@c883c000 { ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>; sysctrl: system-controller@0 { - compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd"; + compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"; reg = <0 0 0 0x400>; };