From 6092315dfdec5185881605d15a0e200d6e90eb66 Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Thu, 20 Mar 2014 22:21:52 +0100 Subject: [PATCH 1/9] ptp: introduce programmable pins. This patch adds a pair of new ioctls to the PTP Hardware Clock device interface. Using the ioctls, user space programs can query each pin to find out its current function and also reprogram a different function if desired. Signed-off-by: Richard Cochran Signed-off-by: David S. Miller --- drivers/ptp/ptp_chardev.c | 128 ++++++++++++++++++++++++++++++- drivers/ptp/ptp_clock.c | 23 ++++++ drivers/ptp/ptp_private.h | 5 ++ include/linux/ptp_clock_kernel.h | 33 ++++++++ include/uapi/linux/ptp_clock.h | 39 +++++++++- 5 files changed, 226 insertions(+), 2 deletions(-) diff --git a/drivers/ptp/ptp_chardev.c b/drivers/ptp/ptp_chardev.c index 34a0c607318e..419056d7887e 100644 --- a/drivers/ptp/ptp_chardev.c +++ b/drivers/ptp/ptp_chardev.c @@ -25,6 +25,96 @@ #include "ptp_private.h" +static int ptp_disable_pinfunc(struct ptp_clock_info *ops, + enum ptp_pin_function func, unsigned int chan) +{ + struct ptp_clock_request rq; + int err = 0; + + memset(&rq, 0, sizeof(rq)); + + switch (func) { + case PTP_PF_NONE: + break; + case PTP_PF_EXTTS: + rq.type = PTP_CLK_REQ_EXTTS; + rq.extts.index = chan; + err = ops->enable(ops, &rq, 0); + break; + case PTP_PF_PEROUT: + rq.type = PTP_CLK_REQ_PEROUT; + rq.perout.index = chan; + err = ops->enable(ops, &rq, 0); + break; + case PTP_PF_PHYSYNC: + break; + default: + return -EINVAL; + } + + return err; +} + +int ptp_set_pinfunc(struct ptp_clock *ptp, unsigned int pin, + enum ptp_pin_function func, unsigned int chan) +{ + struct ptp_clock_info *info = ptp->info; + struct ptp_pin_desc *pin1 = NULL, *pin2 = &info->pin_config[pin]; + unsigned int i; + + /* Check to see if any other pin previously had this function. */ + for (i = 0; i < info->n_pins; i++) { + if (info->pin_config[i].func == func && + info->pin_config[i].chan == chan) { + pin1 = &info->pin_config[i]; + break; + } + } + if (pin1 && i == pin) + return 0; + + /* Check the desired function and channel. */ + switch (func) { + case PTP_PF_NONE: + break; + case PTP_PF_EXTTS: + if (chan >= info->n_ext_ts) + return -EINVAL; + break; + case PTP_PF_PEROUT: + if (chan >= info->n_per_out) + return -EINVAL; + break; + case PTP_PF_PHYSYNC: + pr_err("sorry, cannot reassign the calibration pin\n"); + return -EINVAL; + default: + return -EINVAL; + } + + if (pin2->func == PTP_PF_PHYSYNC) { + pr_err("sorry, cannot reprogram the calibration pin\n"); + return -EINVAL; + } + + if (info->verify(info, pin, func, chan)) { + pr_err("driver cannot use function %u on pin %u\n", func, chan); + return -EOPNOTSUPP; + } + + /* Disable whatever function was previously assigned. */ + if (pin1) { + ptp_disable_pinfunc(info, func, chan); + pin1->func = PTP_PF_NONE; + pin1->chan = 0; + } + ptp_disable_pinfunc(info, pin2->func, pin2->chan); + pin2->func = func; + pin2->chan = chan; + + return 0; +} + int ptp_open(struct posix_clock *pc, fmode_t fmode) { return 0; @@ -35,12 +125,13 @@ long ptp_ioctl(struct posix_clock *pc, unsigned int cmd, unsigned long arg) struct ptp_clock_caps caps; struct ptp_clock_request req; struct ptp_sys_offset *sysoff = NULL; + struct ptp_pin_desc pd; struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); struct ptp_clock_info *ops = ptp->info; struct ptp_clock_time *pct; struct timespec ts; int enable, err = 0; - unsigned int i; + unsigned int i, pin_index; switch (cmd) { @@ -51,6 +142,7 @@ long ptp_ioctl(struct posix_clock *pc, unsigned int cmd, unsigned long arg) caps.n_ext_ts = ptp->info->n_ext_ts; caps.n_per_out = ptp->info->n_per_out; caps.pps = ptp->info->pps; + caps.n_pins = ptp->info->n_pins; if (copy_to_user((void __user *)arg, &caps, sizeof(caps))) err = -EFAULT; break; @@ -126,6 +218,40 @@ long ptp_ioctl(struct posix_clock *pc, unsigned int cmd, unsigned long arg) err = -EFAULT; break; + case PTP_PIN_GETFUNC: + if (copy_from_user(&pd, (void __user *)arg, sizeof(pd))) { + err = -EFAULT; + break; + } + pin_index = pd.index; + if (pin_index >= ops->n_pins) { + err = -EINVAL; + break; + } + if (mutex_lock_interruptible(&ptp->pincfg_mux)) + return -ERESTARTSYS; + pd = ops->pin_config[pin_index]; + mutex_unlock(&ptp->pincfg_mux); + if (!err && copy_to_user((void __user *)arg, &pd, sizeof(pd))) + err = -EFAULT; + break; + + case PTP_PIN_SETFUNC: + if (copy_from_user(&pd, (void __user *)arg, sizeof(pd))) { + err = -EFAULT; + break; + } + pin_index = pd.index; + if (pin_index >= ops->n_pins) { + err = -EINVAL; + break; + } + if (mutex_lock_interruptible(&ptp->pincfg_mux)) + return -ERESTARTSYS; + err = ptp_set_pinfunc(ptp, pin_index, pd.func, pd.chan); + mutex_unlock(&ptp->pincfg_mux); + break; + default: err = -ENOTTY; break; diff --git a/drivers/ptp/ptp_clock.c b/drivers/ptp/ptp_clock.c index a8319b266643..e25d2bc898e5 100644 --- a/drivers/ptp/ptp_clock.c +++ b/drivers/ptp/ptp_clock.c @@ -169,6 +169,7 @@ static void delete_ptp_clock(struct posix_clock *pc) struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); mutex_destroy(&ptp->tsevq_mux); + mutex_destroy(&ptp->pincfg_mux); ida_simple_remove(&ptp_clocks_map, ptp->index); kfree(ptp); } @@ -203,6 +204,7 @@ struct ptp_clock *ptp_clock_register(struct ptp_clock_info *info, ptp->index = index; spin_lock_init(&ptp->tsevq.lock); mutex_init(&ptp->tsevq_mux); + mutex_init(&ptp->pincfg_mux); init_waitqueue_head(&ptp->tsev_wq); /* Create a new device in our class. */ @@ -249,6 +251,7 @@ struct ptp_clock *ptp_clock_register(struct ptp_clock_info *info, device_destroy(ptp_class, ptp->devid); no_device: mutex_destroy(&ptp->tsevq_mux); + mutex_destroy(&ptp->pincfg_mux); no_slot: kfree(ptp); no_memory: @@ -305,6 +308,26 @@ int ptp_clock_index(struct ptp_clock *ptp) } EXPORT_SYMBOL(ptp_clock_index); +int ptp_find_pin(struct ptp_clock *ptp, + enum ptp_pin_function func, unsigned int chan) +{ + struct ptp_pin_desc *pin = NULL; + int i; + + mutex_lock(&ptp->pincfg_mux); + for (i = 0; i < ptp->info->n_pins; i++) { + if (ptp->info->pin_config[i].func == func && + ptp->info->pin_config[i].chan == chan) { + pin = &ptp->info->pin_config[i]; + break; + } + } + mutex_unlock(&ptp->pincfg_mux); + + return pin ? i : -1; +} +EXPORT_SYMBOL(ptp_find_pin); + /* module operations */ static void __exit ptp_exit(void) diff --git a/drivers/ptp/ptp_private.h b/drivers/ptp/ptp_private.h index df03f2e30ad9..b114a84c63c7 100644 --- a/drivers/ptp/ptp_private.h +++ b/drivers/ptp/ptp_private.h @@ -48,6 +48,7 @@ struct ptp_clock { long dialed_frequency; /* remembers the frequency adjustment */ struct timestamp_event_queue tsevq; /* simple fifo for time stamps */ struct mutex tsevq_mux; /* one process at a time reading the fifo */ + struct mutex pincfg_mux; /* protect concurrent info->pin_config access */ wait_queue_head_t tsev_wq; int defunct; /* tells readers to go away when clock is being removed */ }; @@ -69,6 +70,10 @@ static inline int queue_cnt(struct timestamp_event_queue *q) * see ptp_chardev.c */ +/* caller must hold pincfg_mux */ +int ptp_set_pinfunc(struct ptp_clock *ptp, unsigned int pin, + enum ptp_pin_function func, unsigned int chan); + long ptp_ioctl(struct posix_clock *pc, unsigned int cmd, unsigned long arg); diff --git a/include/linux/ptp_clock_kernel.h b/include/linux/ptp_clock_kernel.h index 38a993508327..0d8ff3fb84ba 100644 --- a/include/linux/ptp_clock_kernel.h +++ b/include/linux/ptp_clock_kernel.h @@ -49,7 +49,11 @@ struct ptp_clock_request { * @n_alarm: The number of programmable alarms. * @n_ext_ts: The number of external time stamp channels. * @n_per_out: The number of programmable periodic signals. + * @n_pins: The number of programmable pins. * @pps: Indicates whether the clock supports a PPS callback. + * @pin_config: Array of length 'n_pins'. If the number of + * programmable pins is nonzero, then drivers must + * allocate and initialize this array. * * clock operations * @@ -70,6 +74,18 @@ struct ptp_clock_request { * parameter request: Desired resource to enable or disable. * parameter on: Caller passes one to enable or zero to disable. * + * @verify: Confirm that a pin can perform a given function. The PTP + * Hardware Clock subsystem maintains the 'pin_config' + * array on behalf of the drivers, but the PHC subsystem + * assumes that every pin can perform every function. This + * hook gives drivers a way of telling the core about + * limitations on specific pins. This function must return + * zero if the function can be assigned to this pin, and + * nonzero otherwise. + * parameter pin: index of the pin in question. + * parameter func: the desired function to use. + * parameter chan: the function channel index to use. + * * Drivers should embed their ptp_clock_info within a private * structure, obtaining a reference to it using container_of(). * @@ -83,13 +99,17 @@ struct ptp_clock_info { int n_alarm; int n_ext_ts; int n_per_out; + int n_pins; int pps; + struct ptp_pin_desc *pin_config; int (*adjfreq)(struct ptp_clock_info *ptp, s32 delta); int (*adjtime)(struct ptp_clock_info *ptp, s64 delta); int (*gettime)(struct ptp_clock_info *ptp, struct timespec *ts); int (*settime)(struct ptp_clock_info *ptp, const struct timespec *ts); int (*enable)(struct ptp_clock_info *ptp, struct ptp_clock_request *request, int on); + int (*verify)(struct ptp_clock_info *ptp, unsigned int pin, + enum ptp_pin_function func, unsigned int chan); }; struct ptp_clock; @@ -156,4 +176,17 @@ extern void ptp_clock_event(struct ptp_clock *ptp, extern int ptp_clock_index(struct ptp_clock *ptp); +/** + * ptp_find_pin() - obtain the pin index of a given auxiliary function + * + * @ptp: The clock obtained from ptp_clock_register(). + * @func: One of the ptp_pin_function enumerated values. + * @chan: The particular functional channel to find. + * Return: Pin index in the range of zero to ptp_clock_caps.n_pins - 1, + * or -1 if the auxiliary function cannot be found. + */ + +int ptp_find_pin(struct ptp_clock *ptp, + enum ptp_pin_function func, unsigned int chan); + #endif diff --git a/include/uapi/linux/ptp_clock.h b/include/uapi/linux/ptp_clock.h index b65c834f83e9..f0b7bfe5da92 100644 --- a/include/uapi/linux/ptp_clock.h +++ b/include/uapi/linux/ptp_clock.h @@ -50,7 +50,8 @@ struct ptp_clock_caps { int n_ext_ts; /* Number of external time stamp channels. */ int n_per_out; /* Number of programmable periodic signals. */ int pps; /* Whether the clock supports a PPS callback. */ - int rsv[15]; /* Reserved for future use. */ + int n_pins; /* Number of input/output pins. */ + int rsv[14]; /* Reserved for future use. */ }; struct ptp_extts_request { @@ -80,6 +81,40 @@ struct ptp_sys_offset { struct ptp_clock_time ts[2 * PTP_MAX_SAMPLES + 1]; }; +enum ptp_pin_function { + PTP_PF_NONE, + PTP_PF_EXTTS, + PTP_PF_PEROUT, + PTP_PF_PHYSYNC, +}; + +struct ptp_pin_desc { + /* + * Hardware specific human readable pin name. This field is + * set by the kernel during the PTP_PIN_GETFUNC ioctl and is + * ignored for the PTP_PIN_SETFUNC ioctl. + */ + char name[64]; + /* + * Pin index in the range of zero to ptp_clock_caps.n_pins - 1. + */ + unsigned int index; + /* + * Which of the PTP_PF_xxx functions to use on this pin. + */ + unsigned int func; + /* + * The specific channel to use for this function. + * This corresponds to the 'index' field of the + * PTP_EXTTS_REQUEST and PTP_PEROUT_REQUEST ioctls. + */ + unsigned int chan; + /* + * Reserved for future use. + */ + unsigned int rsv[5]; +}; + #define PTP_CLK_MAGIC '=' #define PTP_CLOCK_GETCAPS _IOR(PTP_CLK_MAGIC, 1, struct ptp_clock_caps) @@ -87,6 +122,8 @@ struct ptp_sys_offset { #define PTP_PEROUT_REQUEST _IOW(PTP_CLK_MAGIC, 3, struct ptp_perout_request) #define PTP_ENABLE_PPS _IOW(PTP_CLK_MAGIC, 4, int) #define PTP_SYS_OFFSET _IOW(PTP_CLK_MAGIC, 5, struct ptp_sys_offset) +#define PTP_PIN_GETFUNC _IOWR(PTP_CLK_MAGIC, 6, struct ptp_pin_desc) +#define PTP_PIN_SETFUNC _IOW(PTP_CLK_MAGIC, 7, struct ptp_pin_desc) struct ptp_extts_event { struct ptp_clock_time t; /* Time event occured. */ From 888a36871e1924a235ad88198d903382151e4ac5 Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Thu, 20 Mar 2014 22:21:53 +0100 Subject: [PATCH 2/9] ptp: add the pin GET/SETFUNC ioctls to the testptp program. This patch adds a option to the test program that lists the programmable pins on a PTP Hardware Clock device, assuming there are any such pins. A second option lets the user reprogram the auxiliary function of a single pin. Signed-off-by: Richard Cochran Signed-off-by: David S. Miller --- Documentation/ptp/testptp.c | 58 +++++++++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 3 deletions(-) diff --git a/Documentation/ptp/testptp.c b/Documentation/ptp/testptp.c index 4aba0436da65..e9eaee622032 100644 --- a/Documentation/ptp/testptp.c +++ b/Documentation/ptp/testptp.c @@ -120,6 +120,13 @@ static void usage(char *progname) " -i val index for event/trigger\n" " -k val measure the time offset between system and phc clock\n" " for 'val' times (Maximum 25)\n" + " -l list the current pin configuration\n" + " -L pin,val configure pin index 'pin' with function 'val'\n" + " the channel index is taken from the '-i' option\n" + " 'val' specifies the auxiliary function:\n" + " 0 - none\n" + " 1 - external time stamp\n" + " 2 - periodic output\n" " -p val enable output with a period of 'val' nanoseconds\n" " -P val enable or disable (val=1|0) the system clock PPS\n" " -s set the ptp clock time from the system time\n" @@ -134,6 +141,7 @@ int main(int argc, char *argv[]) struct ptp_extts_event event; struct ptp_extts_request extts_request; struct ptp_perout_request perout_request; + struct ptp_pin_desc desc; struct timespec ts; struct timex tx; @@ -156,11 +164,13 @@ int main(int argc, char *argv[]) int extts = 0; int gettime = 0; int index = 0; + int list_pins = 0; int oneshot = 0; int pct_offset = 0; int n_samples = 0; int periodic = 0; int perout = -1; + int pin_index = -1, pin_func; int pps = -1; int settime = 0; @@ -169,7 +179,7 @@ int main(int argc, char *argv[]) progname = strrchr(argv[0], '/'); progname = progname ? 1+progname : argv[0]; - while (EOF != (c = getopt(argc, argv, "a:A:cd:e:f:ghi:k:p:P:sSt:v"))) { + while (EOF != (c = getopt(argc, argv, "a:A:cd:e:f:ghi:k:lL:p:P:sSt:v"))) { switch (c) { case 'a': oneshot = atoi(optarg); @@ -199,6 +209,16 @@ int main(int argc, char *argv[]) pct_offset = 1; n_samples = atoi(optarg); break; + case 'l': + list_pins = 1; + break; + case 'L': + cnt = sscanf(optarg, "%d,%d", &pin_index, &pin_func); + if (cnt != 2) { + usage(progname); + return -1; + } + break; case 'p': perout = atoi(optarg); break; @@ -245,12 +265,14 @@ int main(int argc, char *argv[]) " %d programmable alarms\n" " %d external time stamp channels\n" " %d programmable periodic signals\n" - " %d pulse per second\n", + " %d pulse per second\n" + " %d programmable pins\n", caps.max_adj, caps.n_alarm, caps.n_ext_ts, caps.n_per_out, - caps.pps); + caps.pps, + caps.n_pins); } } @@ -331,6 +353,24 @@ int main(int argc, char *argv[]) } } + if (list_pins) { + int n_pins = 0; + if (ioctl(fd, PTP_CLOCK_GETCAPS, &caps)) { + perror("PTP_CLOCK_GETCAPS"); + } else { + n_pins = caps.n_pins; + } + for (i = 0; i < n_pins; i++) { + desc.index = i; + if (ioctl(fd, PTP_PIN_GETFUNC, &desc)) { + perror("PTP_PIN_GETFUNC"); + break; + } + printf("name %s index %u func %u chan %u\n", + desc.name, desc.index, desc.func, desc.chan); + } + } + if (oneshot) { install_handler(SIGALRM, handle_alarm); /* Create a timer. */ @@ -392,6 +432,18 @@ int main(int argc, char *argv[]) } } + if (pin_index >= 0) { + memset(&desc, 0, sizeof(desc)); + desc.index = pin_index; + desc.func = pin_func; + desc.chan = index; + if (ioctl(fd, PTP_PIN_SETFUNC, &desc)) { + perror("PTP_PIN_SETFUNC"); + } else { + puts("set pin function okay"); + } + } + if (pps != -1) { int enable = pps ? 1 : 0; if (ioctl(fd, PTP_ENABLE_PPS, enable)) { From 653104d19a7d490baeb94113151e95d8c04ef01d Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Thu, 20 Mar 2014 22:21:54 +0100 Subject: [PATCH 3/9] ptp: expose the programmable pins via sysfs This patch adds the sysfs hooks needed in order to get and set the programmable pin settings. Signed-off-by: Richard Cochran Signed-off-by: David S. Miller --- Documentation/ABI/testing/sysfs-ptp | 20 +++++ drivers/ptp/ptp_private.h | 3 + drivers/ptp/ptp_sysfs.c | 115 ++++++++++++++++++++++++++++ 3 files changed, 138 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-ptp b/Documentation/ABI/testing/sysfs-ptp index 05aeedf17794..44806a678f12 100644 --- a/Documentation/ABI/testing/sysfs-ptp +++ b/Documentation/ABI/testing/sysfs-ptp @@ -54,6 +54,26 @@ Description: This file contains the number of programmable periodic output channels offered by the PTP hardware clock. +What: /sys/class/ptp/ptpN/n_pins +Date: March 2014 +Contact: Richard Cochran +Description: + This file contains the number of programmable pins + offered by the PTP hardware clock. + +What: /sys/class/ptp/ptpN/pins +Date: March 2014 +Contact: Richard Cochran +Description: + This directory contains one file for each programmable + pin offered by the PTP hardware clock. The file name + is the hardware dependent pin name. Reading from this + file produces two numbers, the assigned function (see + the PTP_PF_ enumeration values in linux/ptp_clock.h) + and the channel number. The function and channel + assignment may be changed by two writing numbers into + the file. + What: /sys/class/ptp/ptpN/pps_avaiable Date: September 2010 Contact: Richard Cochran diff --git a/drivers/ptp/ptp_private.h b/drivers/ptp/ptp_private.h index b114a84c63c7..9c5d41421b65 100644 --- a/drivers/ptp/ptp_private.h +++ b/drivers/ptp/ptp_private.h @@ -51,6 +51,9 @@ struct ptp_clock { struct mutex pincfg_mux; /* protect concurrent info->pin_config access */ wait_queue_head_t tsev_wq; int defunct; /* tells readers to go away when clock is being removed */ + struct device_attribute *pin_dev_attr; + struct attribute **pin_attr; + struct attribute_group pin_attr_group; }; /* diff --git a/drivers/ptp/ptp_sysfs.c b/drivers/ptp/ptp_sysfs.c index 13ec5311746a..302e626fe6b0 100644 --- a/drivers/ptp/ptp_sysfs.c +++ b/drivers/ptp/ptp_sysfs.c @@ -18,6 +18,7 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include +#include #include "ptp_private.h" @@ -42,6 +43,7 @@ PTP_SHOW_INT(max_adjustment, max_adj); PTP_SHOW_INT(n_alarms, n_alarm); PTP_SHOW_INT(n_external_timestamps, n_ext_ts); PTP_SHOW_INT(n_periodic_outputs, n_per_out); +PTP_SHOW_INT(n_programmable_pins, n_pins); PTP_SHOW_INT(pps_available, pps); static struct attribute *ptp_attrs[] = { @@ -50,6 +52,7 @@ static struct attribute *ptp_attrs[] = { &dev_attr_n_alarms.attr, &dev_attr_n_external_timestamps.attr, &dev_attr_n_periodic_outputs.attr, + &dev_attr_n_programmable_pins.attr, &dev_attr_pps_available.attr, NULL, }; @@ -175,6 +178,63 @@ static ssize_t pps_enable_store(struct device *dev, return err; } +static int ptp_pin_name2index(struct ptp_clock *ptp, const char *name) +{ + int i; + for (i = 0; i < ptp->info->n_pins; i++) { + if (!strcmp(ptp->info->pin_config[i].name, name)) + return i; + } + return -1; +} + +static ssize_t ptp_pin_show(struct device *dev, struct device_attribute *attr, + char *page) +{ + struct ptp_clock *ptp = dev_get_drvdata(dev); + unsigned int func, chan; + int index; + + index = ptp_pin_name2index(ptp, attr->attr.name); + if (index < 0) + return -EINVAL; + + if (mutex_lock_interruptible(&ptp->pincfg_mux)) + return -ERESTARTSYS; + + func = ptp->info->pin_config[index].func; + chan = ptp->info->pin_config[index].chan; + + mutex_unlock(&ptp->pincfg_mux); + + return snprintf(page, PAGE_SIZE, "%u %u\n", func, chan); +} + +static ssize_t ptp_pin_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct ptp_clock *ptp = dev_get_drvdata(dev); + unsigned int func, chan; + int cnt, err, index; + + cnt = sscanf(buf, "%u %u", &func, &chan); + if (cnt != 2) + return -EINVAL; + + index = ptp_pin_name2index(ptp, attr->attr.name); + if (index < 0) + return -EINVAL; + + if (mutex_lock_interruptible(&ptp->pincfg_mux)) + return -ERESTARTSYS; + err = ptp_set_pinfunc(ptp, index, func, chan); + mutex_unlock(&ptp->pincfg_mux); + if (err) + return err; + + return count; +} + static DEVICE_ATTR(extts_enable, 0220, NULL, extts_enable_store); static DEVICE_ATTR(fifo, 0444, extts_fifo_show, NULL); static DEVICE_ATTR(period, 0220, NULL, period_store); @@ -195,9 +255,56 @@ int ptp_cleanup_sysfs(struct ptp_clock *ptp) if (info->pps) device_remove_file(dev, &dev_attr_pps_enable); + if (info->n_pins) { + sysfs_remove_group(&dev->kobj, &ptp->pin_attr_group); + kfree(ptp->pin_attr); + kfree(ptp->pin_dev_attr); + } return 0; } +static int ptp_populate_pins(struct ptp_clock *ptp) +{ + struct device *dev = ptp->dev; + struct ptp_clock_info *info = ptp->info; + int err = -ENOMEM, i, n_pins = info->n_pins; + + ptp->pin_dev_attr = kzalloc(n_pins * sizeof(*ptp->pin_dev_attr), + GFP_KERNEL); + if (!ptp->pin_dev_attr) + goto no_dev_attr; + + ptp->pin_attr = kzalloc((1 + n_pins) * sizeof(struct attribute *), + GFP_KERNEL); + if (!ptp->pin_attr) + goto no_pin_attr; + + for (i = 0; i < n_pins; i++) { + struct device_attribute *da = &ptp->pin_dev_attr[i]; + sysfs_attr_init(&da->attr); + da->attr.name = info->pin_config[i].name; + da->attr.mode = 0644; + da->show = ptp_pin_show; + da->store = ptp_pin_store; + ptp->pin_attr[i] = &da->attr; + } + + ptp->pin_attr_group.name = "pins"; + ptp->pin_attr_group.attrs = ptp->pin_attr; + + err = sysfs_create_group(&dev->kobj, &ptp->pin_attr_group); + if (err) + goto no_group; + return 0; + +no_group: + kfree(ptp->pin_attr); +no_pin_attr: + kfree(ptp->pin_dev_attr); +no_dev_attr: + return err; +} + int ptp_populate_sysfs(struct ptp_clock *ptp) { struct device *dev = ptp->dev; @@ -222,7 +329,15 @@ int ptp_populate_sysfs(struct ptp_clock *ptp) if (err) goto out4; } + if (info->n_pins) { + err = ptp_populate_pins(ptp); + if (err) + goto out5; + } return 0; +out5: + if (info->pps) + device_remove_file(dev, &dev_attr_pps_enable); out4: if (info->n_per_out) device_remove_file(dev, &dev_attr_period); From 4986b4f008c45cf846dfe76a4602b4a7b027650c Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Thu, 20 Mar 2014 22:21:55 +0100 Subject: [PATCH 4/9] ptp: drivers: set the number of programmable pins. This patch updates the many PTP Hardware Clock drivers with the newly introduced field that advertises the number of programmable pins. Some of these devices do have programmable pins, but the implementation will have to wait for follow on patches. Signed-off-by: Richard Cochran Acked-by: Jeff Kirsher Signed-off-by: David S. Miller --- drivers/net/ethernet/adi/bfin_mac.c | 1 + drivers/net/ethernet/broadcom/tg3.c | 1 + drivers/net/ethernet/freescale/fec_ptp.c | 1 + drivers/net/ethernet/freescale/gianfar_ptp.c | 1 + drivers/net/ethernet/intel/e1000e/ptp.c | 1 + drivers/net/ethernet/mellanox/mlx4/en_clock.c | 1 + drivers/net/ethernet/sfc/ptp.c | 1 + drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c | 1 + drivers/net/ethernet/ti/cpts.c | 1 + drivers/net/ethernet/tile/tilegx.c | 1 + drivers/ptp/ptp_ixp46x.c | 1 + drivers/ptp/ptp_pch.c | 1 + 12 files changed, 12 insertions(+) diff --git a/drivers/net/ethernet/adi/bfin_mac.c b/drivers/net/ethernet/adi/bfin_mac.c index c0f68dcd1dc1..83a8cdbcd936 100644 --- a/drivers/net/ethernet/adi/bfin_mac.c +++ b/drivers/net/ethernet/adi/bfin_mac.c @@ -1040,6 +1040,7 @@ static struct ptp_clock_info bfin_ptp_caps = { .n_alarm = 0, .n_ext_ts = 0, .n_per_out = 0, + .n_pins = 0, .pps = 0, .adjfreq = bfin_ptp_adjfreq, .adjtime = bfin_ptp_adjtime, diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index bbbd2a4bc161..37422af9ef13 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c @@ -6322,6 +6322,7 @@ static const struct ptp_clock_info tg3_ptp_caps = { .n_alarm = 0, .n_ext_ts = 0, .n_per_out = 1, + .n_pins = 0, .pps = 0, .adjfreq = tg3_ptp_adjfreq, .adjtime = tg3_ptp_adjtime, diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c index 89ccb5b08708..82386b29914a 100644 --- a/drivers/net/ethernet/freescale/fec_ptp.c +++ b/drivers/net/ethernet/freescale/fec_ptp.c @@ -372,6 +372,7 @@ void fec_ptp_init(struct platform_device *pdev) fep->ptp_caps.n_alarm = 0; fep->ptp_caps.n_ext_ts = 0; fep->ptp_caps.n_per_out = 0; + fep->ptp_caps.n_pins = 0; fep->ptp_caps.pps = 0; fep->ptp_caps.adjfreq = fec_ptp_adjfreq; fep->ptp_caps.adjtime = fec_ptp_adjtime; diff --git a/drivers/net/ethernet/freescale/gianfar_ptp.c b/drivers/net/ethernet/freescale/gianfar_ptp.c index abc28da27042..bb568006f37d 100644 --- a/drivers/net/ethernet/freescale/gianfar_ptp.c +++ b/drivers/net/ethernet/freescale/gianfar_ptp.c @@ -414,6 +414,7 @@ static struct ptp_clock_info ptp_gianfar_caps = { .n_alarm = 0, .n_ext_ts = N_EXT_TS, .n_per_out = 0, + .n_pins = 0, .pps = 1, .adjfreq = ptp_gianfar_adjfreq, .adjtime = ptp_gianfar_adjtime, diff --git a/drivers/net/ethernet/intel/e1000e/ptp.c b/drivers/net/ethernet/intel/e1000e/ptp.c index 3bd79a3ff829..fb1a914a3ad4 100644 --- a/drivers/net/ethernet/intel/e1000e/ptp.c +++ b/drivers/net/ethernet/intel/e1000e/ptp.c @@ -189,6 +189,7 @@ static const struct ptp_clock_info e1000e_ptp_clock_info = { .n_alarm = 0, .n_ext_ts = 0, .n_per_out = 0, + .n_pins = 0, .pps = 0, .adjfreq = e1000e_phc_adjfreq, .adjtime = e1000e_phc_adjtime, diff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c index abaf6bb22416..57dda95b67d8 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_clock.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_clock.c @@ -276,6 +276,7 @@ static const struct ptp_clock_info mlx4_en_ptp_clock_info = { .n_alarm = 0, .n_ext_ts = 0, .n_per_out = 0, + .n_pins = 0, .pps = 0, .adjfreq = mlx4_en_phc_adjfreq, .adjtime = mlx4_en_phc_adjtime, diff --git a/drivers/net/ethernet/sfc/ptp.c b/drivers/net/ethernet/sfc/ptp.c index 722344fcd155..6b861e3de4b0 100644 --- a/drivers/net/ethernet/sfc/ptp.c +++ b/drivers/net/ethernet/sfc/ptp.c @@ -1194,6 +1194,7 @@ static const struct ptp_clock_info efx_phc_clock_info = { .n_alarm = 0, .n_ext_ts = 0, .n_per_out = 0, + .n_pins = 0, .pps = 1, .adjfreq = efx_phc_adjfreq, .adjtime = efx_phc_adjtime, diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c index 7680581ebe12..b7ad3565566c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c @@ -164,6 +164,7 @@ static struct ptp_clock_info stmmac_ptp_clock_ops = { .n_alarm = 0, .n_ext_ts = 0, .n_per_out = 0, + .n_pins = 0, .pps = 0, .adjfreq = stmmac_adjust_freq, .adjtime = stmmac_adjust_time, diff --git a/drivers/net/ethernet/ti/cpts.c b/drivers/net/ethernet/ti/cpts.c index 8c351f100aca..372cb192c5aa 100644 --- a/drivers/net/ethernet/ti/cpts.c +++ b/drivers/net/ethernet/ti/cpts.c @@ -217,6 +217,7 @@ static struct ptp_clock_info cpts_info = { .name = "CTPS timer", .max_adj = 1000000, .n_ext_ts = 0, + .n_pins = 0, .pps = 0, .adjfreq = cpts_ptp_adjfreq, .adjtime = cpts_ptp_adjtime, diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c index b43f1b3b9632..7e1c91d41a87 100644 --- a/drivers/net/ethernet/tile/tilegx.c +++ b/drivers/net/ethernet/tile/tilegx.c @@ -873,6 +873,7 @@ static struct ptp_clock_info ptp_mpipe_caps = { .name = "mPIPE clock", .max_adj = 999999999, .n_ext_ts = 0, + .n_pins = 0, .pps = 0, .adjfreq = ptp_mpipe_adjfreq, .adjtime = ptp_mpipe_adjtime, diff --git a/drivers/ptp/ptp_ixp46x.c b/drivers/ptp/ptp_ixp46x.c index 4a08727fcaf3..604d340f2095 100644 --- a/drivers/ptp/ptp_ixp46x.c +++ b/drivers/ptp/ptp_ixp46x.c @@ -244,6 +244,7 @@ static struct ptp_clock_info ptp_ixp_caps = { .name = "IXP46X timer", .max_adj = 66666655, .n_ext_ts = N_EXT_TS, + .n_pins = 0, .pps = 0, .adjfreq = ptp_ixp_adjfreq, .adjtime = ptp_ixp_adjtime, diff --git a/drivers/ptp/ptp_pch.c b/drivers/ptp/ptp_pch.c index 71a2559278d7..90a106308c4f 100644 --- a/drivers/ptp/ptp_pch.c +++ b/drivers/ptp/ptp_pch.c @@ -514,6 +514,7 @@ static struct ptp_clock_info ptp_pch_caps = { .name = "PCH timer", .max_adj = 50000000, .n_ext_ts = N_EXT_TS, + .n_pins = 0, .pps = 0, .adjfreq = ptp_pch_adjfreq, .adjtime = ptp_pch_adjtime, From fbf4b9349f8b830ce5ff11c5804bdfa8b1176a7e Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Thu, 20 Mar 2014 22:21:56 +0100 Subject: [PATCH 5/9] dp83640: trivial fixes This patch cleans up the input checking code on the external time stamp function by using an unsigned rather than a signed channel index. Also, this patch corrects the author's email address. When this macro was last changed, the top level domain part of the email address was left behind. Signed-off-by: Richard Cochran Signed-off-by: David S. Miller --- drivers/net/phy/dp83640.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c index 98e7cbf720a5..d6c106113932 100644 --- a/drivers/net/phy/dp83640.c +++ b/drivers/net/phy/dp83640.c @@ -424,13 +424,13 @@ static int ptp_dp83640_enable(struct ptp_clock_info *ptp, struct dp83640_clock *clock = container_of(ptp, struct dp83640_clock, caps); struct phy_device *phydev = clock->chosen->phydev; - int index; + unsigned int index; u16 evnt, event_num, gpio_num; switch (rq->type) { case PTP_CLK_REQ_EXTTS: index = rq->extts.index; - if (index < 0 || index >= N_EXT_TS) + if (index >= N_EXT_TS) return -EINVAL; event_num = EXT_EVENT + index; evnt = EVNT_WR | (event_num & EVNT_SEL_MASK) << EVNT_SEL_SHIFT; @@ -1363,7 +1363,7 @@ static void __exit dp83640_exit(void) } MODULE_DESCRIPTION("National Semiconductor DP83640 PHY driver"); -MODULE_AUTHOR("Richard Cochran "); +MODULE_AUTHOR("Richard Cochran "); MODULE_LICENSE("GPL"); module_init(dp83640_init); From 564ca56e45469f48703b1de72ac64d143d18d0ee Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Thu, 20 Mar 2014 22:21:57 +0100 Subject: [PATCH 6/9] dp83640: correct the periodic output frequency The phyter driver incorrectly feeds the value of the period into what is in fact a pulse width register, resulting in the actual period being twice the dialed value. This patch fixes the issue and renames a variable to make the code at bit more clear. Signed-off-by: Richard Cochran Signed-off-by: David S. Miller --- drivers/net/phy/dp83640.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c index d6c106113932..9e265553e8e4 100644 --- a/drivers/net/phy/dp83640.c +++ b/drivers/net/phy/dp83640.c @@ -271,7 +271,7 @@ static void periodic_output(struct dp83640_clock *clock, { struct dp83640_private *dp83640 = clock->chosen; struct phy_device *phydev = dp83640->phydev; - u32 sec, nsec, period; + u32 sec, nsec, pwidth; u16 gpio, ptp_trig, trigger, val; gpio = on ? gpio_tab[PEROUT_GPIO] : 0; @@ -296,8 +296,9 @@ static void periodic_output(struct dp83640_clock *clock, sec = clkreq->perout.start.sec; nsec = clkreq->perout.start.nsec; - period = clkreq->perout.period.sec * 1000000000UL; - period += clkreq->perout.period.nsec; + pwidth = clkreq->perout.period.sec * 1000000000UL; + pwidth += clkreq->perout.period.nsec; + pwidth /= 2; mutex_lock(&clock->extreg_lock); @@ -310,8 +311,8 @@ static void periodic_output(struct dp83640_clock *clock, ext_write(0, phydev, PAGE4, PTP_TDR, nsec >> 16); /* ns[31:16] */ ext_write(0, phydev, PAGE4, PTP_TDR, sec & 0xffff); /* sec[15:0] */ ext_write(0, phydev, PAGE4, PTP_TDR, sec >> 16); /* sec[31:16] */ - ext_write(0, phydev, PAGE4, PTP_TDR, period & 0xffff); /* ns[15:0] */ - ext_write(0, phydev, PAGE4, PTP_TDR, period >> 16); /* ns[31:16] */ + ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff); /* ns[15:0] */ + ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16); /* ns[31:16] */ /*enable trigger*/ val &= ~TRIG_LOAD; From 86dd3612e1e0ffdfafa15021581bb45419d479b9 Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Thu, 20 Mar 2014 22:21:58 +0100 Subject: [PATCH 7/9] dp83640: implement programmable pin functions. This patch adapts the dp83640 driver to allow reconfiguration of which auxiliary function goes on which pin. The functions may be reassigned freely with the one exception of the calibration function. Signed-off-by: Richard Cochran Signed-off-by: David S. Miller --- drivers/net/phy/dp83640.c | 52 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c index 9e265553e8e4..43b583b2bed7 100644 --- a/drivers/net/phy/dp83640.c +++ b/drivers/net/phy/dp83640.c @@ -47,6 +47,7 @@ #define CAL_EVENT 7 #define CAL_TRIGGER 7 #define PER_TRIGGER 6 +#define DP83640_N_PINS 12 #define MII_DP83640_MICR 0x11 #define MII_DP83640_MISR 0x12 @@ -173,6 +174,37 @@ MODULE_PARM_DESC(chosen_phy, \ MODULE_PARM_DESC(gpio_tab, \ "Which GPIO line to use for which purpose: cal,perout,extts1,...,extts6"); +static void dp83640_gpio_defaults(struct ptp_pin_desc *pd) +{ + int i, index; + + for (i = 0; i < DP83640_N_PINS; i++) { + snprintf(pd[i].name, sizeof(pd[i].name), "GPIO%d", 1 + i); + pd[i].index = i; + } + + for (i = 0; i < GPIO_TABLE_SIZE; i++) { + if (gpio_tab[i] < 1 || gpio_tab[i] > DP83640_N_PINS) { + pr_err("gpio_tab[%d]=%hu out of range", i, gpio_tab[i]); + return; + } + } + + index = gpio_tab[CALIBRATE_GPIO] - 1; + pd[index].func = PTP_PF_PHYSYNC; + pd[index].chan = 0; + + index = gpio_tab[PEROUT_GPIO] - 1; + pd[index].func = PTP_PF_PEROUT; + pd[index].chan = 0; + + for (i = EXTTS0_GPIO; i < GPIO_TABLE_SIZE; i++) { + index = gpio_tab[i] - 1; + pd[index].func = PTP_PF_EXTTS; + pd[index].chan = i - EXTTS0_GPIO; + } +} + /* a list of clocks and a mutex to protect it */ static LIST_HEAD(phyter_clocks); static DEFINE_MUTEX(phyter_clocks_lock); @@ -459,6 +491,12 @@ static int ptp_dp83640_enable(struct ptp_clock_info *ptp, return -EOPNOTSUPP; } +static int ptp_dp83640_verify(struct ptp_clock_info *ptp, unsigned int pin, + enum ptp_pin_function func, unsigned int chan) +{ + return 0; +} + static u8 status_frame_dst[6] = { 0x01, 0x1B, 0x19, 0x00, 0x00, 0x00 }; static u8 status_frame_src[6] = { 0x08, 0x00, 0x17, 0x0B, 0x6B, 0x0F }; @@ -876,6 +914,7 @@ static void dp83640_free_clocks(void) mutex_destroy(&clock->extreg_lock); mutex_destroy(&clock->clock_lock); put_device(&clock->bus->dev); + kfree(clock->caps.pin_config); kfree(clock); } @@ -895,12 +934,18 @@ static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus) clock->caps.n_alarm = 0; clock->caps.n_ext_ts = N_EXT_TS; clock->caps.n_per_out = 1; + clock->caps.n_pins = DP83640_N_PINS; clock->caps.pps = 0; clock->caps.adjfreq = ptp_dp83640_adjfreq; clock->caps.adjtime = ptp_dp83640_adjtime; clock->caps.gettime = ptp_dp83640_gettime; clock->caps.settime = ptp_dp83640_settime; clock->caps.enable = ptp_dp83640_enable; + clock->caps.verify = ptp_dp83640_verify; + /* + * Convert the module param defaults into a dynamic pin configuration. + */ + dp83640_gpio_defaults(clock->caps.pin_config); /* * Get a reference to this bus instance. */ @@ -951,6 +996,13 @@ static struct dp83640_clock *dp83640_clock_get_bus(struct mii_bus *bus) if (!clock) goto out; + clock->caps.pin_config = kzalloc(sizeof(struct ptp_pin_desc) * + DP83640_N_PINS, GFP_KERNEL); + if (!clock->caps.pin_config) { + kfree(clock); + clock = NULL; + goto out; + } dp83640_clock_init(clock, bus); list_add_tail(&phyter_clocks, &clock->list); out: From faa8971607322d9244b3c15799f02ae533769bf8 Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Thu, 20 Mar 2014 22:21:59 +0100 Subject: [PATCH 8/9] dp83640: let external input pins from the module parameters be defaults. This patch changes the driver to use the new pin configuration method when programming the external time stamp input signals. Signed-off-by: Richard Cochran Signed-off-by: David S. Miller --- drivers/net/phy/dp83640.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c index 43b583b2bed7..93db56438915 100644 --- a/drivers/net/phy/dp83640.c +++ b/drivers/net/phy/dp83640.c @@ -468,7 +468,10 @@ static int ptp_dp83640_enable(struct ptp_clock_info *ptp, event_num = EXT_EVENT + index; evnt = EVNT_WR | (event_num & EVNT_SEL_MASK) << EVNT_SEL_SHIFT; if (on) { - gpio_num = gpio_tab[EXTTS0_GPIO + index]; + gpio_num = 1 + ptp_find_pin(clock->ptp_clock, + PTP_PF_EXTTS, index); + if (gpio_num < 1) + return -EINVAL; evnt |= (gpio_num & EVNT_GPIO_MASK) << EVNT_GPIO_SHIFT; if (rq->extts.flags & PTP_FALLING_EDGE) evnt |= EVNT_FALL; From 621bdeccdcc71ddb54591107080059ba67f2fcaf Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Thu, 20 Mar 2014 22:22:00 +0100 Subject: [PATCH 9/9] dp83640: let the periodic pin from the module parameter be a default. This patch changes the driver use the new pin configuration method when programming the periodic output signal. Signed-off-by: Richard Cochran Signed-off-by: David S. Miller --- drivers/net/phy/dp83640.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c index 93db56438915..352c5e45fe9c 100644 --- a/drivers/net/phy/dp83640.c +++ b/drivers/net/phy/dp83640.c @@ -298,15 +298,22 @@ static u64 phy2txts(struct phy_txts *p) return ns; } -static void periodic_output(struct dp83640_clock *clock, - struct ptp_clock_request *clkreq, bool on) +static int periodic_output(struct dp83640_clock *clock, + struct ptp_clock_request *clkreq, bool on) { struct dp83640_private *dp83640 = clock->chosen; struct phy_device *phydev = dp83640->phydev; u32 sec, nsec, pwidth; u16 gpio, ptp_trig, trigger, val; - gpio = on ? gpio_tab[PEROUT_GPIO] : 0; + if (on) { + gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PEROUT, 0); + if (gpio < 1) + return -EINVAL; + } else { + gpio = 0; + } + trigger = PER_TRIGGER; ptp_trig = TRIG_WR | @@ -323,7 +330,7 @@ static void periodic_output(struct dp83640_clock *clock, ext_write(0, phydev, PAGE5, PTP_TRIG, ptp_trig); ext_write(0, phydev, PAGE4, PTP_CTL, val); mutex_unlock(&clock->extreg_lock); - return; + return 0; } sec = clkreq->perout.start.sec; @@ -352,6 +359,7 @@ static void periodic_output(struct dp83640_clock *clock, ext_write(0, phydev, PAGE4, PTP_CTL, val); mutex_unlock(&clock->extreg_lock); + return 0; } /* ptp clock methods */ @@ -484,8 +492,7 @@ static int ptp_dp83640_enable(struct ptp_clock_info *ptp, case PTP_CLK_REQ_PEROUT: if (rq->perout.index != 0) return -EINVAL; - periodic_output(clock, rq, on); - return 0; + return periodic_output(clock, rq, on); default: break;