mfd: axp20x: Add support for AXP192

The AXP192 PMIC is similar to the AXP202/AXP209, but with different
regulators, additional GPIOs, and a different IRQ register layout.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20230511092609.76183-1-aidanmacdonald.0x0@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
This commit is contained in:
Aidan MacDonald
2023-05-11 10:26:08 +01:00
committed by Lee Jones
parent 35d5ebfa95
commit 63eeabbc9d
3 changed files with 227 additions and 0 deletions

View File

@@ -12,6 +12,7 @@
enum axp20x_variants {
AXP152_ID = 0,
AXP192_ID,
AXP202_ID,
AXP209_ID,
AXP221_ID,
@@ -26,6 +27,7 @@ enum axp20x_variants {
NR_AXP20X_VARIANTS,
};
#define AXP192_DATACACHE(m) (0x06 + (m))
#define AXP20X_DATACACHE(m) (0x04 + (m))
/* Power supply */
@@ -47,6 +49,13 @@ enum axp20x_variants {
#define AXP152_DCDC_FREQ 0x37
#define AXP152_DCDC_MODE 0x80
#define AXP192_USB_OTG_STATUS 0x04
#define AXP192_PWR_OUT_CTRL 0x12
#define AXP192_DCDC2_V_OUT 0x23
#define AXP192_DCDC1_V_OUT 0x26
#define AXP192_DCDC3_V_OUT 0x27
#define AXP192_LDO2_3_V_OUT 0x28
#define AXP20X_PWR_INPUT_STATUS 0x00
#define AXP20X_PWR_OP_MODE 0x01
#define AXP20X_USB_OTG_STATUS 0x02
@@ -185,6 +194,17 @@ enum axp20x_variants {
#define AXP152_IRQ2_STATE 0x49
#define AXP152_IRQ3_STATE 0x4a
#define AXP192_IRQ1_EN 0x40
#define AXP192_IRQ2_EN 0x41
#define AXP192_IRQ3_EN 0x42
#define AXP192_IRQ4_EN 0x43
#define AXP192_IRQ1_STATE 0x44
#define AXP192_IRQ2_STATE 0x45
#define AXP192_IRQ3_STATE 0x46
#define AXP192_IRQ4_STATE 0x47
#define AXP192_IRQ5_EN 0x4a
#define AXP192_IRQ5_STATE 0x4d
#define AXP20X_IRQ1_EN 0x40
#define AXP20X_IRQ2_EN 0x41
#define AXP20X_IRQ3_EN 0x42
@@ -204,6 +224,11 @@ enum axp20x_variants {
#define AXP15060_IRQ2_STATE 0x49
/* ADC */
#define AXP192_GPIO2_V_ADC_H 0x68
#define AXP192_GPIO2_V_ADC_L 0x69
#define AXP192_GPIO3_V_ADC_H 0x6a
#define AXP192_GPIO3_V_ADC_L 0x6b
#define AXP20X_ACIN_V_ADC_H 0x56
#define AXP20X_ACIN_V_ADC_L 0x57
#define AXP20X_ACIN_I_ADC_H 0x58
@@ -233,6 +258,8 @@ enum axp20x_variants {
#define AXP20X_IPSOUT_V_HIGH_L 0x7f
/* Power supply */
#define AXP192_GPIO30_IN_RANGE 0x85
#define AXP20X_DCDC_MODE 0x80
#define AXP20X_ADC_EN1 0x82
#define AXP20X_ADC_EN2 0x83
@@ -261,6 +288,16 @@ enum axp20x_variants {
#define AXP152_PWM1_FREQ_Y 0x9c
#define AXP152_PWM1_DUTY_CYCLE 0x9d
#define AXP192_GPIO0_CTRL 0x90
#define AXP192_LDO_IO0_V_OUT 0x91
#define AXP192_GPIO1_CTRL 0x92
#define AXP192_GPIO2_CTRL 0x93
#define AXP192_GPIO2_0_STATE 0x94
#define AXP192_GPIO4_3_CTRL 0x95
#define AXP192_GPIO4_3_STATE 0x96
#define AXP192_GPIO2_0_PULL 0x97
#define AXP192_N_RSTO_CTRL 0x9e
#define AXP20X_GPIO0_CTRL 0x90
#define AXP20X_LDO5_V_OUT 0x91
#define AXP20X_GPIO1_CTRL 0x92
@@ -340,6 +377,17 @@ enum axp20x_variants {
#define AXP288_FG_TUNE5 0xed
/* Regulators IDs */
enum {
AXP192_DCDC1 = 0,
AXP192_DCDC2,
AXP192_DCDC3,
AXP192_LDO1,
AXP192_LDO2,
AXP192_LDO3,
AXP192_LDO_IO0,
AXP192_REG_ID_MAX
};
enum {
AXP20X_LDO1 = 0,
AXP20X_LDO2,
@@ -531,6 +579,42 @@ enum {
AXP152_IRQ_GPIO0_INPUT,
};
enum axp192_irqs {
AXP192_IRQ_ACIN_OVER_V = 1,
AXP192_IRQ_ACIN_PLUGIN,
AXP192_IRQ_ACIN_REMOVAL,
AXP192_IRQ_VBUS_OVER_V,
AXP192_IRQ_VBUS_PLUGIN,
AXP192_IRQ_VBUS_REMOVAL,
AXP192_IRQ_VBUS_V_LOW,
AXP192_IRQ_BATT_PLUGIN,
AXP192_IRQ_BATT_REMOVAL,
AXP192_IRQ_BATT_ENT_ACT_MODE,
AXP192_IRQ_BATT_EXIT_ACT_MODE,
AXP192_IRQ_CHARG,
AXP192_IRQ_CHARG_DONE,
AXP192_IRQ_BATT_TEMP_HIGH,
AXP192_IRQ_BATT_TEMP_LOW,
AXP192_IRQ_DIE_TEMP_HIGH,
AXP192_IRQ_CHARG_I_LOW,
AXP192_IRQ_DCDC1_V_LONG,
AXP192_IRQ_DCDC2_V_LONG,
AXP192_IRQ_DCDC3_V_LONG,
AXP192_IRQ_PEK_SHORT = 22,
AXP192_IRQ_PEK_LONG,
AXP192_IRQ_N_OE_PWR_ON,
AXP192_IRQ_N_OE_PWR_OFF,
AXP192_IRQ_VBUS_VALID,
AXP192_IRQ_VBUS_NOT_VALID,
AXP192_IRQ_VBUS_SESS_VALID,
AXP192_IRQ_VBUS_SESS_END,
AXP192_IRQ_LOW_PWR_LVL = 31,
AXP192_IRQ_TIMER,
AXP192_IRQ_GPIO2_INPUT = 37,
AXP192_IRQ_GPIO1_INPUT,
AXP192_IRQ_GPIO0_INPUT,
};
enum {
AXP20X_IRQ_ACIN_OVER_V = 1,
AXP20X_IRQ_ACIN_PLUGIN,