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prctl: add arch-agnostic prctl()s for indirect branch tracking
Three architectures (x86, aarch64, riscv) have support for indirect
branch tracking feature in a very similar fashion. On a very high
level, indirect branch tracking is a CPU feature where CPU tracks
branches which use a memory operand to transfer control. As part of
this tracking, during an indirect branch, the CPU expects a landing
pad instruction on the target PC, and if not found, the CPU raises
some fault (architecture-dependent).
x86 landing pad instr - 'ENDBRANCH'
arch64 landing pad instr - 'BTI'
riscv landing instr - 'lpad'
Given that three major architectures have support for indirect branch
tracking, this patch creates architecture-agnostic 'prctls' to allow
userspace to control this feature. They are:
- PR_GET_INDIR_BR_LP_STATUS: Get the current configured status for indirect
branch tracking.
- PR_SET_INDIR_BR_LP_STATUS: Set the configuration for indirect branch
tracking.
The following status options are allowed:
- PR_INDIR_BR_LP_ENABLE: Enables indirect branch tracking on user
thread.
- PR_INDIR_BR_LP_DISABLE: Disables indirect branch tracking on user
thread.
- PR_LOCK_INDIR_BR_LP_STATUS: Locks configured status for indirect branch
tracking for user thread.
Reviewed-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de> # QEMU, custom CVA6
Tested-by: Valentin Haudiquet <valentin.haudiquet@canonical.com>
Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-13-b55691eacf4f@rivosinc.com
[pjw@kernel.org: cleaned up patch description, code comments]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
This commit is contained in:
committed by
Paul Walmsley
parent
61a0200211
commit
5ca243f6e3
@@ -229,4 +229,8 @@ static inline bool cpu_attack_vector_mitigated(enum cpu_attack_vectors v)
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#define smt_mitigations SMT_MITIGATIONS_OFF
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#endif
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int arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status);
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int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status);
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int arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status);
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#endif /* _LINUX_CPU_H_ */
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@@ -386,4 +386,31 @@ struct prctl_mm_map {
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# define PR_FUTEX_HASH_SET_SLOTS 1
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# define PR_FUTEX_HASH_GET_SLOTS 2
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/*
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* Get the current indirect branch tracking configuration for the current
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* thread, this will be the value configured via PR_SET_INDIR_BR_LP_STATUS.
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*/
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#define PR_GET_INDIR_BR_LP_STATUS 79
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/*
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* Set the indirect branch tracking configuration. PR_INDIR_BR_LP_ENABLE will
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* enable cpu feature for user thread, to track all indirect branches and ensure
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* they land on arch defined landing pad instruction.
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* x86 - If enabled, an indirect branch must land on an ENDBRANCH instruction.
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* arch64 - If enabled, an indirect branch must land on a BTI instruction.
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* riscv - If enabled, an indirect branch must land on an lpad instruction.
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* PR_INDIR_BR_LP_DISABLE will disable feature for user thread and indirect
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* branches will no more be tracked by cpu to land on arch defined landing pad
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* instruction.
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*/
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#define PR_SET_INDIR_BR_LP_STATUS 80
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# define PR_INDIR_BR_LP_ENABLE (1UL << 0)
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/*
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* Prevent further changes to the specified indirect branch tracking
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* configuration. All bits may be locked via this call, including
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* undefined bits.
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*/
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#define PR_LOCK_INDIR_BR_LP_STATUS 81
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#endif /* _LINUX_PRCTL_H */
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30
kernel/sys.c
30
kernel/sys.c
@@ -2388,6 +2388,21 @@ int __weak arch_lock_shadow_stack_status(struct task_struct *t, unsigned long st
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return -EINVAL;
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}
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int __weak arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status)
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{
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return -EINVAL;
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}
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int __weak arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status)
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{
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return -EINVAL;
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}
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int __weak arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status)
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{
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return -EINVAL;
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}
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#define PR_IO_FLUSHER (PF_MEMALLOC_NOIO | PF_LOCAL_THROTTLE)
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static int prctl_set_vma(unsigned long opt, unsigned long addr,
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@@ -2868,6 +2883,21 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,
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case PR_FUTEX_HASH:
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error = futex_hash_prctl(arg2, arg3, arg4);
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break;
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case PR_GET_INDIR_BR_LP_STATUS:
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if (arg3 || arg4 || arg5)
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return -EINVAL;
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error = arch_get_indir_br_lp_status(me, (unsigned long __user *)arg2);
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break;
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case PR_SET_INDIR_BR_LP_STATUS:
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if (arg3 || arg4 || arg5)
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return -EINVAL;
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error = arch_set_indir_br_lp_status(me, arg2);
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break;
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case PR_LOCK_INDIR_BR_LP_STATUS:
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if (arg3 || arg4 || arg5)
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return -EINVAL;
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error = arch_lock_indir_br_lp_status(me, arg2);
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break;
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default:
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trace_task_prctl_unknown(option, arg2, arg3, arg4, arg5);
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error = -EINVAL;
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