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octeontx2-af: reserve 4 PKINDs for skip-size custom use

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The NPC block uses PKINDs to determine how incoming packets are
parsed. Reserve PKINDs 46-49 (NPC_RX_SKIP_SIZE_PKIND) for
configurable L2 skip-size use in the first pass, and PKINDs 50-53
(NPC_RX_CPT_SKIP_SIZE_PKIND) for the second pass where packets
carry a CPT (Cryptographic Accelerator Unit) header.

Add npc_set_skip_size_pkind() to program NPC_AF_PKINDX_ACTION0
for these reserved PKINDs with a user-supplied ptr_advance value
representing the L2 size to skip. For the corresponding CPT PKINDs
(pkind + 4), additionally configure the var_len_offset, var_len_mask,
var_len_shift, and var_len_right fields so the NPC can extract the
inner payload length from the CPT header.

Update rvu_npc_set_parse_mode() to accept a new skip_size argument
and dispatch to npc_set_skip_size_pkind() when the requested PKIND
falls in the newly reserved range. Extend the npc_set_pkind mbox
message struct with a skip_size field so PF/VF drivers can supply
this value at run time.

Advance NPC_UNRESERVED_PKIND_COUNT to NPC_RX_SKIP_SIZE_PKIND to
reflect the updated reservation boundary.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Nitin Shetty J <nshettyj@marvell.com>
Link: https://patch.msgid.link/20260630062145.2533816-2-nshettyj@marvell.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Kiran Kumar K
2026-06-30 11:51:44 +05:30
committed by Paolo Abeni
parent 140be217df
commit 5ba5611ef9
5 changed files with 46 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/net/ethernet/marvell/octeontx2/af/mbox.h
View File

@@ -803,6 +803,7 @@ struct npc_set_pkind {
*/
u8 var_len_off_mask; /* Mask for length with in offset */
u8 shift_dir; /* shift direction to get length of the header at var_len_off */
u8 skip_size; /* l2 size to skip */
};
/* NPA mbox message formats */

4
drivers/net/ethernet/marvell/octeontx2/af/npc.h
View File

@@ -161,10 +161,12 @@ enum npc_kpu_lh_ltype {
* Software assigns pkind for each incoming port such as CGX
* Ethernet interfaces, LBK interfaces, etc.
*/
#define NPC_UNRESERVED_PKIND_COUNT NPC_RX_CPT_HDR_PTP_PKIND
#define NPC_UNRESERVED_PKIND_COUNT NPC_RX_SKIP_SIZE_PKIND
enum npc_pkind_type {
NPC_RX_LBK_PKIND = 0ULL,
NPC_RX_SKIP_SIZE_PKIND = 46ULL,
NPC_RX_CPT_SKIP_SIZE_PKIND = 50ULL,
NPC_RX_CPT_HDR_PTP_PKIND = 54ULL,
NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL,
NPC_RX_VLAN_EXDSA_PKIND = 56ULL,

2
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
View File

@@ -1181,7 +1181,7 @@ void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool ena);
int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,
u64 pkind, u8 var_len_off, u8 var_len_off_mask,
u8 shift_dir);
u8 shift_dir, u8 skip_size);
int rvu_get_hwvf(struct rvu *rvu, int pcifunc);
/* CN10K MCS */

2
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
View File

@@ -5392,7 +5392,7 @@ void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf)
/* reset HW config done for Switch headers */
rvu_npc_set_parse_mode(rvu, pcifunc, OTX2_PRIV_FLAGS_DEFAULT,
(PKIND_TX | PKIND_RX), 0, 0, 0, 0);
(PKIND_TX | PKIND_RX), 0, 0, 0, 0, 0);
/* Disabling CGX and NPC config done for PTP */
if (pfvf->hw_rx_tstamp_en) {

43
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
View File

@@ -4194,10 +4194,40 @@ npc_set_var_len_offset_pkind(struct rvu *rvu, u16 pcifunc, u64 pkind,
return 0;
}
static int npc_set_skip_size_pkind(struct rvu *rvu, u16 pcifunc, u64 pkind,
u8 skip_size)
{
struct npc_kpu_action0 *act0;
int blkaddr;
u64 val;
blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, pcifunc);
if (blkaddr < 0) {
dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
return -EINVAL;
}
val = rvu_read64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind));
act0 = (struct npc_kpu_action0 *)&val;
act0->ptr_advance = skip_size;
rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind), val);
/* Update CPT_HR new PKIND */
val = rvu_read64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind + 4));
act0 = (struct npc_kpu_action0 *)&val;
act0->ptr_advance = (skip_size + 40);
act0->next_state = NPC_S_KPU1_CPT_HDR;
act0->var_len_offset = (skip_size + 6);
act0->var_len_mask = 0xe0;
act0->var_len_shift = 0x5;
act0->var_len_right = 0x1;
rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind + 4), val);
return 0;
}
int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,
u64 pkind, u8 var_len_off, u8 var_len_off_mask,
u8 shift_dir)
u8 shift_dir, u8 skip_size)
{
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
int blkaddr, nixlf, rc, intf_mode;
@@ -4218,6 +4248,12 @@ int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,
shift_dir);
if (rc)
return rc;
} else if (pkind >= NPC_RX_SKIP_SIZE_PKIND &&
pkind <= NPC_RX_SKIP_SIZE_PKIND + 3) {
rc = npc_set_skip_size_pkind(rvu, pcifunc, pkind,
skip_size);
if (rc)
return rc;
}
rxpkind = pkind;
txpkind = pkind;
@@ -4254,7 +4290,8 @@ int rvu_mbox_handler_npc_set_pkind(struct rvu *rvu, struct npc_set_pkind *req,
{
return rvu_npc_set_parse_mode(rvu, req->hdr.pcifunc, req->mode,
req->dir, req->pkind, req->var_len_off,
req->var_len_off_mask, req->shift_dir);
req->var_len_off_mask, req->shift_dir,
req->skip_size);
}
int rvu_mbox_handler_npc_read_base_steer_rule(struct rvu *rvu,