ARM: OMAP2: Clock: Add OMAP3 DPLL autoidle functions

This patch adds support for DPLL autoidle control to the OMAP3 clock
framework.  These functions will be used by the noncore DPLL enable
and disable code - this is because, according to the CDP code, the
DPLL autoidle status must be saved and restored across DPLL
lock/bypass/off transitions.

N.B.: the CORE DPLL (DPLL3) has three autoidle mode options, rather
than just two.  This code currently does not support the third option,
low-power bypass autoidle.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Paul Walmsley
2008-07-03 12:24:45 +03:00
committed by Tony Lindgren
parent 097c584cd4
commit 542313cc98
5 changed files with 376 additions and 30 deletions

View File

@@ -34,11 +34,16 @@ struct dpll_data {
u32 mult_mask;
u32 div1_mask;
# if defined(CONFIG_ARCH_OMAP3)
u8 modes;
void __iomem *control_reg;
u32 enable_mask;
u8 auto_recal_bit;
u8 recal_en_bit;
u8 recal_st_bit;
void __iomem *autoidle_reg;
u32 autoidle_mask;
void __iomem *idlest_reg;
u8 idlest_bit;
# endif
};