From 533ec816312baecdb45bbcb8a279c6561aa71215 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Tue, 7 Jul 2026 13:56:02 +0200 Subject: [PATCH] mtd: rawnand: qcom: Make "aon" clock optional Some SoCs (e.g. MDM9607, SDX55) have only a single separately controllable clock for the NAND controller. The actual clocks in the hardware are managed by the firmware and turned on all together when needed. In this case, there is no separate "aon" clock that can be described in the device tree from the OS point of view. Make the second "aon" clock optional to avoid an error when it is missing. For platforms that really need it, the dt-bindings are responsible for validating that. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Manivannan Sadhasivam Signed-off-by: Stephan Gerhold Signed-off-by: Miquel Raynal --- drivers/mtd/nand/raw/qcom_nandc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c index 4b80ce084d9a..0251dd591d40 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c @@ -2280,7 +2280,7 @@ static int qcom_nandc_probe(struct platform_device *pdev) if (IS_ERR(nandc->core_clk)) return PTR_ERR(nandc->core_clk); - nandc->aon_clk = devm_clk_get(dev, "aon"); + nandc->aon_clk = devm_clk_get_optional(dev, "aon"); if (IS_ERR(nandc->aon_clk)) return PTR_ERR(nandc->aon_clk);