From 3bfe25fa9f8a56c5c877c7fd854d89238787c6d8 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 26 Jul 2017 13:01:56 -0700 Subject: [PATCH 01/19] ARM: dts: bcm283x: Move the BCM2837 DT contents from arm64 to arm. BCM2837 is somewhat unusual in that we build its DT on both arm32 and arm64. Most devices are being run in arm32 mode. Having the body of the DT for 2837 separate from 2835/6 has been a source of pain, as we often need to make changes that span both directories simultaneously (for example, the thermal changes for 4.13, or anything that changes the name of a node referenced by '&' from board files). Other changes are made more complicated than they need to be, such as the SDHOST enabling, because we have to split a single logical change into a 283[56] half and a 2837 half. To fix this, make the stub board include file live in arm64 instead of arm32, and keep all of BCM283x's contents in arm32. From here on, our changes to DT contents can be submitted through a single tree. Signed-off-by: Eric Anholt Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 42 ++++++++++++++++++- .../broadcom => arm/boot/dts}/bcm2837.dtsi | 0 arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi | 1 - .../boot/dts/broadcom/bcm2837-rpi-3-b.dts | 42 +------------------ .../dts/broadcom/bcm283x-rpi-smsc9514.dtsi | 1 - .../dts/broadcom/bcm283x-rpi-usb-host.dtsi | 1 - arch/arm64/boot/dts/broadcom/bcm283x.dtsi | 1 - 7 files changed, 42 insertions(+), 46 deletions(-) rename arch/{arm64/boot/dts/broadcom => arm/boot/dts}/bcm2837.dtsi (100%) delete mode 120000 arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi delete mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi delete mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi delete mode 120000 arch/arm64/boot/dts/broadcom/bcm283x.dtsi diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts index c72a27d908b6..972f14db28ac 100644 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts @@ -1 +1,41 @@ -#include "arm64/broadcom/bcm2837-rpi-3-b.dts" +/dts-v1/; +#include "bcm2837.dtsi" +#include "bcm2835-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" + +/ { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; + model = "Raspberry Pi 3 Model B"; + + memory { + reg = <0 0x40000000>; + }; + + leds { + act { + gpios = <&gpio 47 0>; + }; + }; +}; + +&uart1 { + status = "okay"; +}; + +/* SDHCI is used to control the SDIO for wireless */ +&sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio34>; + status = "okay"; + bus-width = <4>; + non-removable; +}; + +/* SDHOST is used to drive the SD card */ +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + status = "okay"; + bus-width = <4>; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi similarity index 100% rename from arch/arm64/boot/dts/broadcom/bcm2837.dtsi rename to arch/arm/boot/dts/bcm2837.dtsi diff --git a/arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi b/arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi deleted file mode 120000 index 3937b77cb310..000000000000 --- a/arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi +++ /dev/null @@ -1 +0,0 @@ -../../../../arm/boot/dts/bcm2835-rpi.dtsi \ No newline at end of file diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts index 972f14db28ac..699d340a3437 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts @@ -1,41 +1 @@ -/dts-v1/; -#include "bcm2837.dtsi" -#include "bcm2835-rpi.dtsi" -#include "bcm283x-rpi-smsc9514.dtsi" -#include "bcm283x-rpi-usb-host.dtsi" - -/ { - compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; - model = "Raspberry Pi 3 Model B"; - - memory { - reg = <0 0x40000000>; - }; - - leds { - act { - gpios = <&gpio 47 0>; - }; - }; -}; - -&uart1 { - status = "okay"; -}; - -/* SDHCI is used to control the SDIO for wireless */ -&sdhci { - pinctrl-names = "default"; - pinctrl-0 = <&emmc_gpio34>; - status = "okay"; - bus-width = <4>; - non-removable; -}; - -/* SDHOST is used to drive the SD card */ -&sdhost { - pinctrl-names = "default"; - pinctrl-0 = <&sdhost_gpio48>; - status = "okay"; - bus-width = <4>; -}; +#include "arm/bcm2837-rpi-3-b.dts" diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi deleted file mode 120000 index dca7c057d5a5..000000000000 --- a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi +++ /dev/null @@ -1 +0,0 @@ -../../../../arm/boot/dts/bcm283x-rpi-smsc9514.dtsi \ No newline at end of file diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi deleted file mode 120000 index cbeebe312ff8..000000000000 --- a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi +++ /dev/null @@ -1 +0,0 @@ -../../../../arm/boot/dts/bcm283x-rpi-usb-host.dtsi \ No newline at end of file diff --git a/arch/arm64/boot/dts/broadcom/bcm283x.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x.dtsi deleted file mode 120000 index 5f54e4cab99b..000000000000 --- a/arch/arm64/boot/dts/broadcom/bcm283x.dtsi +++ /dev/null @@ -1 +0,0 @@ -../../../../arm/boot/dts/bcm283x.dtsi \ No newline at end of file From 69d22c70ac9ad66be671ad2517ad5ee41058255f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Tue, 27 Jun 2017 19:35:27 +0200 Subject: [PATCH 02/19] ARM: dts: BCM5301X: Specify USB ports for each controller MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Northstar has 3 controllers: OHCI and EHCI (each with 2 ports) and XHCI (with just 1 port). Describe them in the DT. In future this will allow to reference them as trigger sources. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm5301x.dtsi | 34 +++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index 98647d22b291..045b9bb857f9 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -272,6 +272,19 @@ ehci: ehci@21000 { reg = <0x00021000 0x1000>; interrupts = ; phys = <&usb2_phy>; + + #address-cells = <1>; + #size-cells = <0>; + + ehci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + ehci_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; }; ohci: ohci@22000 { @@ -280,6 +293,19 @@ ohci: ohci@22000 { compatible = "generic-ohci"; reg = <0x00022000 0x1000>; interrupts = ; + + #address-cells = <1>; + #size-cells = <0>; + + ohci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + ohci_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; }; }; @@ -300,6 +326,14 @@ xhci: xhci@23000 { interrupts = ; phys = <&usb3_phy>; phy-names = "usb"; + + #address-cells = <1>; + #size-cells = <0>; + + xhci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; }; }; From 4188ea2aeb6dd8f99ab77662f463e41bc464a704 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sun, 30 Jul 2017 19:10:32 +0200 Subject: [PATCH 03/19] ARM: bcm283x: Define UART pinmuxing on board level Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in order to take care of them and other boards in the future, we need to define UART pinmuxing on board level. This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011 onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign uart0 to BT and uart1 to pin headers". Signed-off-by: Stefan Wahren Reviewed-by: Eric Anholt Signed-off-by: Eric Anholt --- arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 6 ++++++ arch/arm/boot/dts/bcm2835-rpi-a.dts | 6 ++++++ arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 6 ++++++ arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 6 ++++++ arch/arm/boot/dts/bcm2835-rpi-b.dts | 6 ++++++ arch/arm/boot/dts/bcm2835-rpi-zero.dts | 6 ++++++ arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 6 ++++++ arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 10 ++++++++++ 9 files changed, 53 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts index d0704540db6b..9f866491efdf 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts @@ -99,3 +99,9 @@ i2s_alt0: i2s_alt0 { &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts index 46d078e29017..4b1af06c8dc0 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-a.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts @@ -94,3 +94,9 @@ i2s_alt2: i2s_alt2 { &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts index 432088ebb0a1..a846f1e781d8 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts @@ -101,3 +101,9 @@ i2s_alt0: i2s_alt0 { &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts index 4133bc2cd9be..e860964e39fa 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts @@ -94,3 +94,9 @@ i2s_alt2: i2s_alt2 { &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts index 4d56fe3006b0..5d77f3f8c4c5 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-b.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts @@ -89,3 +89,9 @@ &gpio { &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts index 79a20d520931..70362405c595 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts @@ -103,3 +103,9 @@ i2s_alt0: i2s_alt0 { &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi index e55b362b9d6e..e36c392a2b8f 100644 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi @@ -39,7 +39,7 @@ gpioout: gpioout { }; alt0: alt0 { - brcm,pins = <4 5 7 8 9 10 11 14 15>; + brcm,pins = <4 5 7 8 9 10 11>; brcm,function = ; }; }; diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts index bf19e8cfb9e6..e8de41444b68 100644 --- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts @@ -39,3 +39,9 @@ i2s_alt0: i2s_alt0 { &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts index 972f14db28ac..20725ca487f3 100644 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts @@ -19,7 +19,17 @@ act { }; }; +/* uart0 communicates with the BT module */ +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; + status = "okay"; +}; + +/* uart1 is mapped to the pin header */ &uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_gpio14>; status = "okay"; }; From 79c2a9d33a04a5ad0df4e926427f3aaf153cc4a4 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sun, 30 Jul 2017 19:10:33 +0200 Subject: [PATCH 04/19] dt-bindings: bcm: Add Raspberry Pi Zero W This adds the root properties for the Raspberry Pi Zero W. Signed-off-by: Stefan Wahren Reviewed-by: Eric Anholt Acked-by: Rob Herring Signed-off-by: Eric Anholt --- Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt index 9c97de23919a..3e3efa046ac5 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt @@ -42,6 +42,10 @@ Raspberry Pi Zero Required root node properties: compatible = "raspberrypi,model-zero", "brcm,bcm2835"; +Raspberry Pi Zero W +Required root node properties: +compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; + Generic BCM2835 board Required root node properties: compatible = "brcm,bcm2835"; From 2c7c040c73e9e5686a5b451674b0592551a52345 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sun, 30 Jul 2017 19:10:34 +0200 Subject: [PATCH 05/19] ARM: dts: bcm2835: Add Raspberry Pi Zero W The Raspberry Pi Zero W has the same components like the Zero plus a Cypress CYW43438 wireless chip (wifi + bl). Signed-off-by: Stefan Wahren Signed-off-by: Eric Anholt Reviewed-by: Eric Anholt --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | 139 +++++++++++++++++++++++ 2 files changed, 141 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/bcm2835-rpi-zero-w.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 4b17f35dc9a7..6e632a341363 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -73,7 +73,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ bcm2835-rpi-a-plus.dtb \ bcm2836-rpi-2-b.dtb \ bcm2837-rpi-3-b.dtb \ - bcm2835-rpi-zero.dtb + bcm2835-rpi-zero.dtb \ + bcm2835-rpi-zero-w.dtb dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4708-asus-rt-ac56u.dtb \ bcm4708-asus-rt-ac68u.dtb \ diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts new file mode 100644 index 000000000000..82651c3eb682 --- /dev/null +++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts @@ -0,0 +1,139 @@ +/* + * Copyright (C) 2017 Stefan Wahren + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "bcm2835.dtsi" +#include "bcm2835-rpi.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" + +/ { + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; + model = "Raspberry Pi Zero W"; + + /* Needed by firmware to properly init UARTs */ + aliases { + uart0 = "/soc/serial@7e201000"; + uart1 = "/soc/serial@7e215040"; + serial0 = "/soc/serial@7e201000"; + serial1 = "/soc/serial@7e215040"; + }; + + leds { + act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + }; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wl_on>; + reset-gpios = <&gpio 41 GPIO_ACTIVE_LOW>; + }; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "GPIO0", + "GPIO1", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD0", + "RXD0", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "NC", /* GPIO31 */ + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "CAM_GPIO1", /* GPIO40 */ + "WL_ON", /* GPIO41 */ + "NC", /* GPIO42 */ + "WIFI_CLK", /* GPIO43 */ + "CAM_GPIO0", /* GPIO44 */ + "BT_ON", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED_N", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + pinctrl-0 = <&gpioout &alt0>; + + wl_on: wl-on { + brcm,pins = <41>; + brcm,function = ; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&sdhci { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>; + mmc-pwrseq = <&wifi_pwrseq>; + non-removable; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; From 56e2ff0346a39b8f0433456b7ec3dd31038d2ec1 Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Mon, 31 Jul 2017 17:54:21 -0400 Subject: [PATCH 06/19] ARM: dts: NSP: Add dma-coherent to relevant DT entries Cache related issues with DMA rings and performance issues related to caching are being caused by not properly setting the "dma-coherent" flag in the device tree entries. Adding it here to correct the issue. Signed-off-by: Jon Mason Fixes: 3107fa5bcfb2 ("ARM: dts: NSP: Add SD/MMC support") Fixes: 13d04f20935c ("ARM: dts: NSP: Add AMAC entries") Fixes: 5aeda7bf8a1e ("ARM: dts: NSP: Add and enable amac2") Fixes: 17d517172300 ("ARM: dts: NSP: Add mailbox (PDC) to NSP") Fixes: 1d8ece6639e1 ("ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree") Fixes: 0f9f27a36d09 ("ARM: dts: NSP: Add I2C support to the DT") Fixes: 8dbcad020f2e ("ARM: dts: nsp: Add sata device tree entry") Fixes: 522199029fdc ("ARM: dts: NSP: Fix PCIE DT issue") Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 7204d1def23d..c82313a677d9 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -215,6 +215,7 @@ sdio: sdhci@21000 { interrupts = ; sdhci,auto-cmd12; clocks = <&lcpll0 BCM_NSP_LCPLL0_SDIO_CLK>; + dma-coherent; status = "disabled"; }; @@ -224,6 +225,7 @@ amac0: ethernet@22000 { <0x110000 0x1000>; reg-names = "amac_base", "idm_base"; interrupts = ; + dma-coherent; status = "disabled"; }; @@ -233,6 +235,7 @@ amac1: ethernet@23000 { <0x111000 0x1000>; reg-names = "amac_base", "idm_base"; interrupts = ; + dma-coherent; status = "disabled"; }; @@ -242,6 +245,7 @@ amac2: ethernet@24000 { <0x112000 0x1000>; reg-names = "amac_base", "idm_base"; interrupts = ; + dma-coherent; status = "disabled"; }; @@ -252,6 +256,7 @@ mailbox: mailbox@25000 { #mbox-cells = <1>; brcm,rx-status-len = <32>; brcm,use-bcm-hdr; + dma-coherent; }; nand: nand@26000 { @@ -325,6 +330,7 @@ ehci0: usb@2a000 { compatible = "generic-ehci"; reg = <0x2a000 0x100>; interrupts = ; + dma-coherent; status = "disabled"; }; @@ -332,6 +338,7 @@ ohci0: usb@2b000 { compatible = "generic-ohci"; reg = <0x2b000 0x100>; interrupts = ; + dma-coherent; status = "disabled"; }; @@ -376,6 +383,7 @@ i2c0: i2c@38000 { #size-cells = <0>; interrupts = ; clock-frequency = <100000>; + dma-coherent; status = "disabled"; }; @@ -446,6 +454,7 @@ sata: ahci@41000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + dma-coherent; status = "disabled"; sata0: sata-port@0 { @@ -483,6 +492,7 @@ pcie0: pcie@18012000 { */ ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>; + dma-coherent; status = "disabled"; msi-parent = <&msi0>; @@ -519,6 +529,7 @@ pcie1: pcie@18013000 { */ ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>; + dma-coherent; status = "disabled"; msi-parent = <&msi1>; @@ -555,6 +566,7 @@ pcie2: pcie@18014000 { */ ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>; + dma-coherent; status = "disabled"; msi-parent = <&msi2>; From 2c5b8512c5b6812c7b4547f93028f938c3b033be Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Mon, 31 Jul 2017 17:54:22 -0400 Subject: [PATCH 07/19] ARM: dts: NSP: Rearrage USB entries The rest of the DTSI file is in incrementing addresses, but the USB OHCI/ECHI entries are out of sequence. Move them to put them in the proper place. Signed-off-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index c82313a677d9..9feb3689d191 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -302,6 +302,22 @@ qspi: qspi@27200 { #size-cells = <0>; }; + ehci0: usb@2a000 { + compatible = "generic-ehci"; + reg = <0x2a000 0x100>; + interrupts = ; + dma-coherent; + status = "disabled"; + }; + + ohci0: usb@2b000 { + compatible = "generic-ohci"; + reg = <0x2b000 0x100>; + interrupts = ; + dma-coherent; + status = "disabled"; + }; + crypto@2f000 { compatible = "brcm,spum-nsp-crypto"; reg = <0x2f000 0x900>; @@ -326,22 +342,6 @@ pwm: pwm@31000 { status = "disabled"; }; - ehci0: usb@2a000 { - compatible = "generic-ehci"; - reg = <0x2a000 0x100>; - interrupts = ; - dma-coherent; - status = "disabled"; - }; - - ohci0: usb@2b000 { - compatible = "generic-ohci"; - reg = <0x2b000 0x100>; - interrupts = ; - dma-coherent; - status = "disabled"; - }; - rng: rng@33000 { compatible = "brcm,bcm-nsp-rng"; reg = <0x33000 0x14>; From bbe526f55b60b76a22dfe43e7c8ffe18f5eb30a3 Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Mon, 31 Jul 2017 17:54:23 -0400 Subject: [PATCH 08/19] ARM: dts: NSP: Add USB3 and USB3 PHY to NSP This uses the existing Northstar USB3 PHY driver to enable the USB3 ports on NSP. Signed-off-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 19 +++++++++++++++++++ arch/arm/boot/dts/bcm958522er.dts | 8 ++++++++ arch/arm/boot/dts/bcm958525er.dts | 8 ++++++++ arch/arm/boot/dts/bcm958525xmc.dts | 8 ++++++++ arch/arm/boot/dts/bcm958622hr.dts | 8 ++++++++ arch/arm/boot/dts/bcm958623hr.dts | 8 ++++++++ arch/arm/boot/dts/bcm958625hr.dts | 8 ++++++++ arch/arm/boot/dts/bcm958625k.dts | 8 ++++++++ 8 files changed, 75 insertions(+) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 9feb3689d191..dff66974feed 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -302,6 +302,16 @@ qspi: qspi@27200 { #size-cells = <0>; }; + xhci: usb@29000 { + compatible = "generic-xhci"; + reg = <0x29000 0x1000>; + interrupts = ; + phys = <&usb3_phy>; + phy-names = "usb3-phy"; + dma-coherent; + status = "disabled"; + }; + ehci0: usb@2a000 { compatible = "generic-ehci"; reg = <0x2a000 0x100>; @@ -469,6 +479,15 @@ sata1: sata-port@1 { phy-names = "sata-phy"; }; }; + + usb3_phy: usb3-phy@104000 { + compatible = "brcm,ns-bx-usb3-phy"; + reg = <0x104000 0x1000>, + <0x032000 0x1000>; + reg-names = "dmp", "ccb-mii"; + #phy-cells = <0>; + status = "disabled"; + }; }; pcie0: pcie@18012000 { diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts index f5c42962c201..f9dd342cc2ae 100644 --- a/arch/arm/boot/dts/bcm958522er.dts +++ b/arch/arm/boot/dts/bcm958522er.dts @@ -170,3 +170,11 @@ partition@700000 { &uart0 { status = "okay"; }; + +&usb3_phy { + status = "okay"; +}; + +&xhci { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts index efcb1f67bdad..374508a9cfbf 100644 --- a/arch/arm/boot/dts/bcm958525er.dts +++ b/arch/arm/boot/dts/bcm958525er.dts @@ -182,3 +182,11 @@ &sata { &uart0 { status = "okay"; }; + +&usb3_phy { + status = "okay"; +}; + +&xhci { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts index b335ce02e32f..403250c5ad8e 100644 --- a/arch/arm/boot/dts/bcm958525xmc.dts +++ b/arch/arm/boot/dts/bcm958525xmc.dts @@ -202,3 +202,11 @@ &sdio { &uart0 { status = "okay"; }; + +&usb3_phy { + status = "okay"; +}; + +&xhci { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts index 16ab2d82a14b..fd8b8c689ffe 100644 --- a/arch/arm/boot/dts/bcm958622hr.dts +++ b/arch/arm/boot/dts/bcm958622hr.dts @@ -219,3 +219,11 @@ fixed-link { &uart0 { status = "okay"; }; + +&usb3_phy { + status = "okay"; +}; + +&xhci { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts index 9b921c6aa8f8..3bc50849d013 100644 --- a/arch/arm/boot/dts/bcm958623hr.dts +++ b/arch/arm/boot/dts/bcm958623hr.dts @@ -227,3 +227,11 @@ fixed-link { &uart0 { status = "okay"; }; + +&usb3_phy { + status = "okay"; +}; + +&xhci { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts index 006b08e41a3b..d94d14b3c745 100644 --- a/arch/arm/boot/dts/bcm958625hr.dts +++ b/arch/arm/boot/dts/bcm958625hr.dts @@ -229,3 +229,11 @@ fixed-link { &uart0 { status = "okay"; }; + +&usb3_phy { + status = "okay"; +}; + +&xhci { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts index 64740f85cf4c..2cf2392483b2 100644 --- a/arch/arm/boot/dts/bcm958625k.dts +++ b/arch/arm/boot/dts/bcm958625k.dts @@ -264,3 +264,11 @@ &uart0 { &uart1 { status = "okay"; }; + +&usb3_phy { + status = "okay"; +}; + +&xhci { + status = "okay"; +}; From 0b1f11002a70abf958aacbf4c18858443f504986 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Wed, 2 Aug 2017 06:40:41 +0200 Subject: [PATCH 09/19] ARM: dts: BCM5301X: Specify USB ports for USB LEDs of few devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This uses trigger-sources documented in commit 80dc6e1cd85fc ("dt-bindings: leds: document new trigger-sources property") to specify USB ports. Such an information can be used by operating system to setup LEDs behavior. I updated dts files for 7 devices I own and I was able to test. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 4 ++++ arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 3 +++ arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 6 ++++++ arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts | 4 ++++ arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 5 +++++ arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 3 +++ arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 3 +++ 7 files changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts index 62e1427b3f10..8b64caabaad8 100644 --- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts +++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts @@ -52,6 +52,10 @@ leds { usb { label = "bcm53xx:blue:usb"; gpios = <&hc595 0 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port1>, <&ehci_port1>, + <&xhci_port1>, <&ohci_port2>, + <&ehci_port2>; + linux,default-trigger = "usbport"; }; power0 { diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts index a5647efe4118..d7c34fa72b4b 100644 --- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts +++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts @@ -48,6 +48,9 @@ power1 { usb { label = "bcm53xx:blue:usb"; gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>, + <&xhci_port1>; + linux,default-trigger = "usbport"; }; wireless { diff --git a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts index 19ee924d7d53..83a4c60bb431 100644 --- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts +++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts @@ -42,16 +42,22 @@ power-amber { usb2 { label = "bcm53xx:white:usb2"; gpios = <&chipcommon 3 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port2>, <&ehci_port2>; + linux,default-trigger = "usbport"; }; usb3-white { label = "bcm53xx:white:usb3"; gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>; + trigger-sources = <&xhci_port1>; + linux,default-trigger = "usbport"; }; usb3-green { label = "bcm53xx:green:usb3"; gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; }; wps { diff --git a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts index a854a5174b7f..3ed8de42cb48 100644 --- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts +++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts @@ -36,6 +36,8 @@ lan { usb2-port1 { label = "bcm53xx:green:usb2-port1"; gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; }; power { @@ -67,6 +69,8 @@ wan-amber { usb2-port2 { label = "bcm53xx:green:usb2-port2"; gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port2>, <&ehci_port2>; + linux,default-trigger = "usbport"; }; }; diff --git a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts index 97aa5d59a1d8..ec4a50e440f6 100644 --- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts +++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts @@ -46,11 +46,16 @@ wps { usb3 { label = "bcm53xx:blue:usb3"; gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port1>, <&ehci_port1>, + <&xhci_port1>; + linux,default-trigger = "usbport"; }; usb2 { label = "bcm53xx:blue:usb2"; gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port2>, <&ehci_port2>; + linux,default-trigger = "usbport"; }; wan-blue { diff --git a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts index 51b0641b5f79..7cc7d344fe5b 100644 --- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts +++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts @@ -71,6 +71,9 @@ wan-amber { usb3-white { label = "bcm53xx:white:usb3"; gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>, + <&xhci_port1>; + linux,default-trigger = "usbport"; }; 2ghz { diff --git a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts index 5f8621d00c50..bc1d1e10d4ac 100644 --- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts +++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts @@ -59,6 +59,9 @@ lan2 { usb3 { label = "bcm53xx:green:usb3"; gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>, + <&xhci_port1>; + linux,default-trigger = "usbport"; }; status { From 092ccf0415c720a1e9458a46fe75f77574027a55 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 18 Jul 2017 12:37:37 -0700 Subject: [PATCH 10/19] ARM: dts: BCM53573: Add Broadcom BCM947189ACDBMR board support Adds support for the Broadcom reference board BCM947189ACDMBR which features the following: * 128MB of DRAM * External MoCA support through a Broadcom BCM6802 chip * 1x external Gigabit PHY through the external BCM6802 * 1x USB 2.0 port * 1x PCIE slot * Few configurable buttons and LEDs Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/bcm947189acdbmr.dts | 97 +++++++++++++++++++++++++++ 2 files changed, 99 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/bcm947189acdbmr.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 4b17f35dc9a7..236587e7f07d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -106,7 +106,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm953012hr.dtb \ bcm953012k.dtb dtb-$(CONFIG_ARCH_BCM_53573) += \ - bcm47189-tenda-ac9.dtb + bcm47189-tenda-ac9.dtb \ + bcm947189acdbmr.dtb dtb-$(CONFIG_ARCH_BCM_63XX) += \ bcm963138dvt.dtb dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \ diff --git a/arch/arm/boot/dts/bcm947189acdbmr.dts b/arch/arm/boot/dts/bcm947189acdbmr.dts new file mode 100644 index 000000000000..ef263412fea5 --- /dev/null +++ b/arch/arm/boot/dts/bcm947189acdbmr.dts @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2017 Broadcom + * Author: Florian Fainelli + * + * Licensed under the ISC license. + */ + +/dts-v1/; + +#include "bcm53573.dtsi" + +/ { + compatible = "brcm,bcm947189acdbmr", "brcm,bcm47189", "brcm,bcm53573"; + model = "Broadcom BCM947189ACDBMR"; + + chosen { + bootargs = "console=ttyS0,115200 earlycon"; + }; + + memory { + reg = <0x00000000 0x08000000>; + }; + + leds { + compatible = "gpio-leds"; + + wps { + label = "bcm53xx:blue:wps"; + gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>; + }; + + 5ghz { + label = "bcm53xx:blue:5ghz"; + gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; + }; + + 2ghz { + label = "bcm53xx:blue:2ghz"; + gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; + }; + + wps { + label = "WPS"; + linux,code = ; + gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>; + }; + }; + + spi { + compatible = "spi-gpio"; + num-chipselects = <1>; + gpio-sck = <&chipcommon 21 0>; + gpio-miso = <&chipcommon 22 0>; + gpio-mosi = <&chipcommon 23 0>; + cs-gpios = <&chipcommon 24 0>; + #address-cells = <1>; + #size-cells = <0>; + + /* External BCM6802 MoCA chip is connected */ + }; +}; + +&pcie0 { + ranges = <0x00000000 0 0 0 0 0x00100000>; + #address-cells = <3>; + #size-cells = <2>; + + bridge@0,0,0 { + reg = <0x0000 0 0 0 0>; + ranges = <0x00000000 0 0 0 0 0 0 0x00100000>; + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,1,0 { + reg = <0x0000 0 0 0 0>; + ranges = <0x00000000 0 0 0 0x00100000>; + #address-cells = <1>; + #size-cells = <1>; + }; + }; +}; + +&usb2 { + vcc-gpio = <&chipcommon 8 GPIO_ACTIVE_HIGH>; +}; From da26718ed63008b6a650b2865c959f1eea5bcc93 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sun, 6 Aug 2017 17:21:55 +0200 Subject: [PATCH 11/19] dt-bindings: arm: add SMP enable-method for BCM2836 This adds a compatible string "brcm,bcm2836-smp" for Broadcom's BCM2836 and BCM2837 to the 32 bit ARM CPU device tree binding. Signed-off-by: Stefan Wahren Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/cpus.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index a44253cad269..b92f12bd5244 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -200,6 +200,7 @@ described below. "arm,realview-smp" "brcm,bcm11351-cpu-method" "brcm,bcm23550" + "brcm,bcm2836-smp" "brcm,bcm-nsp-smp" "brcm,brahma-b15" "marvell,armada-375-smp" From f29c256853b7412961d3ee80ca525bd2530573db Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sun, 6 Aug 2017 17:28:10 +0200 Subject: [PATCH 12/19] ARM: dts: bcm283x: Add 32-bit enable method for SMP This patch adds the missing 32-bit enable method for SMP on BCM2836 and BCM2837. The BCM2837 already has an enabled method, but this one only works for 64-bit. Signed-off-by: Stefan Wahren Tested-by: Eric Anholt --- arch/arm/boot/dts/bcm2836.dtsi | 1 + arch/arm/boot/dts/bcm2837.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi index da3deeb42592..2c26d0be8b03 100644 --- a/arch/arm/boot/dts/bcm2836.dtsi +++ b/arch/arm/boot/dts/bcm2836.dtsi @@ -36,6 +36,7 @@ timer { cpus: cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "brcm,bcm2836-smp"; v7_cpu0: cpu@0 { device_type = "cpu"; diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi index 2d5de6f0f78d..bc1cca5cf43c 100644 --- a/arch/arm/boot/dts/bcm2837.dtsi +++ b/arch/arm/boot/dts/bcm2837.dtsi @@ -30,6 +30,7 @@ timer { cpus: cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit cpu0: cpu@0 { device_type = "cpu"; From f5a5d8b417fbe8d94df962d40431c8217a8798aa Mon Sep 17 00:00:00 2001 From: Ray Jui Date: Tue, 15 Aug 2017 10:25:58 -0700 Subject: [PATCH 13/19] ARM: dts: cygnus: Fix incorrect UART2 register base Fix incorrect Cygnus UART2 register base. Fixes: 0f0b21a83ad2 ("ARM: dts: Move all Cygnus peripherals into axi bus") Signed-off-by: Ray Jui Signed-off-by: Scott Branden Reviewed-by: Eric Anholt Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index bf8c83815753..e4d07f402531 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -324,7 +324,7 @@ uart1: serial@18021000 { uart2: serial@18022000 { compatible = "snps,dw-apb-uart"; - reg = <0x18020000 0x100>; + reg = <0x18022000 0x100>; reg-shift = <2>; reg-io-width = <4>; interrupts = ; From 8b9b666d00986294b223986dbb274ceaf37020bf Mon Sep 17 00:00:00 2001 From: Scott Branden Date: Tue, 15 Aug 2017 10:25:59 -0700 Subject: [PATCH 14/19] ARM: dts: cygnus: place v3d in proper address ordered location Move v3d devicetree node to proper address ordered location in Cygnus dtsi. Signed-off-by: Scott Branden Reviewed-by: Eric Anholt Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus.dtsi | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index e4d07f402531..2077fee9a6e9 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -366,6 +366,19 @@ nand: nand@18046000 { brcm,nand-has-wp; }; + v3d: v3d@180a2000 { + compatible = "brcm,cygnus-v3d"; + reg = <0x180a2000 0x1000>; + clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>; + clock-names = "v3d_clk"; + interrupts = ; + status = "disabled"; + }; + + vc4: gpu { + compatible = "brcm,cygnus-vc4"; + }; + gpio_asiu: gpio@180a5000 { compatible = "brcm,cygnus-asiu-gpio"; reg = <0x180a5000 0x668>; @@ -444,19 +457,6 @@ touchscreen: touchscreen@180a6000 { status = "disabled"; }; - v3d: v3d@180a2000 { - compatible = "brcm,cygnus-v3d"; - reg = <0x180a2000 0x1000>; - clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>; - clock-names = "v3d_clk"; - interrupts = ; - status = "disabled"; - }; - - vc4: gpu { - compatible = "brcm,cygnus-vc4"; - }; - adc: adc@180a6000 { compatible = "brcm,iproc-static-adc"; #io-channel-cells = <1>; From 0e50dc91109556a1c700bdd11b1b754465bc4a74 Mon Sep 17 00:00:00 2001 From: Jason Uy Date: Tue, 15 Aug 2017 10:26:00 -0700 Subject: [PATCH 15/19] ARM: dts: cygnus: Enable Performance Monitoring Unit Add PMU capability to Cygnus so trace and performance profiling can be used. Signed-off-by: Jason Uy Signed-off-by: Scott Branden Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 2077fee9a6e9..bc08987393c6 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -55,6 +55,11 @@ cpu@0 { /include/ "bcm-cygnus-clock.dtsi" + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = ; + }; + core { compatible = "simple-bus"; ranges = <0x00000000 0x19000000 0x1000000>; From 143d0d47ccf62a719e70b7d3f705589d598b76b8 Mon Sep 17 00:00:00 2001 From: Jonathan Richardson Date: Tue, 15 Aug 2017 10:26:01 -0700 Subject: [PATCH 16/19] ARM: dts: cygnus: Add additional peripherals to dtsi Add nodes for peripherals in Cygnus dtsi: sdhci, keypad, spi, dma, pinmux configs. Signed-off-by: Jonathan Richardson Signed-off-by: Scott Branden Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus.dtsi | 102 ++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index bc08987393c6..306b04ce90dd 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -124,6 +124,21 @@ pinctrl: pinctrl@0301d0c8 { compatible = "brcm,cygnus-pinmux"; reg = <0x0301d0c8 0x30>, <0x0301d24c 0x2c>; + + spi_0: spi_0 { + function = "spi0"; + groups = "spi0_grp"; + }; + + spi_1: spi_1 { + function = "spi1"; + groups = "spi1_grp"; + }; + + spi_2: spi_2 { + function = "spi2"; + groups = "spi2_grp"; + }; }; mailbox: mailbox@03024024 { @@ -305,6 +320,23 @@ msi1: msi-controller { }; }; + dma0: dma@18018000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x18018000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + ; + clocks = <&apb_clk>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + uart0: serial@18020000 { compatible = "snps,dw-apb-uart"; reg = <0x18020000 0x100>; @@ -349,6 +381,52 @@ uart3: serial@18023000 { status = "disabled"; }; + spi0: spi@18028000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x18028000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + pinctrl-0 = <&spi_0>; + clocks = <&axi81_clk>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + + spi1: spi@18029000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x18029000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + pinctrl-0 = <&spi_1>; + clocks = <&axi81_clk>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + + spi2: spi@1802a000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x1802a000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + pinctrl-0 = <&spi_2>; + clocks = <&axi81_clk>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + + sdhci0: sdhci@18041000 { + compatible = "brcm,sdhci-iproc-cygnus"; + reg = <0x18041000 0x100>; + interrupts = ; + clocks = <&lcpll0 BCM_CYGNUS_LCPLL0_SDIO_CLK>; + bus-width = <4>; + sdhci,auto-cmd12; + status = "disabled"; + }; + eth0: ethernet@18042000 { compatible = "brcm,amac"; reg = <0x18042000 0x1000>, @@ -358,6 +436,16 @@ eth0: ethernet@18042000 { status = "disabled"; }; + sdhci1: sdhci@18043000 { + compatible = "brcm,sdhci-iproc-cygnus"; + reg = <0x18043000 0x100>; + interrupts = ; + clocks = <&lcpll0 BCM_CYGNUS_LCPLL0_SDIO_CLK>; + bus-width = <4>; + sdhci,auto-cmd12; + status = "disabled"; + }; + nand: nand@18046000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; reg = <0x18046000 0x600>, <0xf8105408 0x600>, @@ -472,5 +560,19 @@ adc: adc@180a6000 { interrupts = ; status = "disabled"; }; + + keypad: keypad@180ac000 { + compatible = "brcm,bcm-keypad"; + reg = <0x180ac000 0x14c>; + interrupts = ; + clocks = <&asiu_clks BCM_CYGNUS_ASIU_KEYPAD_CLK>; + clock-names = "peri_clk"; + clock-frequency = <31250>; + pull-up-enabled; + col-debounce-filter-period = <0>; + status-debounce-filter-period = <0>; + row-output-enabled; + status = "disabled"; + }; }; }; From 556457fa769984c3ecdc1d424c8da6ef5e57f665 Mon Sep 17 00:00:00 2001 From: Scott Branden Date: Tue, 15 Aug 2017 10:26:02 -0700 Subject: [PATCH 17/19] ARM: dts: cygnus: add serial0 alias for uart3 on bcm91130_entphn Use serial0 alias to select stdout-path on Cygnus bcm911360_entphon board. Signed-off-by: Scott Branden Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm911360_entphn.dts | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts index 000f5f19215e..53f990defd6a 100644 --- a/arch/arm/boot/dts/bcm911360_entphn.dts +++ b/arch/arm/boot/dts/bcm911360_entphn.dts @@ -39,9 +39,12 @@ / { model = "Cygnus Enterprise Phone (BCM911360_ENTPHN)"; compatible = "brcm,bcm11360", "brcm,cygnus"; + aliases { + serial0 = &uart3; + }; + chosen { - stdout-path = &uart3; - bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; gpio_keys { From fdacf0950c11f53d26e402f482fe3776bda8fac1 Mon Sep 17 00:00:00 2001 From: Raveendra Padasalagi Date: Tue, 15 Aug 2017 10:26:03 -0700 Subject: [PATCH 18/19] ARM: dts: cygnus: Add generic-ehci/ohci nodes Add dt nodes for generic-ehci/ohci host controller. Signed-off-by: Raveendra Padasalagi Signed-off-by: Scott Branden Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 306b04ce90dd..7c957ea06c66 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -459,6 +459,20 @@ nand: nand@18046000 { brcm,nand-has-wp; }; + ehci0: usb@18048000 { + compatible = "generic-ehci"; + reg = <0x18048000 0x100>; + interrupts = ; + status = "disabled"; + }; + + ohci0: usb@18048800 { + compatible = "generic-ohci"; + reg = <0x18048800 0x100>; + interrupts = ; + status = "disabled"; + }; + v3d: v3d@180a2000 { compatible = "brcm,cygnus-v3d"; reg = <0x180a2000 0x1000>; From 0173b2cd6948b5b96ac4e8dbc3bcb4dd0b45c296 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Thu, 17 Aug 2017 11:05:14 +0200 Subject: [PATCH 19/19] ARM: BCM53573: Specify ports for USB LED for Tenda AC9 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This uses trigger-sources documented in commit 80dc6e1cd85fc ("dt-bindings: leds: document new trigger-sources property") to specify USB ports. Such an information can be used by operating system to setup LEDs behavior. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 2 ++ arch/arm/boot/dts/bcm53573.dtsi | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts index 34417dac1cd0..19e61b5b066c 100644 --- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts +++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts @@ -26,6 +26,8 @@ leds { usb { label = "bcm53xx:blue:usb"; gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; }; wps { diff --git a/arch/arm/boot/dts/bcm53573.dtsi b/arch/arm/boot/dts/bcm53573.dtsi index eae623f76401..c698a565b8ae 100644 --- a/arch/arm/boot/dts/bcm53573.dtsi +++ b/arch/arm/boot/dts/bcm53573.dtsi @@ -138,10 +138,12 @@ ehci: ehci@4000 { ehci_port1: port@1 { reg = <1>; + #trigger-source-cells = <0>; }; ehci_port2: port@2 { reg = <2>; + #trigger-source-cells = <0>; }; }; @@ -158,10 +160,12 @@ ohci: ohci@d000 { ohci_port1: port@1 { reg = <1>; + #trigger-source-cells = <0>; }; ohci_port2: port@2 { reg = <2>; + #trigger-source-cells = <0>; }; }; };