From 718a2bb5fe7b2d67d887313f16f93cab5c43ab55 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Apr 2024 16:10:22 +0200 Subject: [PATCH 1/5] arm64: dts: stratix10: socdk: drop unneeded flash address/size-cells Flash node uses single "partition" node to describe partitions, so remove deprecated address/size-cells properties to also fix dtc W=1 warnings: socfpga_stratix10_socdk.dts:182.10-211.4: Warning (avoid_unnecessary_addr_size): /soc@0/spi@ff8d2000/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts index 26173f0b0051..4eee777ef1a1 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts @@ -180,8 +180,6 @@ rtc@68 { &qspi { status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; From 7f787253bca4fedfa97bfa087b8d3ae0105559de Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Apr 2024 16:10:23 +0200 Subject: [PATCH 2/5] arm64: dts: stratix10: socdk_nand: drop unneeded flash address/size-cells Flash node uses single "partition" node to describe partitions, so remove deprecated address/size-cells properties to also fix dtc W=1 warnings: socfpga_stratix10_socdk_nand.dts:171.10-200.4: Warning (avoid_unnecessary_addr_size): /soc@0/spi@ff8d2000/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts index 81d0e914a77c..7c53cb9621e5 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts @@ -169,8 +169,6 @@ rtc@68 { &qspi { status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; From 41f7adb676f6c4aef439d78b15c7e1119216bc2b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Apr 2024 16:10:24 +0200 Subject: [PATCH 3/5] arm64: dts: agilex: socdk: drop unneeded flash address/size-cells Flash node uses single "partition" node to describe partitions, so remove deprecated address/size-cells properties to also fix dtc W=1 warnings: socfpga_agilex_socdk.dts:108.10-137.4: Warning (avoid_unnecessary_addr_size): /soc@0/spi@ff8d2000/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts index ad99aefeb185..b31cfa6b802d 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts @@ -106,8 +106,6 @@ &watchdog0 { &qspi { status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; From 32cdf4c75fdd135e66e11383aa84687873b77b89 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Apr 2024 16:10:25 +0200 Subject: [PATCH 4/5] arm64: dts: n5x: socdk: drop unneeded flash address/size-cells Flash node uses single "partition" node to describe partitions, so remove deprecated address/size-cells properties to also fix dtc W=1 warnings: socfpga_n5x_socdk.dts:85.10-114.4: Warning (avoid_unnecessary_addr_size): /soc@0/spi@ff8d2000/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts index 2d70a92c2090..7952c7f47cc2 100644 --- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts @@ -83,8 +83,6 @@ &osc1 { &qspi { status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; From 1536dc8edc653e0e4a333035a73ff146d0517749 Mon Sep 17 00:00:00 2001 From: Beniamin Sandu Date: Wed, 15 May 2024 19:12:49 +0100 Subject: [PATCH 5/5] arm64: dts: socfpga: stratix10: add L2 cache info This removes cacheinfo warnings at boot, e.g.: cacheinfo: Unable to detect cache hierarchy for CPU 0 Signed-off-by: Beniamin Sandu Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index cbbc53c47921..0def0b0daaf7 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -34,6 +34,7 @@ cpu0: cpu@0 { compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x0>; }; @@ -41,6 +42,7 @@ cpu1: cpu@1 { compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x1>; }; @@ -48,6 +50,7 @@ cpu2: cpu@2 { compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x2>; }; @@ -55,8 +58,15 @@ cpu3: cpu@3 { compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x3>; }; + + l2_shared: cache { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; }; firmware {