diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 7f80f48a0954..88b84035e7b1 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -186,9 +186,19 @@ properties: - items: - enum: + - microsoft,dempsey + - microsoft,makepeace + - microsoft,moneypenny - samsung,s3ve3g - const: qcom,msm8226 + - items: + - enum: + - microsoft,superman-lte + - microsoft,tesla + - const: qcom,msm8926 + - const: qcom,msm8226 + - items: - enum: - longcheer,l9100 diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts index e636a1cb9b77..8460b538eb6a 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts +++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts @@ -67,6 +67,18 @@ data-pins { }; }; +&usb { + status = "okay"; +}; + +&usb_dwc { + dr_mode = "host"; +}; + +&usbphy0 { + status = "okay"; +}; + &xo_board_clk { clock-frequency = <24000000>; }; diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi index 38ffdc3cbdcd..0b739077ed70 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -94,6 +94,19 @@ soc: soc@0 { #size-cells = <1>; ranges = <0 0 0 0xffffffff>; + usbphy0: phy@5b000 { + compatible = "qcom,ipq5018-usb-hsphy"; + reg = <0x0005b000 0x120>; + + clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>; + + resets = <&gcc GCC_QUSB2_0_PHY_BCR>; + + #phy-cells = <0>; + + status = "disabled"; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,ipq5018-tlmm"; reg = <0x01000000 0x300000>; @@ -146,6 +159,16 @@ sdhc_1: mmc@7804000 { status = "disabled"; }; + blsp_dma: dma-controller@7884000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x07884000 0x1d000>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + }; + blsp1_uart1: serial@78af000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x078af000 0x200>; @@ -156,6 +179,61 @@ blsp1_uart1: serial@78af000 { status = "disabled"; }; + blsp1_spi1: spi@78b5000 { + compatible = "qcom,spi-qup-v2.2.1"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x078b5000 0x600>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + dmas = <&blsp_dma 4>, <&blsp_dma 5>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + usb: usb@8af8800 { + compatible = "qcom,ipq5018-dwc3", "qcom,dwc3"; + reg = <0x08af8800 0x400>; + + interrupts = ; + interrupt-names = "hs_phy_irq"; + + clocks = <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; + clock-names = "core", + "iface", + "sleep", + "mock_utmi"; + + resets = <&gcc GCC_USB0_BCR>; + + qcom,select-utmi-as-pipe-clk; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + status = "disabled"; + + usb_dwc: usb@8a00000 { + compatible = "snps,dwc3"; + reg = <0x08a00000 0xe000>; + clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>; + clock-names = "ref"; + interrupts = ; + phy-names = "usb2-phy"; + phys = <&usbphy0>; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + }; + }; + intc: interrupt-controller@b000000 { compatible = "qcom,msm-qgic2"; reg = <0x0b000000 0x1000>, /* GICD */ diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index d3fef2f80a81..42e2e48b2bc3 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -91,11 +91,19 @@ memory@40000000 { }; cpu_opp_table: opp-table-cpu { - compatible = "operating-points-v2"; + compatible = "operating-points-v2-kryo-cpu"; opp-shared; + nvmem-cells = <&cpu_speed_bin>; - opp-1488000000 { - opp-hz = /bits/ 64 <1488000000>; + opp-1100000000 { + opp-hz = /bits/ 64 <1100000000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + + opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-supported-hw = <0x3>; clock-latency-ns = <200000>; }; }; @@ -163,6 +171,11 @@ qfprom: efuse@a4000 { reg = <0x000a4000 0x721>; #address-cells = <1>; #size-cells = <1>; + + cpu_speed_bin: cpu-speed-bin@1d { + reg = <0x1d 0x2>; + bits = <7 2>; + }; }; rng: rng@e3000 { @@ -390,8 +403,8 @@ apcs_glb: mailbox@b111000 { "qcom,ipq6018-apcs-apps-global"; reg = <0x0b111000 0x1000>; #clock-cells = <1>; - clocks = <&a53pll>, <&xo_board>; - clock-names = "pll", "xo"; + clocks = <&a53pll>, <&xo_board>, <&gcc GPLL0>; + clock-names = "pll", "xo", "gpll0"; #mbox-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index e59b9df96c7e..9aec89d5e095 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -611,8 +611,8 @@ apcs_glb: mailbox@b111000 { compatible = "qcom,ipq6018-apcs-apps-global"; reg = <0x0 0x0b111000 0x0 0x1000>; #clock-cells = <1>; - clocks = <&a53pll>, <&xo>; - clock-names = "pll", "xo"; + clocks = <&a53pll>, <&xo>, <&gcc GPLL0>; + clock-names = "pll", "xo", "gpll0"; #mbox-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 2f275c84e566..5d05819f356d 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -708,8 +708,8 @@ apcs_glb: mailbox@b111000 { compatible = "qcom,ipq8074-apcs-apps-global", "qcom,ipq6018-apcs-apps-global"; reg = <0x0b111000 0x1000>; - clocks = <&a53pll>, <&xo>; - clock-names = "pll", "xo"; + clocks = <&a53pll>, <&xo>, <&gcc GPLL0>; + clock-names = "pll", "xo", "gpll0"; #clock-cells = <1>; #mbox-cells = <1>; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi new file mode 100644 index 000000000000..49c9b6478357 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi @@ -0,0 +1,147 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * IPQ9574 RDP board common device tree source + * + * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include +#include +#include "ipq9574.dtsi" + +/ { + aliases { + serial0 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + regulator_fixed_3p3: s3300 { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-name = "fixed_3p3"; + }; + + regulator_fixed_0p925: s0925 { + compatible = "regulator-fixed"; + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <925000>; + regulator-boot-on; + regulator-always-on; + regulator-name = "fixed_0p925"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-0 = <&gpio_keys_default>; + pinctrl-names = "default"; + + button-wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 37 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; +}; + +&blsp1_spi0 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "micron,n25q128a11", "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + }; +}; + +&blsp1_uart2 { + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rpm_requests { + regulators { + compatible = "qcom,rpm-mp5496-regulators"; + + ipq9574_s1: s1 { + /* + * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. + * During regulator registration, kernel not knowing the initial voltage, + * considers it as zero and brings up the regulators with minimum supported voltage. + * Update the regulator-min-microvolt with SVS voltage of 725mV so that + * the regulators are brought up with 725mV which is sufficient for all the + * corner parts to operate at 800MHz + */ + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1075000>; + }; + + mp5496_l2: l2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + }; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&tlmm { + spi_0_pins: spi-0-state { + pins = "gpio11", "gpio12", "gpio13", "gpio14"; + function = "blsp0_spi"; + drive-strength = <8>; + bias-disable; + }; + + gpio_keys_default: gpio-keys-default-state { + pins = "gpio37"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; +}; + +&usb_0_dwc3 { + dr_mode = "host"; +}; + +&usb_0_qmpphy { + vdda-pll-supply = <&mp5496_l2>; + vdda-phy-supply = <®ulator_fixed_0p925>; + + status = "okay"; +}; + +&usb_0_qusbphy { + vdd-supply = <®ulator_fixed_0p925>; + vdda-pll-supply = <&mp5496_l2>; + vdda-phy-dpdm-supply = <®ulator_fixed_3p3>; + + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&xo_board_clk { + clock-frequency = <24000000>; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts index 2b093e02637b..f4f9199d4ab1 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts @@ -8,58 +8,12 @@ /dts-v1/; -#include "ipq9574.dtsi" +#include "ipq9574-rdp-common.dtsi" / { model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C2"; compatible = "qcom,ipq9574-ap-al02-c2", "qcom,ipq9574"; - aliases { - serial0 = &blsp1_uart2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&blsp1_spi0 { - pinctrl-0 = <&spi_0_pins>; - pinctrl-names = "default"; - status = "okay"; - - flash@0 { - compatible = "micron,n25q128a11", "jedec,spi-nor"; - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - }; -}; - -&blsp1_uart2 { - pinctrl-0 = <&uart2_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&rpm_requests { - regulators { - compatible = "qcom,rpm-mp5496-regulators"; - - ipq9574_s1: s1 { - /* - * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. - * During regulator registration, kernel not knowing the initial voltage, - * considers it as zero and brings up the regulators with minimum supported voltage. - * Update the regulator-min-microvolt with SVS voltage of 725mV so that - * the regulators are brought up with 725mV which is sufficient for all the - * corner parts to operate at 800MHz - */ - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1075000>; - }; - }; }; &sdhc_1 { @@ -74,10 +28,6 @@ &sdhc_1 { status = "okay"; }; -&sleep_clk { - clock-frequency = <32000>; -}; - &tlmm { sdc_default_state: sdc-default-state { clk-pins { @@ -110,15 +60,4 @@ rclk-pins { bias-pull-down; }; }; - - spi_0_pins: spi-0-state { - pins = "gpio11", "gpio12", "gpio13", "gpio14"; - function = "blsp0_spi"; - drive-strength = <8>; - bias-disable; - }; -}; - -&xo_board_clk { - clock-frequency = <24000000>; }; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts index 877026ccc6e2..1bb8d96c9a82 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts @@ -8,69 +8,11 @@ /dts-v1/; -#include "ipq9574.dtsi" +#include "ipq9574-rdp-common.dtsi" / { model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7"; compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574"; - - aliases { - serial0 = &blsp1_uart2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - regulator_fixed_3p3: s3300 { - compatible = "regulator-fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - regulator-name = "fixed_3p3"; - }; - - regulator_fixed_0p925: s0925 { - compatible = "regulator-fixed"; - regulator-min-microvolt = <925000>; - regulator-max-microvolt = <925000>; - regulator-boot-on; - regulator-always-on; - regulator-name = "fixed_0p925"; - }; -}; - -&blsp1_uart2 { - pinctrl-0 = <&uart2_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&rpm_requests { - regulators { - compatible = "qcom,rpm-mp5496-regulators"; - - ipq9574_s1: s1 { - /* - * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. - * During regulator registration, kernel not knowing the initial voltage, - * considers it as zero and brings up the regulators with minimum supported voltage. - * Update the regulator-min-microvolt with SVS voltage of 725mV so that - * the regulators are brought up with 725mV which is sufficient for all the - * corner parts to operate at 800MHz - */ - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1075000>; - }; - - mp5496_l2: l2 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - }; }; &sdhc_1 { @@ -85,10 +27,6 @@ &sdhc_1 { status = "okay"; }; -&sleep_clk { - clock-frequency = <32000>; -}; - &tlmm { sdc_default_state: sdc-default-state { clk-pins { @@ -122,30 +60,3 @@ rclk-pins { }; }; }; - -&usb_0_dwc3 { - dr_mode = "host"; -}; - -&usb_0_qmpphy { - vdda-pll-supply = <&mp5496_l2>; - vdda-phy-supply = <®ulator_fixed_0p925>; - - status = "okay"; -}; - -&usb_0_qusbphy { - vdd-supply = <®ulator_fixed_0p925>; - vdda-pll-supply = <&mp5496_l2>; - vdda-phy-dpdm-supply = <®ulator_fixed_3p3>; - - status = "okay"; -}; - -&usb3 { - status = "okay"; -}; - -&xo_board_clk { - clock-frequency = <24000000>; -}; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts index c8fa54e1a62c..d36d1078763e 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts @@ -8,73 +8,10 @@ /dts-v1/; -#include "ipq9574.dtsi" +#include "ipq9574-rdp-common.dtsi" / { model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C6"; compatible = "qcom,ipq9574-ap-al02-c6", "qcom,ipq9574"; - aliases { - serial0 = &blsp1_uart2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&blsp1_spi0 { - pinctrl-0 = <&spi_0_pins>; - pinctrl-names = "default"; - status = "okay"; - - flash@0 { - compatible = "micron,n25q128a11", "jedec,spi-nor"; - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - }; -}; - -&blsp1_uart2 { - pinctrl-0 = <&uart2_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&rpm_requests { - regulators { - compatible = "qcom,rpm-mp5496-regulators"; - - ipq9574_s1: s1 { - /* - * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. - * During regulator registration, kernel not knowing the initial voltage, - * considers it as zero and brings up the regulators with minimum supported voltage. - * Update the regulator-min-microvolt with SVS voltage of 725mV so that - * the regulators are brought up with 725mV which is sufficient for all the - * corner parts to operate at 800MHz - */ - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1075000>; - }; - }; -}; - -&sleep_clk { - clock-frequency = <32000>; -}; - -&tlmm { - spi_0_pins: spi-0-state { - pins = "gpio11", "gpio12", "gpio13", "gpio14"; - function = "blsp0_spi"; - drive-strength = <8>; - bias-disable; - }; -}; - -&xo_board_clk { - clock-frequency = <24000000>; }; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts index f01de6628c3b..c30c9fbedf26 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts @@ -8,73 +8,10 @@ /dts-v1/; -#include "ipq9574.dtsi" +#include "ipq9574-rdp-common.dtsi" / { model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C8"; compatible = "qcom,ipq9574-ap-al02-c8", "qcom,ipq9574"; - aliases { - serial0 = &blsp1_uart2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&blsp1_spi0 { - pinctrl-0 = <&spi_0_pins>; - pinctrl-names = "default"; - status = "okay"; - - flash@0 { - compatible = "micron,n25q128a11", "jedec,spi-nor"; - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - }; -}; - -&blsp1_uart2 { - pinctrl-0 = <&uart2_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&rpm_requests { - regulators { - compatible = "qcom,rpm-mp5496-regulators"; - - ipq9574_s1: s1 { - /* - * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. - * During regulator registration, kernel not knowing the initial voltage, - * considers it as zero and brings up the regulators with minimum supported voltage. - * Update the regulator-min-microvolt with SVS voltage of 725mV so that - * the regulators are brought up with 725mV which is sufficient for all the - * corner parts to operate at 800MHz - */ - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1075000>; - }; - }; -}; - -&sleep_clk { - clock-frequency = <32000>; -}; - -&tlmm { - spi_0_pins: spi-0-state { - pins = "gpio11", "gpio12", "gpio13", "gpio14"; - function = "blsp0_spi"; - drive-strength = <8>; - bias-disable; - }; -}; - -&xo_board_clk { - clock-frequency = <24000000>; }; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts index 6efae3426cb8..0dc382f5d5ec 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts @@ -8,73 +8,9 @@ /dts-v1/; -#include "ipq9574.dtsi" +#include "ipq9574-rdp-common.dtsi" / { model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C9"; compatible = "qcom,ipq9574-ap-al02-c9", "qcom,ipq9574"; - - aliases { - serial0 = &blsp1_uart2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&blsp1_spi0 { - pinctrl-0 = <&spi_0_pins>; - pinctrl-names = "default"; - status = "okay"; - - flash@0 { - compatible = "micron,n25q128a11", "jedec,spi-nor"; - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - }; -}; - -&blsp1_uart2 { - pinctrl-0 = <&uart2_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&rpm_requests { - regulators { - compatible = "qcom,rpm-mp5496-regulators"; - - ipq9574_s1: s1 { - /* - * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. - * During regulator registration, kernel not knowing the initial voltage, - * considers it as zero and brings up the regulators with minimum supported voltage. - * Update the regulator-min-microvolt with SVS voltage of 725mV so that - * the regulators are brought up with 725mV which is sufficient for all the - * corner parts to operate at 800MHz - */ - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1075000>; - }; - }; -}; - -&sleep_clk { - clock-frequency = <32000>; -}; - -&tlmm { - spi_0_pins: spi-0-state { - pins = "gpio11", "gpio12", "gpio13", "gpio14"; - function = "blsp0_spi"; - drive-strength = <8>; - bias-disable; - }; -}; - -&xo_board_clk { - clock-frequency = <24000000>; }; diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 8a72ad4afd03..5f83ee42a719 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -106,42 +106,56 @@ memory@40000000 { }; cpu_opp_table: opp-table-cpu { - compatible = "operating-points-v2"; + compatible = "operating-points-v2-kryo-cpu"; opp-shared; + nvmem-cells = <&cpu_speed_bin>; opp-936000000 { opp-hz = /bits/ 64 <936000000>; opp-microvolt = <725000>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1104000000 { opp-hz = /bits/ 64 <1104000000>; opp-microvolt = <787500>; + opp-supported-hw = <0xf>; + clock-latency-ns = <200000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <862500>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; opp-1416000000 { opp-hz = /bits/ 64 <1416000000>; opp-microvolt = <862500>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1488000000 { opp-hz = /bits/ 64 <1488000000>; opp-microvolt = <925000>; + opp-supported-hw = <0x7>; clock-latency-ns = <200000>; }; opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <987500>; + opp-supported-hw = <0x5>; clock-latency-ns = <200000>; }; opp-2208000000 { opp-hz = /bits/ 64 <2208000000>; opp-microvolt = <1062500>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; }; @@ -223,6 +237,11 @@ qfprom: efuse@a4000 { reg = <0x000a4000 0x5a1>; #address-cells = <1>; #size-cells = <1>; + + cpu_speed_bin: cpu-speed-bin@15 { + reg = <0x15 0x2>; + bits = <7 2>; + }; }; cryptobam: dma-controller@704000 { @@ -652,8 +671,8 @@ apcs_glb: mailbox@b111000 { "qcom,ipq6018-apcs-apps-global"; reg = <0x0b111000 0x1000>; #clock-cells = <1>; - clocks = <&a73pll>, <&xo_board_clk>; - clock-names = "pll", "xo"; + clocks = <&a73pll>, <&xo_board_clk>, <&gcc GPLL0>; + clock-names = "pll", "xo", "gpll0"; #mbox-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts b/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts index aa4c1ab1e673..3459145516a1 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts @@ -3,6 +3,8 @@ /dts-v1/; #include "msm8916-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" + #include #include #include @@ -22,6 +24,19 @@ chosen { stdout-path = "serial0"; }; + reserved-memory { + /delete-node/ reserved@86680000; + /delete-node/ rmtfs@86700000; + + rmtfs: rmtfs@86680000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0 0x86680000 0x0 0x160000>; + no-map; + + qcom,client-id = <1>; + }; + }; + gpio-keys { compatible = "gpio-keys"; @@ -50,6 +65,17 @@ led-0 { }; }; + reg_headphones_avdd: regulator-headphones-avdd { + compatible = "regulator-fixed"; + regulator-name = "headphones_avdd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&tlmm 121 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-0 = <&headphones_avdd_default>; + pinctrl-names = "default"; + }; + usb_id: usb-id { compatible = "linux,extcon-usb-gpio"; id-gpios = <&tlmm 69 GPIO_ACTIVE_HIGH>; @@ -58,8 +84,41 @@ usb_id: usb-id { }; }; -&blsp_uart2 { +&blsp_i2c3 { status = "okay"; + + headphones: audio-codec@10 { + compatible = "asahi-kasei,ak4375"; + reg = <0x10>; + avdd-supply = <®_headphones_avdd>; + tvdd-supply = <&pm8916_l6>; + pdn-gpios = <&tlmm 114 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&headphones_pdn_default>; + pinctrl-names = "default"; + #sound-dai-cells = <0>; + }; + + speaker_codec_top: audio-codec@34 { + compatible = "nxp,tfa9897"; + reg = <0x34>; + vddd-supply = <&pm8916_l6>; + rcv-gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&speaker_top_default>; + pinctrl-names = "default"; + sound-name-prefix = "Speaker Top"; + #sound-dai-cells = <0>; + }; + + speaker_codec_bottom: audio-codec@36 { + compatible = "nxp,tfa9897"; + reg = <0x36>; + vddd-supply = <&pm8916_l6>; + rcv-gpios = <&tlmm 111 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&speaker_bottom_default>; + pinctrl-names = "default"; + sound-name-prefix = "Speaker Bottom"; + #sound-dai-cells = <0>; + }; }; &blsp_i2c4 { @@ -153,6 +212,22 @@ led@1 { }; }; +&blsp_uart2 { + status = "okay"; +}; + +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5000000>; +}; + +&pm8916_codec { + qcom,micbias1-ext-cap; + qcom,micbias-lvl = <2800>; + qcom,mbhc-vthreshold-low = <75 100 120 180 500>; + qcom,mbhc-vthreshold-high = <75 100 120 180 500>; + qcom,hphl-jack-type-normally-open; +}; + &pm8916_resin { status = "okay"; linux,code = ; @@ -169,6 +244,17 @@ &pm8916_vib { status = "okay"; }; +&q6afedai { + dai@18 { + reg = ; + qcom,sd-lines = <0>; + }; + dai@22 { + reg = ; + qcom,sd-lines = <0>; + }; +}; + &sdhc_1 { status = "okay"; }; @@ -183,6 +269,54 @@ &sdhc_2 { cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; }; +&sound { + /* Add pin switches for speakers to allow disabling them individually */ + model = "alcatel-idol3"; + widgets = + "Speaker", "Speaker Top", + "Speaker", "Speaker Bottom"; + pin-switches = "Speaker Top", "Speaker Bottom"; + audio-routing = + "Speaker Top", "Speaker Top OUT", + "Speaker Bottom", "Speaker Bottom OUT", + "AMIC1", "MIC BIAS External1", + "AMIC2", "MIC BIAS Internal2", + "AMIC3", "MIC BIAS External1"; + + pinctrl-0 = <&cdc_pdm_default &pri_mi2s_default &pri_mi2s_ws_default &sec_mi2s_default>; + pinctrl-1 = <&cdc_pdm_sleep &pri_mi2s_sleep &pri_mi2s_ws_sleep &sec_mi2s_sleep>; + pinctrl-names = "default", "sleep"; + + sound_link_backend2: backend2-dai-link { + link-name = "Quaternary MI2S"; + + cpu { + sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; + }; + platform { + sound-dai = <&q6routing>; + }; + codec { + sound-dai = <&speaker_codec_top>, <&speaker_codec_bottom>; + }; + }; +}; + +&sound_link_backend0 { + /* Primary MI2S is not used, replace with Secondary MI2S for headphones */ + link-name = "Secondary MI2S"; + + cpu { + sound-dai = <&q6afedai SECONDARY_MI2S_RX>; + }; + platform { + sound-dai = <&q6routing>; + }; + codec { + sound-dai = <&headphones>; + }; +}; + &usb { status = "okay"; extcon = <&usb_id>, <&usb_id>; @@ -212,6 +346,15 @@ &wcnss_mem { status = "okay"; }; +/* Only some of the pins are used */ +&pri_mi2s_default { + pins = "gpio113", "gpio115"; +}; + +&pri_mi2s_sleep { + pins = "gpio113", "gpio115"; +}; + &tlmm { accel_int_default: accel-int-default-state { pins = "gpio31"; @@ -245,6 +388,20 @@ gyro_int_default: gyro-int-default-state { bias-disable; }; + headphones_avdd_default: headphones-avdd-default-state { + pins = "gpio121"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + headphones_pdn_default: headphones-pdn-default-state { + pins = "gpio114"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + /* * The OEM wired an additional GPIO to be asserted so that * the si-en,sn3190 LED IC works. Since this GPIO is not @@ -291,6 +448,20 @@ sdc2_cd_default: sdc2-cd-default-state { bias-disable; }; + speaker_bottom_default: speaker-bottom-default-state { + pins = "gpio111"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + speaker_top_default: speaker-top-default-state { + pins = "gpio50"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + ts_int_reset_default: ts-int-reset-default-state { pins = "gpio13", "gpio100"; function = "gpio"; diff --git a/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts b/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts index a8be6ff66893..77618c7374df 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts @@ -3,6 +3,8 @@ /dts-v1/; #include "msm8916-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" + #include #include #include @@ -130,6 +132,18 @@ &blsp_uart2 { status = "okay"; }; +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5500000>; +}; + +&pm8916_codec { + qcom,micbias-lvl = <2800>; + qcom,mbhc-vthreshold-low = <75 150 237 450 500>; + qcom,mbhc-vthreshold-high = <75 150 237 450 500>; + qcom,micbias1-ext-cap; + qcom,hphl-jack-type-normally-open; +}; + &pm8916_rpm_regulators { pm8916_l17: l17 { regulator-min-microvolt = <2850000>; @@ -151,6 +165,13 @@ &sdhc_2 { cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; }; +&sound { + audio-routing = + "AMIC1", "MIC BIAS External1", + "AMIC2", "MIC BIAS Internal2", + "AMIC3", "MIC BIAS External1"; +}; + &usb { status = "okay"; extcon = <&usb_id>, <&usb_id>; diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts index 47d1c5cb13f4..37fa55166918 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts @@ -3,6 +3,8 @@ /dts-v1/; #include "msm8916-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" + #include #include #include @@ -25,17 +27,26 @@ chosen { /* * For some reason, the signed wcnss firmware is not relocatable. - * It must be loaded at 0x8b600000. All other firmware is relocatable, - * so place wcnss at the fixed address and then all other firmware - * regions will be automatically allocated at a fitting place. + * It must be loaded at 0x8b600000. Unfortunately, this also means that + * mpss_mem does not fit when loaded to the typical address at 0x86800000. + * + * Load wcnss_mem to the fixed address and relocate mpss_mem to the next + * working higher address. For some reason the modem firmware does not + * boot when placed at 0x8a800000 to 0x8e800000. */ reserved-memory { + /delete-node/ mpss@86800000; /delete-node/ wcnss; wcnss_mem: wcnss@8b600000 { reg = <0x0 0x8b600000 0x0 0x600000>; no-map; }; + + mpss_mem: mpss@8e800000 { + reg = <0x0 0x8e800000 0x0 0x5000000>; + no-map; + }; }; gpio-keys { @@ -225,6 +236,13 @@ &blsp_uart2 { status = "okay"; }; +&pm8916_codec { + qcom,micbias-lvl = <2800>; + qcom,mbhc-vthreshold-low = <75 150 237 450 500>; + qcom,mbhc-vthreshold-high = <75 150 237 450 500>; + qcom,hphl-jack-type-normally-open; +}; + &pm8916_resin { status = "okay"; linux,code = ; @@ -254,6 +272,13 @@ &sdhc_2 { non-removable; }; +&sound { + audio-routing = + "AMIC1", "MIC BIAS Internal1", + "AMIC2", "MIC BIAS Internal2", + "AMIC3", "MIC BIAS Internal3"; +}; + &usb { status = "okay"; dr_mode = "peripheral"; diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts index 41cadb906b98..3b7fdb6797a9 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts @@ -3,9 +3,12 @@ /dts-v1/; #include "msm8916-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" + #include #include #include +#include / { model = "BQ Aquaris X5 (Longcheer L8910)"; @@ -22,6 +25,16 @@ chosen { stdout-path = "serial0"; }; + speaker_amp: audio-amplifier { + compatible = "awinic,aw8738"; + mode-gpios = <&tlmm 114 GPIO_ACTIVE_HIGH>; + awinic,mode = <5>; + sound-name-prefix = "Speaker Amp"; + + pinctrl-0 = <&spk_ext_pa_default>; + pinctrl-names = "default"; + }; + flash-led-controller { compatible = "ocs,ocp8110"; enable-gpios = <&tlmm 49 GPIO_ACTIVE_HIGH>; @@ -74,6 +87,46 @@ usb_id: usb-id { }; }; +&blsp_i2c2 { + status = "okay"; + + led-controller@30 { + compatible = "kinetic,ktd2026"; + reg = <0x30>; + #address-cells = <1>; + #size-cells = <0>; + + vin-supply = <&pm8916_l17>; + vio-supply = <&pm8916_l6>; + + pinctrl-0 = <&status_led_default>; + pinctrl-names = "default"; + + multi-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + }; + + led@1 { + reg = <1>; + color = ; + }; + + led@2 { + reg = <2>; + color = ; + }; + }; + }; +}; + &blsp_i2c3 { status = "okay"; @@ -107,6 +160,27 @@ &blsp_uart2 { status = "okay"; }; +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5000000>; +}; + +&pm8916_codec { + qcom,micbias-lvl = <2800>; + qcom,mbhc-vthreshold-low = <75 100 120 180 500>; + qcom,mbhc-vthreshold-high = <75 100 120 180 500>; + qcom,hphl-jack-type-normally-open; +}; + +&pm8916_gpios { + status_led_default: status-led-default-state { + pins = "gpio3"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = ; + bias-disable; + output-high; + }; +}; + &pm8916_resin { status = "okay"; linux,code = ; @@ -137,6 +211,28 @@ &sdhc_2 { cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; }; +&sound { + /* + * Provide widgets/pin-switches to allow enabling speaker separately. + * The hardware does not provide a way to disable the output via the + * headphone jack when the speaker is enabled. + */ + model = "bq-paella"; + widgets = + "Speaker", "Speaker", + "Headphone", "Headphones"; + pin-switches = "Speaker"; + audio-routing = + "Speaker", "Speaker Amp OUT", + "Speaker Amp IN", "HPH_R", + "Headphones", "HPH_L", + "Headphones", "HPH_R", + "AMIC1", "MIC BIAS External1", + "AMIC2", "MIC BIAS Internal2", + "AMIC3", "MIC BIAS External1"; + aux-devs = <&speaker_amp>; +}; + &usb { status = "okay"; extcon = <&usb_id>, <&usb_id>; @@ -205,6 +301,13 @@ sdc2_cd_default: sdc2-cd-default-state { bias-disable; }; + spk_ext_pa_default: spk-ext-pa-default-state { + pins = "gpio114"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + usb_id_default: usb-id-default-state { pins = "gpio110"; function = "gpio"; diff --git a/arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi b/arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi new file mode 100644 index 000000000000..039961622633 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* + * msm8916-modem-qdsp6.dtsi describes the typical modem setup on MSM8916 devices + * (or similar SoCs) with audio routed via the QDSP6 services provided by the + * modem firmware. The digital/analog codec in the SoC/PMIC is used by default, + * but boards can define additional codecs by adding additional backend DAI links. + */ + +#include +#include + +&apr { + status = "okay"; +}; + +&bam_dmux { + status = "okay"; +}; + +&bam_dmux_dma { + status = "okay"; +}; + +&lpass { + status = "reserved"; /* Controlled by QDSP6 */ +}; + +&lpass_codec { + status = "okay"; +}; + +&mba_mem { + status = "okay"; +}; + +&mpss { + status = "okay"; +}; + +&mpss_mem { + status = "okay"; +}; + +&pm8916_codec { + status = "okay"; +}; + +&q6afedai { + dai@16 { + reg = ; + qcom,sd-lines = <0 1>; + }; + dai@20 { + reg = ; + qcom,sd-lines = <0 1>; + }; +}; + +&q6asmdai { + dai@0 { + reg = <0>; + direction = ; + }; + dai@1 { + reg = <1>; + direction = ; + }; + dai@2 { + reg = <2>; + direction = ; + }; + dai@3 { + reg = <3>; + direction = ; + is-compress-dai; + }; +}; + +&sound { + compatible = "qcom,msm8916-qdsp6-sndcard"; + model = "msm8916"; + + pinctrl-0 = <&cdc_pdm_default>; + pinctrl-1 = <&cdc_pdm_sleep>; + pinctrl-names = "default", "sleep"; + + status = "okay"; + + frontend0-dai-link { + link-name = "MultiMedia1"; + + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; + }; + }; + + frontend1-dai-link { + link-name = "MultiMedia2"; + + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; + }; + }; + + frontend2-dai-link { + link-name = "MultiMedia3"; + + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; + }; + }; + + frontend3-dai-link { + link-name = "MultiMedia4"; + + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; + }; + }; + + sound_link_backend0: backend0-dai-link { + link-name = "Primary MI2S"; + + cpu { + sound-dai = <&q6afedai PRIMARY_MI2S_RX>; + }; + platform { + sound-dai = <&q6routing>; + }; + codec { + sound-dai = <&lpass_codec 0>, <&pm8916_codec 0>; + }; + }; + + sound_link_backend1: backend1-dai-link { + link-name = "Tertiary MI2S"; + + cpu { + sound-dai = <&q6afedai TERTIARY_MI2S_TX>; + }; + platform { + sound-dai = <&q6routing>; + }; + codec { + sound-dai = <&lpass_codec 1>, <&pm8916_codec 1>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi index 0b29132b74e1..2937495940ea 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi @@ -1,10 +1,13 @@ // SPDX-License-Identifier: GPL-2.0-only #include "msm8916-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" + #include #include #include #include +#include / { aliases { @@ -196,6 +199,18 @@ vibrator: vibrator { }; }; +&blsp_i2c1 { + status = "okay"; + + speaker_codec: audio-codec@34 { + compatible = "nxp,tfa9895"; + reg = <0x34>; + vddd-supply = <&pm8916_l5>; + sound-name-prefix = "Speaker"; + #sound-dai-cells = <0>; + }; +}; + &blsp_i2c2 { status = "okay"; @@ -243,6 +258,25 @@ &gpu { status = "okay"; }; +/* + * For some reason the speaker amplifier is connected to the second SD line + * (MI2S_2_D1) instead of the first (MI2S_2_D0). This must be configured in the + * device tree, otherwise audio will seemingly play fine on the wrong SD line + * but the speaker stays silent. + * + * When routing audio via QDSP6 (the default) the &lpass node is reserved and + * the definitions from &q6afedai are used. When the modem is disabled audio can + * be alternatively routed directly to the LPASS hardware with reduced latency. + * The definitions for &lpass are here for completeness to simplify changing the + * setup with minor changes to the DT (either manually or with DT overlays). + */ +&lpass { + dai-link@3 { + reg = ; + qcom,playback-sd-lines = <1>; + }; +}; + &mdss { status = "okay"; }; @@ -253,6 +287,10 @@ &mdss_dsi0 { pinctrl-1 = <&mdss_sleep>; }; +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5400000>; +}; + &pm8916_resin { status = "okay"; linux,code = ; @@ -265,6 +303,13 @@ pm8916_l17: l17 { }; }; +&q6afedai { + dai@22 { + reg = ; + qcom,sd-lines = <1>; + }; +}; + &sdhc_1 { status = "okay"; }; @@ -279,6 +324,32 @@ &sdhc_2 { cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; }; +&sound { + model = "samsung-a2015"; + audio-routing = + "AMIC1", "MIC BIAS External1", + "AMIC2", "MIC BIAS Internal2", + "AMIC3", "MIC BIAS External1"; + + pinctrl-0 = <&cdc_pdm_default &sec_mi2s_default>; + pinctrl-1 = <&cdc_pdm_sleep &sec_mi2s_sleep>; + pinctrl-names = "default", "sleep"; + + sound_link_backend2: backend2-dai-link { + link-name = "Quaternary MI2S"; + + cpu { + sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; + }; + platform { + sound-dai = <&q6routing>; + }; + codec { + sound-dai = <&speaker_codec>; + }; + }; +}; + &usb { status = "okay"; extcon = <&muic>, <&muic>; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts index f5a808369518..3b934f5eba47 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts @@ -49,11 +49,6 @@ reg_key_led: regulator-key-led { }; }; -&touchkey { - vcc-supply = <®_touch_key>; - vdd-supply = <®_key_led>; -}; - &accelerometer { mount-matrix = "0", "1", "0", "1", "0", "0", @@ -108,6 +103,11 @@ &mdss_dsi0_out { remote-endpoint = <&panel_in>; }; +&touchkey { + vcc-supply = <®_touch_key>; + vdd-supply = <®_key_led>; +}; + &vibrator { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi index 0824ab041d80..3c49dac92d2d 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi @@ -65,6 +65,10 @@ accelerometer@1d { }; }; +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5a00000>; +}; + ®_motor_vdd { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-grandmax.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-grandmax.dts index 3f145dde4059..5882b3a593b8 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-grandmax.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-grandmax.dts @@ -49,6 +49,10 @@ ®_touch_key { status = "disabled"; }; +&sound { + model = "samsung-gmax"; /* No secondary microphone */ +}; + &tlmm { gpio_leds_default: gpio-led-default-state { pins = "gpio60"; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi index c19cf20d7427..fbd2caf405d5 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi @@ -3,9 +3,12 @@ /dts-v1/; #include "msm8916-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" + #include #include #include +#include / { aliases { @@ -65,25 +68,6 @@ hall-sensor-switch { }; }; -&blsp_i2c4 { - status = "okay"; - - fuelgauge@36 { - compatible = "maxim,max77849-battery"; - reg = <0x36>; - - maxim,rsns-microohm = <10000>; - maxim,over-heat-temp = <600>; - maxim,over-volt = <4400>; - - interrupt-parent = <&tlmm>; - interrupts = <121 IRQ_TYPE_EDGE_FALLING>; - - pinctrl-0 = <&fuelgauge_int_default>; - pinctrl-names = "default"; - }; -}; - &blsp_i2c2 { status = "okay"; @@ -112,10 +96,52 @@ accelerometer@1d { }; }; +&blsp_i2c4 { + status = "okay"; + + fuelgauge@36 { + compatible = "maxim,max77849-battery"; + reg = <0x36>; + + maxim,rsns-microohm = <10000>; + maxim,over-heat-temp = <600>; + maxim,over-volt = <4400>; + + interrupt-parent = <&tlmm>; + interrupts = <121 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-0 = <&fuelgauge_int_default>; + pinctrl-names = "default"; + }; +}; + &blsp_uart2 { status = "okay"; }; +/* + * For some reason the speaker amplifier is connected to the second SD line + * (MI2S_2_D1) instead of the first (MI2S_2_D0). This must be configured in the + * device tree, otherwise audio will seemingly play fine on the wrong SD line + * but the speaker stays silent. + * + * When routing audio via QDSP6 (the default) the &lpass node is reserved and + * the definitions from &q6afedai are used. When the modem is disabled audio can + * be alternatively routed directly to the LPASS hardware with reduced latency. + * The definitions for &lpass are here for completeness to simplify changing the + * setup with minor changes to the DT (either manually or with DT overlays). + */ +&lpass { + dai-link@3 { + reg = ; + qcom,playback-sd-lines = <1>; + }; +}; + +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5400000>; +}; + &pm8916_resin { linux,code = ; status = "okay"; @@ -133,6 +159,13 @@ &pm8916_usbin { status = "okay"; }; +&q6afedai { + dai@22 { + reg = ; + qcom,sd-lines = <1>; + }; +}; + &sdhc_1 { status = "okay"; }; @@ -147,6 +180,27 @@ &sdhc_2 { status = "okay"; }; +&sound { + audio-routing = + "AMIC1", "MIC BIAS External1", + "AMIC2", "MIC BIAS Internal2", + "AMIC3", "MIC BIAS External1"; + + sound_link_backend2: backend2-dai-link { + link-name = "Quaternary MI2S"; + + cpu { + sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; + }; + platform { + sound-dai = <&q6routing>; + }; + codec { + sound-dai = <&speaker_codec>; + }; + }; +}; + &usb { dr_mode = "peripheral"; extcon = <&pm8916_usbin>; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt510.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt510.dts index 75c4854ecd64..5b34529b816c 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt510.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt510.dts @@ -9,6 +9,14 @@ / { compatible = "samsung,gt510", "qcom,msm8916"; chassis-type = "tablet"; + speaker_codec: audio-codec { + compatible = "maxim,max98357a"; + sdmode-gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>; + #sound-dai-cells = <0>; + pinctrl-0 = <&audio_sdmode_default>; + pinctrl-names = "default"; + }; + clk_pwm: pwm { compatible = "clk-pwm"; #pwm-cells = <2>; @@ -112,6 +120,10 @@ touchscreen@4a { }; }; +&gpu { + status = "okay"; +}; + &mdss { status = "okay"; }; @@ -142,7 +154,21 @@ &mdss_dsi0_out { remote-endpoint = <&panel_in>; }; +&sound { + model = "samsung-gt510"; + pinctrl-0 = <&cdc_pdm_default &sec_mi2s_default>; + pinctrl-1 = <&cdc_pdm_sleep &sec_mi2s_sleep>; + pinctrl-names = "default", "sleep"; +}; + &tlmm { + audio_sdmode_default: audio-sdmode-default-state { + pins = "gpio55"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + buckbooster_en_default: buckbooster-en-default-state { pins = "gpio51"; function = "gpio"; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt58.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt58.dts index 11359bcc27b3..579312ed53ce 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt58.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt58.dts @@ -35,6 +35,26 @@ reg_vdd_tsp: regulator-vdd-tsp { pinctrl-names = "default"; }; + i2c-amplifier { + compatible = "i2c-gpio"; + sda-gpios = <&tlmm 55 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&tlmm 56 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + pinctrl-0 = <&_i2c_default>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + speaker_codec: audio-codec@34 { + compatible = "nxp,tfa9895"; + reg = <0x34>; + vddd-supply = <&pm8916_l5>; + sound-name-prefix = "Speaker"; + #sound-dai-cells = <0>; + }; + }; + vibrator { compatible = "gpio-vibrator"; enable-gpios = <&tlmm 76 GPIO_ACTIVE_HIGH>; @@ -64,6 +84,10 @@ touchscreen@20 { }; }; +&gpu { + status = "okay"; +}; + &mdss { status = "okay"; }; @@ -94,7 +118,21 @@ &mdss_dsi0_out { remote-endpoint = <&panel_in>; }; +&sound { + model = "samsung-a2015"; + pinctrl-0 = <&cdc_pdm_default &sec_mi2s_default &secondary_mic_default>; + pinctrl-1 = <&cdc_pdm_sleep &sec_mi2s_sleep &secondary_mic_default>; + pinctrl-names = "default", "sleep"; +}; + &tlmm { + amp_i2c_default: amp-i2c-default-state { + pins = "gpio55", "gpio56"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + buckbooster_en_default: buckbooster-en-default-state { pins = "gpio8"; function = "gpio"; @@ -123,6 +161,14 @@ reg_tsp_en_default: reg-tsp-en-default-state { bias-disable; }; + secondary_mic_default: secondary-mic-default-state { + pins = "gpio98"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-high; + }; + tsp_int_default: tsp-int-default-state { pins = "gpio13"; function = "gpio"; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi index fe59be3505fe..5ca2ada266f4 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only #include "msm8916-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" + #include #include #include @@ -135,6 +137,10 @@ &blsp_uart2 { status = "okay"; }; +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5800000>; +}; + &pm8916_resin { status = "okay"; linux,code = ; @@ -154,6 +160,14 @@ &sdhc_2 { cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; }; +&sound { + model = "msm8916-1mic"; + audio-routing = + "AMIC1", "MIC BIAS External1", + "AMIC2", "MIC BIAS Internal2", + "AMIC3", "MIC BIAS External1"; +}; + &usb { extcon = <&muic>, <&muic>; status = "okay"; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dts index 58c2f5a70e78..ba8650971d6a 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dts @@ -19,6 +19,10 @@ &blsp_i2c5 { status = "disabled"; }; +&pm8916_codec { + qcom,micbias1-ext-cap; +}; + &touchscreen { /* FIXME: Missing sm5703-mfd driver to power up vdd-supply */ }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts index 68da2a2d3077..5ce8f1350abc 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts @@ -6,6 +6,8 @@ /dts-v1/; #include "msm8916-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" + #include #include #include @@ -319,6 +321,10 @@ &blsp_uart2 { status = "okay"; }; +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5a00000>; +}; + &pm8916_resin { status = "okay"; linux,code = ; @@ -350,6 +356,13 @@ &sdhc_2 { no-1-8-v; }; +&sound { + audio-routing = + "AMIC1", "MIC BIAS External1", + "AMIC2", "MIC BIAS Internal2", + "AMIC3", "MIC BIAS External1"; +}; + &usb { status = "okay"; extcon = <&muic>, <&muic>; diff --git a/arch/arm64/boot/dts/qcom/msm8916-thwc-uf896.dts b/arch/arm64/boot/dts/qcom/msm8916-thwc-uf896.dts index 6fe1850ba20e..f34997500891 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-thwc-uf896.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-thwc-uf896.dts @@ -13,16 +13,16 @@ &button_restart { gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; }; -&led_r { - gpios = <&tlmm 82 GPIO_ACTIVE_HIGH>; +&led_b { + gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; }; &led_g { gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>; }; -&led_b { - gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; +&led_r { + gpios = <&tlmm 82 GPIO_ACTIVE_HIGH>; }; &button_default { diff --git a/arch/arm64/boot/dts/qcom/msm8916-thwc-ufi001c.dts b/arch/arm64/boot/dts/qcom/msm8916-thwc-ufi001c.dts index 16d4a91022be..6cb3911ba1c9 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-thwc-ufi001c.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-thwc-ufi001c.dts @@ -13,16 +13,16 @@ &button_restart { gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; }; -&led_r { - gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; +&led_b { + gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>; }; &led_g { gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; }; -&led_b { - gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>; +&led_r { + gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; }; &mpss { diff --git a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts index 419f35c1fc92..d4b88c787e59 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts @@ -6,6 +6,8 @@ /dts-v1/; #include "msm8916-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" + #include #include #include @@ -25,6 +27,28 @@ chosen { stdout-path = "serial0"; }; + speaker_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>; + sound-name-prefix = "Speaker Amp"; + pinctrl-0 = <&speaker_amp_default>; + pinctrl-names = "default"; + }; + + /* + * This seems to be actually an analog switch that either routes audio + * to the headphone jack or nowhere. Given that we need to enable a GPIO + * to get sound on headphones, modelling it as simple-audio-amplifier + * works just fine. + */ + headphones_switch: audio-switch { + compatible = "simple-audio-amplifier"; + enable-gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>; + sound-name-prefix = "Headphones Switch"; + pinctrl-0 = <&headphones_switch_default>; + pinctrl-names = "default"; + }; + flash-led-controller { compatible = "ocs,ocp8110"; enable-gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; @@ -146,6 +170,18 @@ &blsp_uart2 { status = "okay"; }; +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5100000>; +}; + +&pm8916_codec { + qcom,micbias1-ext-cap; + qcom,micbias-lvl = <2800>; + qcom,mbhc-vthreshold-low = <75 100 120 180 500>; + qcom,mbhc-vthreshold-high = <75 100 120 180 500>; + qcom,hphl-jack-type-normally-open; +}; + &pm8916_resin { status = "okay"; linux,code = ; @@ -180,6 +216,30 @@ &sdhc_2 { non-removable; }; +&sound { + /* + * Provide widgets/pin-switches to allow enabling speaker and headphones + * separately. Both are routed via the HPH_L/HPH_R pins of the codec. + */ + model = "wt88047"; + widgets = + "Speaker", "Speaker", + "Headphone", "Headphones"; + pin-switches = "Speaker", "Headphones"; + audio-routing = + "Speaker", "Speaker Amp OUTL", + "Speaker", "Speaker Amp OUTR", + "Speaker Amp INL", "HPH_R", + "Speaker Amp INR", "HPH_R", + "Headphones", "Headphones Switch OUTL", + "Headphones", "Headphones Switch OUTR", + "Headphones Switch INL", "HPH_L", + "Headphones Switch INR", "HPH_R", + "AMIC1", "MIC BIAS External1", + "AMIC2", "MIC BIAS Internal2"; + aux-devs = <&speaker_amp>, <&headphones_switch>; +}; + &usb { status = "okay"; extcon = <&usb_id>, <&usb_id>; @@ -226,6 +286,13 @@ gpio_keys_default: gpio-keys-default-state { bias-pull-up; }; + headphones_switch_default: headphones-switch-default-state { + pins = "gpio8"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + imu_default: imu-default-state { pins = "gpio115"; function = "gpio"; @@ -234,6 +301,13 @@ imu_default: imu-default-state { bias-disable; }; + speaker_amp_default: speaker-amp-default-state { + pins = "gpio117"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + touchscreen_default: touchscreen-default-state { touchscreen-pins { pins = "gpio13"; diff --git a/arch/arm64/boot/dts/qcom/msm8916-yiming-uz801v3.dts b/arch/arm64/boot/dts/qcom/msm8916-yiming-uz801v3.dts index 5e6ba8c58bb5..a98efcfe78b7 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-yiming-uz801v3.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-yiming-uz801v3.dts @@ -13,16 +13,16 @@ &button_restart { gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; }; -&led_r { - gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; +&led_b { + gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; }; &led_g { gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>; }; -&led_b { - gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; +&led_r { + gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; }; &button_default { diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 4f799b536a92..e8a14dd7e7c2 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include / { @@ -1989,6 +1990,54 @@ smd-edge { label = "hexagon"; + apr: apr { + compatible = "qcom,apr-v2"; + qcom,smd-channels = "apr_audio_svc"; + qcom,domain = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + q6core: service@3 { + compatible = "qcom,q6core"; + reg = ; + }; + + q6afe: service@4 { + compatible = "qcom,q6afe"; + reg = ; + + q6afedai: dais { + compatible = "qcom,q6afe-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + }; + }; + + q6asm: service@7 { + compatible = "qcom,q6asm"; + reg = ; + + q6asmdai: dais { + compatible = "qcom,q6asm-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + }; + }; + + q6adm: service@8 { + compatible = "qcom,q6adm"; + reg = ; + + q6routing: routing { + compatible = "qcom,q6adm-routing"; + #sound-dai-cells = <0>; + }; + }; + }; + fastrpc { compatible = "qcom,fastrpc"; qcom,smd-channels = "fastrpcsmd-apps-dsp"; diff --git a/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts b/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts index 6802714fda3f..ff532fdc1826 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts +++ b/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts @@ -8,6 +8,7 @@ #include #include #include +#include #include / { @@ -120,6 +121,46 @@ usb_id: usb-id { }; +&blsp_i2c2 { + status = "okay"; + + led-controller@30 { + compatible = "kinetic,ktd2026"; + reg = <0x30>; + #address-cells = <1>; + #size-cells = <0>; + + vin-supply = <&pm8916_l17>; + vio-supply = <&pm8916_l6>; + + pinctrl-0 = <&status_led_default>; + pinctrl-names = "default"; + + multi-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + }; + + led@1 { + reg = <1>; + color = ; + }; + + led@2 { + reg = <2>; + color = ; + }; + }; + }; +}; + &blsp_i2c3 { status = "okay"; @@ -184,6 +225,16 @@ &blsp_uart2 { status = "okay"; }; +&pm8916_gpios { + status_led_default: status-led-default-state { + pins = "gpio3"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = ; + bias-disable; + output-high; + }; +}; + &pm8916_mpps { pwm_out: mpp4-state { pins = "mpp4"; @@ -247,6 +298,10 @@ &wcnss_iris { compatible = "qcom,wcn3620"; }; +&wcnss_mem { + status = "okay"; +}; + &tlmm { button_backlight_default: button-backlight-default-state { pins = "gpio17"; diff --git a/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts b/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts index fccd8fec8b8f..aa6c39482a2f 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts +++ b/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts @@ -3,10 +3,12 @@ /dts-v1/; #include "msm8939-pm8916.dtsi" +#include "msm8916-modem-qdsp6.dtsi" #include #include #include +#include / { model = "Samsung Galaxy A7 (2015)"; @@ -287,6 +289,18 @@ muic: extcon@25 { }; }; +&blsp_i2c2 { + status = "okay"; + + speaker_codec: audio-codec@34 { + compatible = "nxp,tfa9895"; + reg = <0x34>; + vddd-supply = <&pm8916_l5>; + sound-name-prefix = "Speaker"; + #sound-dai-cells = <0>; + }; +}; + &blsp_i2c5 { status = "okay"; @@ -309,6 +323,29 @@ &blsp_uart2 { status = "okay"; }; +/* + * For some reason the speaker amplifier is connected to the second SD line + * (MI2S_2_D1) instead of the first (MI2S_2_D0). This must be configured in the + * device tree, otherwise audio will seemingly play fine on the wrong SD line + * but the speaker stays silent. + * + * When routing audio via QDSP6 (the default) the &lpass node is reserved and + * the definitions from &q6afedai are used. When the modem is disabled audio can + * be alternatively routed directly to the LPASS hardware with reduced latency. + * The definitions for &lpass are here for completeness to simplify changing the + * setup with minor changes to the DT (either manually or with DT overlays). + */ +&lpass { + dai-link@3 { + reg = ; + qcom,playback-sd-lines = <1>; + }; +}; + +&mpss_mem { + reg = <0x0 0x86800000 0x0 0x5800000>; +}; + &pm8916_resin { linux,code = ; status = "okay"; @@ -321,6 +358,13 @@ pm8916_l17: l17 { }; }; +&q6afedai { + dai@22 { + reg = ; + qcom,sd-lines = <1>; + }; +}; + &sdhc_1 { status = "okay"; }; @@ -335,6 +379,32 @@ &sdhc_2 { status = "okay"; }; +&sound { + model = "samsung-a2015"; + audio-routing = + "AMIC1", "MIC BIAS External1", + "AMIC2", "MIC BIAS Internal2", + "AMIC3", "MIC BIAS External1"; + + pinctrl-0 = <&cdc_pdm_default &sec_mi2s_default>; + pinctrl-1 = <&cdc_pdm_sleep &sec_mi2s_sleep>; + pinctrl-names = "default", "sleep"; + + sound_link_backend2: backend2-dai-link { + link-name = "Quaternary MI2S"; + + cpu { + sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; + }; + platform { + sound-dai = <&q6routing>; + }; + codec { + sound-dai = <&speaker_codec>; + }; + }; +}; + &usb { extcon = <&muic>, <&muic>; status = "okay"; diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi index 324b5d26db40..95610a32750a 100644 --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include / { @@ -1537,6 +1538,20 @@ spmi_bus: spmi@200f000 { #interrupt-cells = <4>; }; + bam_dmux_dma: dma-controller@4044000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x04044000 0x19000>; + interrupts = ; + #dma-cells = <1>; + qcom,ee = <0>; + + num-channels = <6>; + qcom,num-ees = <1>; + qcom,powered-remotely; + + status = "disabled"; + }; + mpss: remoteproc@4080000 { compatible = "qcom,msm8916-mss-pil"; reg = <0x04080000 0x100>, <0x04020000 0x040>; @@ -1569,6 +1584,22 @@ mpss: remoteproc@4080000 { qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>; status = "disabled"; + bam_dmux: bam-dmux { + compatible = "qcom,bam-dmux"; + + interrupt-parent = <&hexagon_smsm>; + interrupts = <1 IRQ_TYPE_EDGE_BOTH>, <11 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "pc", "pc-ack"; + + qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>; + qcom,smem-state-names = "pc", "pc-ack"; + + dmas = <&bam_dmux_dma 4>, <&bam_dmux_dma 5>; + dma-names = "tx", "rx"; + + status = "disabled"; + }; + mba { memory-region = <&mba_mem>; }; @@ -1585,6 +1616,54 @@ smd-edge { qcom,remote-pid = <1>; label = "hexagon"; + + apr: apr { + compatible = "qcom,apr-v2"; + qcom,smd-channels = "apr_audio_svc"; + qcom,domain = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + q6core: service@3 { + compatible = "qcom,q6core"; + reg = ; + }; + + q6afe: service@4 { + compatible = "qcom,q6afe"; + reg = ; + + q6afedai: dais { + compatible = "qcom,q6afe-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + }; + }; + + q6asm: service@7 { + compatible = "qcom,q6asm"; + reg = ; + + q6asmdai: dais { + compatible = "qcom,q6asm-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + }; + }; + + q6adm: service@8 { + compatible = "qcom,q6adm"; + reg = ; + + q6routing: routing { + compatible = "qcom,q6adm-routing"; + #sound-dai-cells = <0>; + }; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi index df0afe82f250..3bf7cf5d1700 100644 --- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi +++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi @@ -148,7 +148,7 @@ pm7250b_adc_tm: adc-tm@3500 { status = "disabled"; }; - pm7250b_gpios: pinctrl@c000 { + pm7250b_gpios: gpio@c000 { compatible = "qcom,pm7250b-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index a7278a9472ed..9738c0dacd58 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -518,7 +518,6 @@ &usb { &usb_dwc3 { maximum-speed = "super-speed"; - dr_mode = "peripheral"; }; &usb_hsphy { diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index b6a93b11cbbd..13dd44dd9ed1 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -1487,6 +1487,11 @@ &config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS>, }; }; + rng: rng@10d2000 { + compatible = "qcom,sa8775p-trng", "qcom,trng"; + reg = <0 0x010d2000 0 0x1000>; + }; + ufs_mem_hc: ufs@1d84000 { compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; reg = <0x0 0x01d84000 0x0 0x3000>; @@ -1910,6 +1915,50 @@ pdc: interrupt-controller@b220000 { interrupt-controller; }; + tsens2: thermal-sensor@c251000 { + compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2"; + reg = <0x0 0x0c251000 0x0 0x1ff>, + <0x0 0x0c224000 0x0 0x8>; + interrupts = , + ; + #qcom,sensors = <13>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + + tsens3: thermal-sensor@c252000 { + compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2"; + reg = <0x0 0x0c252000 0x0 0x1ff>, + <0x0 0x0c225000 0x0 0x8>; + interrupts = , + ; + #qcom,sensors = <13>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + + tsens0: thermal-sensor@c263000 { + compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2"; + reg = <0x0 0x0c263000 0x0 0x1ff>, + <0x0 0x0c222000 0x0 0x8>; + interrupts = , + ; + #qcom,sensors = <12>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal-sensor@c265000 { + compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2"; + reg = <0x0 0x0c265000 0x0 0x1ff>, + <0x0 0x0c223000 0x0 0x8>; + interrupts = , + ; + #qcom,sensors = <12>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + aoss_qmp: power-management@c300000 { compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp"; reg = <0x0 0x0c300000 0x0 0x400>; @@ -1920,6 +1969,11 @@ IPCC_MPROC_SIGNAL_GLINK_QMP #clock-cells = <0>; }; + sram@c3f0000 { + compatible = "qcom,rpmh-stats"; + reg = <0x0 0x0c3f0000 0x0 0x400>; + }; + spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0 0x0c440000 0x0 0x1100>, @@ -2401,6 +2455,1058 @@ ethernet0: ethernet@23040000 { }; }; + thermal-zones { + aoss-0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 0>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-0-0-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 1>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-0-1-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 2>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-0-2-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 3>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-0-3-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 4>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + gpuss-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 5>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + gpuss-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 6>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + gpuss-2-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 7>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + audio-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 8>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + camss-0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 9>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pcie-0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 10>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpuss-0-0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens0 11>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + aoss-1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 0>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-0-0-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 1>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-0-1-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 2>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-0-2-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 3>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-0-3-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 4>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + gpuss-3-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 5>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + gpuss-4-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 6>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + gpuss-5-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 7>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + video-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 8>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + camss-1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 9>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pcie-1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 10>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpuss-0-1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens1 11>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + aoss-2-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 0>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-1-0-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 1>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-1-1-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 2>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-1-2-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 3>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-1-3-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 4>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-0-0-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 5>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-0-1-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 6>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-0-2-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 7>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-1-0-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 8>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-1-1-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 9>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-1-2-0-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 10>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + ddrss-0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 11>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpuss-1-0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens2 12>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + aoss-3-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 0>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-1-0-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 1>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-1-1-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 2>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-1-2-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 3>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpu-1-3-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 4>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-0-0-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 5>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-0-1-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 6>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-0-2-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 7>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-1-0-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 8>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-1-1-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 9>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + nsp-1-2-1-thermal { + polling-delay-passive = <10>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 10>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + ddrss-1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 11>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + cpuss-1-1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&tsens3 12>; + + trips { + trip-point0 { + temperature = <105000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-point1 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + }; + arch_timer: timer { compatible = "arm,armv8-timer"; interrupts = , diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 66f1eb83cca7..04bf85b0399a 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2034,6 +2034,11 @@ uart15: serial@a9c000 { }; }; + rng: rng@10d3000 { + compatible = "qcom,sc7280-trng", "qcom,trng"; + reg = <0 0x010d3000 0 0x1000>; + }; + cnoc2: interconnect@1500000 { reg = <0 0x01500000 0 0x1000>; compatible = "qcom,sc7280-cnoc2"; @@ -3399,6 +3404,32 @@ usb_1_qmpphy: phy@88e8000 { #clock-cells = <1>; #phy-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_dp_qmpphy_out: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_dp_qmpphy_usb_ss_in: endpoint { + }; + }; + + port@2 { + reg = <2>; + + usb_dp_qmpphy_dp_in: endpoint { + }; + }; + }; }; usb_2: usb@8cf8800 { @@ -3793,6 +3824,86 @@ videocc: clock-controller@aaf0000 { #power-domain-cells = <1>; }; + cci0: cci@ac4a000 { + compatible = "qcom,sc7280-cci", "qcom,msm8996-cci"; + reg = <0 0x0ac4a000 0 0x1000>; + interrupts = ; + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_0_CLK>, + <&camcc CAM_CC_CCI_0_CLK_SRC>; + clock-names = "camnoc_axi", + "slow_ahb_src", + "cpas_ahb", + "cci", + "cci_src"; + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-1 = <&cci0_sleep &cci1_sleep>; + pinctrl-names = "default", "sleep"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + cci0_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci0_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + cci1: cci@ac4b000 { + compatible = "qcom,sc7280-cci", "qcom,msm8996-cci"; + reg = <0 0x0ac4b000 0 0x1000>; + interrupts = ; + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_1_CLK>, + <&camcc CAM_CC_CCI_1_CLK_SRC>; + clock-names = "camnoc_axi", + "slow_ahb_src", + "cpas_ahb", + "cci", + "cci_src"; + pinctrl-0 = <&cci2_default &cci3_default>; + pinctrl-1 = <&cci2_sleep &cci3_sleep>; + pinctrl-names = "default", "sleep"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + cci1_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci1_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + camcc: clock-controller@ad00000 { compatible = "qcom,sc7280-camcc"; reg = <0 0x0ad00000 0 0x10000>; @@ -4298,6 +4409,62 @@ tlmm: pinctrl@f100000 { gpio-ranges = <&tlmm 0 0 175>; wakeup-parent = <&pdc>; + cci0_default: cci0-default-state { + pins = "gpio69", "gpio70"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci0_sleep: cci0-sleep-state { + pins = "gpio69", "gpio70"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci1_default: cci1-default-state { + pins = "gpio71", "gpio72"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci1_sleep: cci1-sleep-state { + pins = "gpio71", "gpio72"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci2_default: cci2-default-state { + pins = "gpio73", "gpio74"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci2_sleep: cci2-sleep-state { + pins = "gpio73", "gpio74"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci3_default: cci3-default-state { + pins = "gpio75", "gpio76"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci3_sleep: cci3-sleep-state { + pins = "gpio75", "gpio76"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + dp_hot_plug_det: dp-hot-plug-det-state { pins = "gpio47"; function = "dp_hot"; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 38edaf51aa34..f2055899ae7a 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -82,6 +82,9 @@ switch-lid { leds { compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&cam_indicator_en>; + led-camera-indicator { label = "white:camera-indicator"; function = LED_FUNCTION_INDICATOR; @@ -601,6 +604,7 @@ mdss0_dp3_out: endpoint { }; &mdss0_dp3_phy { + compatible = "qcom,sc8280xp-edp-phy"; vdda-phy-supply = <&vreg_l6b>; vdda-pll-supply = <&vreg_l3b>; @@ -1277,6 +1281,13 @@ hstp-sw-ctrl-pins { }; }; + cam_indicator_en: cam-indicator-en-state { + pins = "gpio28"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + edp_reg_en: edp-reg-en-state { pins = "gpio25"; function = "gpio"; diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index ba2043d67370..6d9843d05cb3 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1532,7 +1532,7 @@ osm_l3: interconnect@17d41000 { }; cpufreq_hw: cpufreq@17d43000 { - compatible = "qcom,cpufreq-hw"; + compatible = "qcom,sdm670-cpufreq-hw", "qcom,cpufreq-hw"; reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>; reg-names = "freq-domain0", "freq-domain1"; diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi index b523b5fff702..e821103d49c0 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi @@ -8,6 +8,7 @@ /dts-v1/; #include +#include #include #include #include @@ -484,6 +485,28 @@ &pmi8998_charger { status = "okay"; }; +&pmi8998_flash { + status = "okay"; + + led-0 { + function = LED_FUNCTION_FLASH; + color = ; + led-sources = <1>; + led-max-microamp = <500000>; + flash-max-microamp = <1500000>; + flash-max-timeout-us = <1280000>; + }; + + led-1 { + function = LED_FUNCTION_FLASH; + color = ; + led-sources = <2>; + led-max-microamp = <500000>; + flash-max-microamp = <1500000>; + flash-max-timeout-us = <1280000>; + }; +}; + &q6afedai { qi2s@22 { reg = <22>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi index 93b1582e807d..617b17b2d7d9 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi @@ -355,6 +355,28 @@ &pmi8998_charger { status = "okay"; }; +&pmi8998_flash { + status = "okay"; + + led-0 { + function = LED_FUNCTION_FLASH; + color = ; + led-sources = <1>; + led-max-microamp = <500000>; + flash-max-microamp = <1500000>; + flash-max-timeout-us = <1280000>; + }; + + led-1 { + function = LED_FUNCTION_FLASH; + color = ; + led-sources = <2>; + led-max-microamp = <500000>; + flash-max-microamp = <1500000>; + flash-max-timeout-us = <1280000>; + }; +}; + &pm8998_resin { linux,code = ; status = "okay"; diff --git a/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts b/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts index b2f1bb1d58e9..0ce4fa8de8b0 100644 --- a/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts +++ b/arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts @@ -187,6 +187,11 @@ &remoteproc_cdsp { status = "okay"; }; +&remoteproc_mss { + firmware-name = "qcom/sm6375/Sony/murray/modem.mbn"; + status = "okay"; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm6125-regulators"; @@ -238,8 +243,8 @@ pm6125_l6: l6 { }; pm6125_l7: l7 { - regulator-min-microvolt = <720000>; - regulator-max-microvolt = <1050000>; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; }; pm6125_l8: l8 { @@ -306,7 +311,7 @@ pm6125_l20: l20 { pm6125_l21: l21 { regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3400000>; + regulator-max-microvolt = <3312000>; }; pm6125_l22: l22 { @@ -317,7 +322,7 @@ pm6125_l22: l22 { pm6125_l23: l23 { regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3400000>; + regulator-max-microvolt = <3312000>; }; pm6125_l24: l24 { @@ -340,8 +345,8 @@ pmr735a_l1: l1 { }; pmr735a_l2: l2 { - regulator-min-microvolt = <352000>; - regulator-max-microvolt = <796000>; + regulator-min-microvolt = <640000>; + regulator-max-microvolt = <640000>; }; pmr735a_l3: l3 { @@ -425,6 +430,18 @@ &usb_1_dwc3 { }; &usb_1_hsphy { + vdda-pll-supply = <&pm6125_l7>; + vdda18-supply = <&pm6125_l10>; + vdda33-supply = <&pmr735a_l7>; + status = "okay"; +}; + +&wifi { + vdd-0.8-cx-mx-supply = <&pmr735a_l2>; + vdd-1.8-xo-supply = <&pm6125_l16>; + vdd-1.3-rfa-supply = <&pm6125_l2>; + vdd-3.3-ch0-supply = <&pm6125_l23>; + vdd-3.3-ch1-supply = <&pm6125_l21>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi index e7ff55443da7..2fba0e7ea4e6 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -896,6 +896,36 @@ qup_spi0_default: qup-spi0-default-state { drive-strength = <6>; bias-disable; }; + + qup_uart1_default: qup-uart1-default-state { + cts-pins { + pins = "gpio61"; + function = "qup01"; + drive-strength = <2>; + bias-pull-down; + }; + + rts-pins { + pins = "gpio62"; + function = "qup01"; + drive-strength = <2>; + bias-disable; + }; + + tx-pins { + pins = "gpio63"; + function = "qup01"; + drive-strength = <2>; + bias-disable; + }; + + rx-pins { + pins = "gpio64"; + function = "qup01"; + drive-strength = <2>; + bias-pull-up; + }; + }; }; gcc: clock-controller@1400000 { @@ -1111,6 +1141,19 @@ spi1: spi@4a84000 { status = "disabled"; }; + uart1: serial@4a84000 { + compatible = "qcom,geni-uart"; + reg = <0x0 0x04a84000 0x0 0x4000>; + interrupts = ; + clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; + clock-names = "se"; + power-domains = <&rpmpd SM6375_VDDCX>; + operating-points-v2 = <&qup_opp_table>; + pinctrl-0 = <&qup_uart1_default>; + pinctrl-names = "default"; + status = "disabled"; + }; + i2c2: i2c@4a88000 { compatible = "qcom,geni-i2c"; reg = <0x0 0x04a88000 0x0 0x4000>; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 1783fa78bdbc..bde9c1093384 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -1739,6 +1739,11 @@ spi14: spi@a98000 { }; }; + rng: rng@10c3000 { + compatible = "qcom,sm8450-trng", "qcom,trng"; + reg = <0 0x010c3000 0 0x1000>; + }; + pcie0: pci@1c00000 { compatible = "qcom,pcie-sm8450-pcie0"; reg = <0 0x01c00000 0 0x3000>, diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 7b9ddde0b2c9..7bafb3d88d69 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1677,6 +1677,11 @@ mmss_noc: interconnect@1780000 { qcom,bcm-voters = <&apps_bcm_voter>; }; + rng: rng@10c3000 { + compatible = "qcom,sm8550-trng", "qcom,trng"; + reg = <0 0x010c3000 0 0x1000>; + }; + pcie0: pci@1c00000 { device_type = "pci"; compatible = "qcom,pcie-sm8550";