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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'iio-for-6.6a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next
Jonathan writes:
1st set of IIO new device support, features and cleanup for 6.6
New device support
* adi,ad8366
- Add support for the HMC792 digital attenuator (mostly chip specific data)
* alwinner,sun20i-gpadc
- New driver for the integrated ADC on a number of allwinner SoCs
including dt-binding documentation.
* microchip,mcp4728
- New driver for this quad channel DAC. Includes dt-bindings.
* miramems, da280
- Add ID for DA217 accelerometer which is compatible with the da280.
* murata,irs-d200
- New driver for this passive infrared sensor typically used for human
detection. Includes bindings and a few pieces of new ABI to
cover a case of needing to count a number of repeats of an event
before reporting it.
* rohm,bu27008
- Add initial support for the BU27010 RGB + flickering sensor to this
driver. Substantial refactoring was needed to enable this.
Features
* adi,admv8818
- Add mode that bypasses the input and output filters.
* amlogic,meson
- Support control of the MUX on channel 7, exposed as multiple channels.
- Support channel labels.
* sensirion,scd4x
- Add pressure compensation. Controlled via an 'output' pressure channel.
* ti,lmp92040
- Add IIO buffered supported (read via chrdev).
* vishay,vcnl4000
- Add proximity interrupt support for vcnl4200.
- Add proximity integration time control for vcnl4200.
- Add illuminance integration time control for vcnl4040 and vcnl4200.
- Add calibration bias, proximity and illuminance event period, and
oversampling ratio control for vcnl4040 and vncl4200.
Cleanup and minor fixes
* core
- Tidy up handling of set_trigger_state() callback return values
to consistently assume no positive return values.
- Use min() rather than min_t() in a case where types were clearly
the same.
- Drop some else statements that follow continue with a loop or
a returns.
- White space and comment format cleanup.
- Use sysfs_match_string() helper to improve readability.
- Use krealloc_array() to make it explicit a krealloc is for an array
of structures, not just one.
* tools
- Tidy up potential overflow in array index.
* tree wide
- Fix up includes for DT related headers.
- Drop some error prints in places where as similar error message
is printed by the function being called.
- Tidy up handling of return value from platform_get_irq() to no longer
take into account 0 as a value that might be returned. Similar for
fwnode_irq_get().
* adi,ad7192
- Add missing error check and improved debug logging.
- Use sysfs_emit_at() rather than open coded variant.
* adi,adis16475
- Drop unused scan element enum entries.
- Specify that a few more devices support burst32 mode.
* adi,admv1013
- Enable all required regulators and document as required in the
dt-binding.
* adi,admv1014
- Make all regulators required in the dt-binding as the device needs
them all enabled.
* adi,adxl313
- Fix wrong enum values being used in the i2c_device_id table.
- Use i2c_get_match_data() to reduce open coded handling of the
various id tables.
* allwinner,gpadc
- Make the kconfig text more specific to make space for separate drivers
for other Allwinner devices.
* amlogic,meson
- Drop unused timestamp channels as no buffer support.
- Various minor reorganizations to enable addition of support channel 7
MUX.
- Initialize some default values to account for potential previous user
since reboot.
* qcom,spmi-adc5
- Add ADC5_GPIO2_100K_PU support to driver to line up with bindings.
* qcom,spmi-adc7
- Use predefined channel ID definitions rather than values.
* invensense, common
- Factor out the timestamp handling to a module used by both mpu6050 and
icm42600.
* invensense,mpu6050
- Read as many FIFO elements as possible in one bus access.
* men,s188
- Drop redundant initialization of driver owner field.
* microchip,mcp4018 and mcp4531
- Use i2c_get_match_data() instead of open coding. Includes making the
data format the same for the i2c_device_id and firmware match
tables.
* semtech,sx9310
- dt-bindings: Add reference to IIO schema to provide the label property.
* semtech,sx9324
- dt-bindings: Add reference to IIO schema to provide the label property.
* st,stm32-adc
- Use devm_platform_get_and_ioremap_resource() instead of open coded
version.
* st,stm-lptimer-trigger
- Drop setting platform drvdata as it wasn't then used.
* ti,ads1015
- Fix wrong dt binding description of ti,datarate for some devices.
* vishay,vcnl4200
- Move to switch statements for channel type checking to make later
additions simpler.
* tag 'iio-for-6.6a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (73 commits)
Documentation: ABI: testing: admv8818: add bypass
drivers: iio: filter: admv8818: add bypass mode
iio: light: bd27008: Support BD27010 RGB
iio: light: bu27008: add chip info
dt-bindings: iio: ROHM BU27010 RGBC + flickering sensor
iio: add MCP4728 I2C DAC driver
dt-bindings: iio: dac: add mcp4728.yaml
drivers: iio: admv1013: add vcc regulators
dt-bindings: iio: admv1013: add vcc regulators
iio: trigger: stm32-lptimer-trigger: remove unneeded platform_set_drvdata()
iio: adc: men_z188_adc: Remove redundant initialization owner in men_z188_driver
dt-bindings: iio: admv1014: make all regs required
iio: cdc: ad7150: relax return value check for IRQ get
iio: mb1232: relax return value check for IRQ get
iio: adc: fix the return value handle for platform_get_irq()
tools: iio: iio_generic_buffer: Fix some integer type and calculation
iio: potentiometer: mcp4531: Use i2c_get_match_data()
iio: potentiometer: mcp4018: Use i2c_get_match_data()
iio: core: Fix issues and style of the comments
iio: core: Switch to krealloc_array()
...
This commit is contained in:
Greg Kroah-Hartman
@@ -6,58 +6,60 @@
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#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
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#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
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/* ADC channels for PM8350_ADC for PMIC7 */
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#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | 0x0)
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#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | 0x01)
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#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | 0x02)
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#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | 0x03)
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#include <dt-bindings/iio/qcom,spmi-vadc.h>
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#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | 0x04)
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#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | 0x05)
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#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | 0x06)
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#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | 0x07)
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#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | 0x08)
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#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | 0x0a)
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#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | 0x0b)
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#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | 0x0c)
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#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | 0x0d)
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/* ADC channels for PM8350_ADC for PMIC7 */
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#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | ADC7_REF_GND)
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#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | ADC7_1P25VREF)
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#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | ADC7_VREF_VADC)
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#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | ADC7_DIE_TEMP)
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#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | ADC7_AMUX_THM1)
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#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | ADC7_AMUX_THM2)
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#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | ADC7_AMUX_THM3)
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#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | ADC7_AMUX_THM4)
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#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | ADC7_AMUX_THM5)
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#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | ADC7_GPIO1)
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#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | ADC7_GPIO2)
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#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | ADC7_GPIO3)
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#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | ADC7_GPIO4)
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/* 30k pull-up1 */
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#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | 0x24)
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#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | 0x25)
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#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | 0x26)
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#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | 0x27)
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#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | 0x28)
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#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | 0x2a)
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#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | 0x2b)
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#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | 0x2c)
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#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | 0x2d)
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#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_30K_PU)
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#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_30K_PU)
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#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_30K_PU)
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#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_30K_PU)
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#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_30K_PU)
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#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | ADC7_GPIO1_30K_PU)
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#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | ADC7_GPIO2_30K_PU)
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#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | ADC7_GPIO3_30K_PU)
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#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | ADC7_GPIO4_30K_PU)
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/* 100k pull-up2 */
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#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | 0x44)
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#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | 0x45)
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#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | 0x46)
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#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | 0x47)
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#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | 0x48)
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#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | 0x4a)
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#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | 0x4b)
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#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | 0x4c)
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#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | 0x4d)
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#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_100K_PU)
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#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_100K_PU)
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#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_100K_PU)
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#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_100K_PU)
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#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_100K_PU)
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#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | ADC7_GPIO1_100K_PU)
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#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | ADC7_GPIO2_100K_PU)
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#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | ADC7_GPIO3_100K_PU)
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#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | ADC7_GPIO4_100K_PU)
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/* 400k pull-up3 */
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#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | 0x64)
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#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | 0x65)
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#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | 0x66)
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#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | 0x67)
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#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | 0x68)
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#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | 0x6a)
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#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | 0x6b)
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#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | 0x6c)
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#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | 0x6d)
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#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_400K_PU)
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#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_400K_PU)
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#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_400K_PU)
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#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_400K_PU)
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#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_400K_PU)
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#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | ADC7_GPIO1_400K_PU)
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#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | ADC7_GPIO2_400K_PU)
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#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | ADC7_GPIO3_400K_PU)
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#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | ADC7_GPIO4_400K_PU)
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/* 1/3 Divider */
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#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | 0x8d)
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#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | ADC7_GPIO4_DIV3)
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#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | 0x8e)
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#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | ADC7_VPH_PWR)
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#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */
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@@ -10,79 +10,81 @@
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#define PM8350B_SID 3
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#endif
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#include <dt-bindings/iio/qcom,spmi-vadc.h>
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/* ADC channels for PM8350B_ADC for PMIC7 */
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#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | 0x0)
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#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | 0x01)
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#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | 0x02)
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#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | 0x03)
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#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | ADC7_REF_GND)
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#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | ADC7_1P25VREF)
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#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | ADC7_VREF_VADC)
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#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | ADC7_DIE_TEMP)
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#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | 0x04)
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#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | 0x05)
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#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | 0x06)
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#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | 0x07)
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#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | 0x08)
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#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | 0x09)
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#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | 0x0a)
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#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | 0x0b)
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#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | 0x0c)
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#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | 0x0d)
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#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | ADC7_AMUX_THM1)
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#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | ADC7_AMUX_THM2)
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#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | ADC7_AMUX_THM3)
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#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | ADC7_AMUX_THM4)
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#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | ADC7_AMUX_THM5)
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#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | ADC7_AMUX_THM6)
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#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | ADC7_GPIO1)
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#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | ADC7_GPIO2)
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#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | ADC7_GPIO3)
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#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | ADC7_GPIO4)
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#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | 0x10)
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#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | 0x11)
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#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | 0x12)
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#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | 0x13)
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#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | 0x15)
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#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | 0x17)
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#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | ADC7_CHG_TEMP)
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#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | ADC7_USB_IN_V_16)
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#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | ADC7_VDC_16)
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#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | ADC7_CC1_ID)
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#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | ADC7_VREF_BAT_THERM)
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#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | ADC7_IIN_FB)
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/* 30k pull-up1 */
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#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | 0x24)
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#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | 0x25)
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#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | 0x26)
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#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | 0x27)
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#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | 0x28)
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#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | 0x29)
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#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | 0x2a)
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#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | 0x2b)
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#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | 0x2c)
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#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | 0x2d)
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#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | 0x33)
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#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_30K_PU)
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#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_30K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_30K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_30K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_30K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_30K_PU)
|
||||
#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | ADC7_GPIO1_30K_PU)
|
||||
#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | ADC7_GPIO2_30K_PU)
|
||||
#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | ADC7_GPIO3_30K_PU)
|
||||
#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | ADC7_GPIO4_30K_PU)
|
||||
#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_30K_PU)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | 0x44)
|
||||
#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | 0x45)
|
||||
#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | 0x46)
|
||||
#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | 0x47)
|
||||
#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | 0x48)
|
||||
#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | 0x49)
|
||||
#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | 0x4a)
|
||||
#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | 0x4b)
|
||||
#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | 0x4c)
|
||||
#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | 0x4d)
|
||||
#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | 0x53)
|
||||
#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_100K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_100K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_100K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_100K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_100K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_100K_PU)
|
||||
#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | ADC7_GPIO1_100K_PU)
|
||||
#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | ADC7_GPIO2_100K_PU)
|
||||
#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | ADC7_GPIO3_100K_PU)
|
||||
#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | ADC7_GPIO4_100K_PU)
|
||||
#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_100K_PU)
|
||||
|
||||
/* 400k pull-up3 */
|
||||
#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | 0x64)
|
||||
#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | 0x65)
|
||||
#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | 0x66)
|
||||
#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | 0x67)
|
||||
#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | 0x68)
|
||||
#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | 0x69)
|
||||
#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | 0x6a)
|
||||
#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | 0x6b)
|
||||
#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | 0x6c)
|
||||
#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | 0x6d)
|
||||
#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | 0x73)
|
||||
#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_400K_PU)
|
||||
#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | ADC7_GPIO1_400K_PU)
|
||||
#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | ADC7_GPIO2_400K_PU)
|
||||
#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | ADC7_GPIO3_400K_PU)
|
||||
#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | ADC7_GPIO4_400K_PU)
|
||||
#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_400K_PU)
|
||||
|
||||
/* 1/3 Divider */
|
||||
#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | 0x8a)
|
||||
#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | 0x8b)
|
||||
#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | 0x8c)
|
||||
#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | 0x8d)
|
||||
#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | ADC7_GPIO1_DIV3)
|
||||
#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | ADC7_GPIO2_DIV3)
|
||||
#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | ADC7_GPIO3_DIV3)
|
||||
#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | ADC7_GPIO4_DIV3)
|
||||
|
||||
#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | 0x8e)
|
||||
#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | 0x8f)
|
||||
#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | ADC7_VPH_PWR)
|
||||
#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | ADC7_VBAT_SNS)
|
||||
|
||||
#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | 0x94)
|
||||
#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | 0x96)
|
||||
#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | ADC7_SBU)
|
||||
#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | ADC7_VBAT_2S_MID)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H */
|
||||
|
||||
@@ -10,37 +10,39 @@
|
||||
#define PMK8350_SID 0
|
||||
#endif
|
||||
|
||||
/* ADC channels for PMK8350_ADC for PMIC7 */
|
||||
#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | 0x0)
|
||||
#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | 0x01)
|
||||
#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | 0x02)
|
||||
#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | 0x03)
|
||||
#include <dt-bindings/iio/qcom,spmi-vadc.h>
|
||||
|
||||
#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | 0x04)
|
||||
#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | 0x05)
|
||||
#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | 0x06)
|
||||
#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | 0x07)
|
||||
#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | 0x08)
|
||||
/* ADC channels for PMK8350_ADC for PMIC7 */
|
||||
#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | ADC7_REF_GND)
|
||||
#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | ADC7_1P25VREF)
|
||||
#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | ADC7_VREF_VADC)
|
||||
#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | ADC7_DIE_TEMP)
|
||||
|
||||
#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | ADC7_AMUX_THM1)
|
||||
#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | ADC7_AMUX_THM2)
|
||||
#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | ADC7_AMUX_THM3)
|
||||
#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | ADC7_AMUX_THM4)
|
||||
#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | ADC7_AMUX_THM5)
|
||||
|
||||
/* 30k pull-up1 */
|
||||
#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | 0x24)
|
||||
#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | 0x25)
|
||||
#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | 0x26)
|
||||
#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | 0x27)
|
||||
#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | 0x28)
|
||||
#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_30K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_30K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_30K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_30K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_30K_PU)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | 0x44)
|
||||
#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | 0x45)
|
||||
#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | 0x46)
|
||||
#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | 0x47)
|
||||
#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | 0x48)
|
||||
#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_100K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_100K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_100K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_100K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_100K_PU)
|
||||
|
||||
/* 400k pull-up3 */
|
||||
#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | 0x64)
|
||||
#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | 0x65)
|
||||
#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | 0x66)
|
||||
#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | 0x67)
|
||||
#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | 0x68)
|
||||
#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_400K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_400K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_400K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_400K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_400K_PU)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */
|
||||
|
||||
@@ -10,19 +10,21 @@
|
||||
#define PMR735A_SID 4
|
||||
#endif
|
||||
|
||||
/* ADC channels for PMR735A_ADC for PMIC7 */
|
||||
#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | 0x0)
|
||||
#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | 0x01)
|
||||
#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | 0x02)
|
||||
#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | 0x03)
|
||||
#include <dt-bindings/iio/qcom,spmi-vadc.h>
|
||||
|
||||
#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | 0x0a)
|
||||
#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | 0x0b)
|
||||
#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | 0x0c)
|
||||
/* ADC channels for PMR735A_ADC for PMIC7 */
|
||||
#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | ADC7_REF_GND)
|
||||
#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | ADC7_1P25VREF)
|
||||
#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | ADC7_VREF_VADC)
|
||||
#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | ADC7_DIE_TEMP)
|
||||
|
||||
#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | ADC7_GPIO1)
|
||||
#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | ADC7_GPIO2)
|
||||
#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | ADC7_GPIO3)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | 0x4a)
|
||||
#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | 0x4b)
|
||||
#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | 0x4c)
|
||||
#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | ADC7_GPIO1_100K_PU)
|
||||
#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | ADC7_GPIO2_100K_PU)
|
||||
#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | ADC7_GPIO3_100K_PU)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H */
|
||||
|
||||
@@ -10,19 +10,21 @@
|
||||
#define PMR735B_SID 5
|
||||
#endif
|
||||
|
||||
/* ADC channels for PMR735B_ADC for PMIC7 */
|
||||
#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | 0x0)
|
||||
#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | 0x01)
|
||||
#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | 0x02)
|
||||
#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | 0x03)
|
||||
#include <dt-bindings/iio/qcom,spmi-vadc.h>
|
||||
|
||||
#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | 0x0a)
|
||||
#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | 0x0b)
|
||||
#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | 0x0c)
|
||||
/* ADC channels for PMR735B_ADC for PMIC7 */
|
||||
#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | ADC7_REF_GND)
|
||||
#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | ADC7_1P25VREF)
|
||||
#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | ADC7_VREF_VADC)
|
||||
#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | ADC7_DIE_TEMP)
|
||||
|
||||
#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | ADC7_GPIO1)
|
||||
#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | ADC7_GPIO2)
|
||||
#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | ADC7_GPIO3)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | 0x4a)
|
||||
#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | 0x4b)
|
||||
#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | 0x4c)
|
||||
#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | ADC7_GPIO1_100K_PU)
|
||||
#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | ADC7_GPIO2_100K_PU)
|
||||
#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | ADC7_GPIO3_100K_PU)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H */
|
||||
|
||||
95
include/linux/iio/common/inv_sensors_timestamp.h
Normal file
95
include/linux/iio/common/inv_sensors_timestamp.h
Normal file
@@ -0,0 +1,95 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
/*
|
||||
* Copyright (C) 2020 Invensense, Inc.
|
||||
*/
|
||||
|
||||
#ifndef INV_SENSORS_TIMESTAMP_H_
|
||||
#define INV_SENSORS_TIMESTAMP_H_
|
||||
|
||||
/**
|
||||
* struct inv_sensors_timestamp_chip - chip internal properties
|
||||
* @clock_period: internal clock period in ns
|
||||
* @jitter: acceptable jitter in per-mille
|
||||
* @init_period: chip initial period at reset in ns
|
||||
*/
|
||||
struct inv_sensors_timestamp_chip {
|
||||
uint32_t clock_period;
|
||||
uint32_t jitter;
|
||||
uint32_t init_period;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct inv_sensors_timestamp_interval - timestamps interval
|
||||
* @lo: interval lower bound
|
||||
* @up: interval upper bound
|
||||
*/
|
||||
struct inv_sensors_timestamp_interval {
|
||||
int64_t lo;
|
||||
int64_t up;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct inv_sensors_timestamp_acc - accumulator for computing an estimation
|
||||
* @val: current estimation of the value, the mean of all values
|
||||
* @idx: current index of the next free place in values table
|
||||
* @values: table of all measured values, use for computing the mean
|
||||
*/
|
||||
struct inv_sensors_timestamp_acc {
|
||||
uint32_t val;
|
||||
size_t idx;
|
||||
uint32_t values[32];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct inv_sensors_timestamp - timestamp management states
|
||||
* @chip: chip internal characteristics
|
||||
* @min_period: minimal acceptable clock period
|
||||
* @max_period: maximal acceptable clock period
|
||||
* @it: interrupts interval timestamps
|
||||
* @timestamp: store last timestamp for computing next data timestamp
|
||||
* @mult: current internal period multiplier
|
||||
* @new_mult: new set internal period multiplier (not yet effective)
|
||||
* @period: measured current period of the sensor
|
||||
* @chip_period: accumulator for computing internal chip period
|
||||
*/
|
||||
struct inv_sensors_timestamp {
|
||||
struct inv_sensors_timestamp_chip chip;
|
||||
uint32_t min_period;
|
||||
uint32_t max_period;
|
||||
struct inv_sensors_timestamp_interval it;
|
||||
int64_t timestamp;
|
||||
uint32_t mult;
|
||||
uint32_t new_mult;
|
||||
uint32_t period;
|
||||
struct inv_sensors_timestamp_acc chip_period;
|
||||
};
|
||||
|
||||
void inv_sensors_timestamp_init(struct inv_sensors_timestamp *ts,
|
||||
const struct inv_sensors_timestamp_chip *chip);
|
||||
|
||||
int inv_sensors_timestamp_update_odr(struct inv_sensors_timestamp *ts,
|
||||
uint32_t period, bool fifo);
|
||||
|
||||
void inv_sensors_timestamp_interrupt(struct inv_sensors_timestamp *ts,
|
||||
uint32_t fifo_period, size_t fifo_nb,
|
||||
size_t sensor_nb, int64_t timestamp);
|
||||
|
||||
static inline int64_t inv_sensors_timestamp_pop(struct inv_sensors_timestamp *ts)
|
||||
{
|
||||
ts->timestamp += ts->period;
|
||||
return ts->timestamp;
|
||||
}
|
||||
|
||||
void inv_sensors_timestamp_apply_odr(struct inv_sensors_timestamp *ts,
|
||||
uint32_t fifo_period, size_t fifo_nb,
|
||||
unsigned int fifo_no);
|
||||
|
||||
static inline void inv_sensors_timestamp_reset(struct inv_sensors_timestamp *ts)
|
||||
{
|
||||
const struct inv_sensors_timestamp_interval interval_init = {0LL, 0LL};
|
||||
|
||||
ts->it = interval_init;
|
||||
ts->timestamp = 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -19,6 +19,8 @@ enum iio_event_info {
|
||||
IIO_EV_INFO_TIMEOUT,
|
||||
IIO_EV_INFO_RESET_TIMEOUT,
|
||||
IIO_EV_INFO_TAP2_MIN_DELAY,
|
||||
IIO_EV_INFO_RUNNING_PERIOD,
|
||||
IIO_EV_INFO_RUNNING_COUNT,
|
||||
};
|
||||
|
||||
#define IIO_VAL_INT 1
|
||||
|
||||
Reference in New Issue
Block a user