Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (137 commits)
  ARM: bcmring: convert to use sp804 clockevents
  ARM: bcmring: convert to sp804 clocksource
  ARM: 6912/1: bcmring: Add clkdev table in init_early
  clockevents: ARM sp804: obtain sp804 timer rate via clks
  clockevents: ARM sp804: allow clockevent name to be specified
  clocksource: ARM sp804: obtain sp804 timer rate via clks
  clocksource: ARM sp804: allow clocksource name to be specified
  clocksource: convert OMAP1 to 32-bit down counting clocksource
  clocksource: convert MXS timrotv2 to 32-bit down counting clocksource
  clocksource: convert SPEAr platforms 16-bit up counting clocksource
  clocksource: convert Integrator/AP 16-bit down counting clocksource
  clocksource: convert W90x900 24-bit down counting clocksource
  clocksource: convert ARM 32-bit down counting clocksources
  clocksource: convert ARM 32-bit up counting clocksources
  clocksource: add common mmio clocksource
  ARM: update sa1100 to reflect PXA updates
  ARM: omap1: convert to using readl/writel instead of volatile struct
  ARM: omap1: delete useless interrupt handler
  ARM: s5p: consolidate selection of timer register
  ARM: 6939/1: fix missing 'cpu_relax()' declaration
  ...
This commit is contained in:
Linus Torvalds
2011-05-23 15:15:27 -07:00
480 changed files with 5900 additions and 22549 deletions

View File

@@ -1,2 +1,5 @@
config CLKSRC_I8253
bool
config CLKSRC_MMIO
bool

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@@ -7,3 +7,4 @@ obj-$(CONFIG_SH_TIMER_CMT) += sh_cmt.o
obj-$(CONFIG_SH_TIMER_MTU2) += sh_mtu2.o
obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o
obj-$(CONFIG_CLKSRC_I8253) += i8253.o
obj-$(CONFIG_CLKSRC_MMIO) += mmio.o

View File

@@ -0,0 +1,73 @@
/*
* Generic MMIO clocksource support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/clocksource.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
struct clocksource_mmio {
void __iomem *reg;
struct clocksource clksrc;
};
static inline struct clocksource_mmio *to_mmio_clksrc(struct clocksource *c)
{
return container_of(c, struct clocksource_mmio, clksrc);
}
cycle_t clocksource_mmio_readl_up(struct clocksource *c)
{
return readl_relaxed(to_mmio_clksrc(c)->reg);
}
cycle_t clocksource_mmio_readl_down(struct clocksource *c)
{
return ~readl_relaxed(to_mmio_clksrc(c)->reg);
}
cycle_t clocksource_mmio_readw_up(struct clocksource *c)
{
return readw_relaxed(to_mmio_clksrc(c)->reg);
}
cycle_t clocksource_mmio_readw_down(struct clocksource *c)
{
return ~(unsigned)readw_relaxed(to_mmio_clksrc(c)->reg);
}
/**
* clocksource_mmio_init - Initialize a simple mmio based clocksource
* @base: Virtual address of the clock readout register
* @name: Name of the clocksource
* @hz: Frequency of the clocksource in Hz
* @rating: Rating of the clocksource
* @bits: Number of valid bits
* @read: One of clocksource_mmio_read*() above
*/
int __init clocksource_mmio_init(void __iomem *base, const char *name,
unsigned long hz, int rating, unsigned bits,
cycle_t (*read)(struct clocksource *))
{
struct clocksource_mmio *cs;
if (bits > 32 || bits < 16)
return -EINVAL;
cs = kzalloc(sizeof(struct clocksource_mmio), GFP_KERNEL);
if (!cs)
return -ENOMEM;
cs->reg = base;
cs->clksrc.name = name;
cs->clksrc.rating = rating;
cs->clksrc.read = read;
cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
return clocksource_register_hz(&cs->clksrc, hz);
}

View File

@@ -77,7 +77,7 @@ static struct variant_data variant_arm_extended_fifo = {
static struct variant_data variant_u300 = {
.fifosize = 16 * 4,
.fifohalfsize = 8 * 4,
.clkreg_enable = 1 << 13, /* HWFCEN */
.clkreg_enable = MCI_ST_U300_HWFCEN,
.datalength_bits = 16,
.sdio = true,
};
@@ -86,7 +86,7 @@ static struct variant_data variant_ux500 = {
.fifosize = 30 * 4,
.fifohalfsize = 8 * 4,
.clkreg = MCI_CLK_ENABLE,
.clkreg_enable = 1 << 14, /* HWFCEN */
.clkreg_enable = MCI_ST_UX500_HWFCEN,
.datalength_bits = 24,
.sdio = true,
.st_clkdiv = true,
@@ -103,6 +103,8 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
if (desired) {
if (desired >= host->mclk) {
clk = MCI_CLK_BYPASS;
if (variant->st_clkdiv)
clk |= MCI_ST_UX500_NEG_EDGE;
host->cclk = host->mclk;
} else if (variant->st_clkdiv) {
/*

View File

@@ -11,23 +11,33 @@
#define MCI_PWR_OFF 0x00
#define MCI_PWR_UP 0x02
#define MCI_PWR_ON 0x03
#define MCI_DATA2DIREN (1 << 2)
#define MCI_CMDDIREN (1 << 3)
#define MCI_DATA0DIREN (1 << 4)
#define MCI_DATA31DIREN (1 << 5)
#define MCI_OD (1 << 6)
#define MCI_ROD (1 << 7)
/* The ST Micro version does not have ROD */
#define MCI_FBCLKEN (1 << 7)
#define MCI_DATA74DIREN (1 << 8)
/*
* The ST Micro version does not have ROD and reuse the voltage registers
* for direction settings
*/
#define MCI_ST_DATA2DIREN (1 << 2)
#define MCI_ST_CMDDIREN (1 << 3)
#define MCI_ST_DATA0DIREN (1 << 4)
#define MCI_ST_DATA31DIREN (1 << 5)
#define MCI_ST_FBCLKEN (1 << 7)
#define MCI_ST_DATA74DIREN (1 << 8)
#define MMCICLOCK 0x004
#define MCI_CLK_ENABLE (1 << 8)
#define MCI_CLK_PWRSAVE (1 << 9)
#define MCI_CLK_BYPASS (1 << 10)
#define MCI_4BIT_BUS (1 << 11)
/* 8bit wide buses supported in ST Micro versions */
/*
* 8bit wide buses, hardware flow contronl, negative edges and clock inversion
* supported in ST Micro U300 and Ux500 versions
*/
#define MCI_ST_8BIT_BUS (1 << 12)
#define MCI_ST_U300_HWFCEN (1 << 13)
#define MCI_ST_UX500_NEG_EDGE (1 << 13)
#define MCI_ST_UX500_HWFCEN (1 << 14)
#define MCI_ST_UX500_CLK_INV (1 << 15)
#define MMCIARGUMENT 0x008
#define MMCICOMMAND 0x00c
@@ -88,8 +98,9 @@
#define MCI_RXFIFOEMPTY (1 << 19)
#define MCI_TXDATAAVLBL (1 << 20)
#define MCI_RXDATAAVLBL (1 << 21)
#define MCI_SDIOIT (1 << 22)
#define MCI_CEATAEND (1 << 23)
/* Extended status bits for the ST Micro variants */
#define MCI_ST_SDIOIT (1 << 22)
#define MCI_ST_CEATAEND (1 << 23)
#define MMCICLEAR 0x038
#define MCI_CMDCRCFAILCLR (1 << 0)
@@ -102,8 +113,9 @@
#define MCI_CMDSENTCLR (1 << 7)
#define MCI_DATAENDCLR (1 << 8)
#define MCI_DATABLOCKENDCLR (1 << 10)
#define MCI_SDIOITC (1 << 22)
#define MCI_CEATAENDC (1 << 23)
/* Extended status bits for the ST Micro variants */
#define MCI_ST_SDIOITC (1 << 22)
#define MCI_ST_CEATAENDC (1 << 23)
#define MMCIMASK0 0x03c
#define MCI_CMDCRCFAILMASK (1 << 0)
@@ -127,8 +139,9 @@
#define MCI_RXFIFOEMPTYMASK (1 << 19)
#define MCI_TXDATAAVLBLMASK (1 << 20)
#define MCI_RXDATAAVLBLMASK (1 << 21)
#define MCI_SDIOITMASK (1 << 22)
#define MCI_CEATAENDMASK (1 << 23)
/* Extended status bits for the ST Micro variants */
#define MCI_ST_SDIOITMASK (1 << 22)
#define MCI_ST_CEATAENDMASK (1 << 23)
#define MMCIMASK1 0x040
#define MMCIFIFOCNT 0x048

View File

@@ -148,8 +148,7 @@ config MTD_AFS_PARTS
You will still need the parsing functions to be called by the driver
for your particular device. It won't happen automatically. The
'armflash' map driver (CONFIG_MTD_ARM_INTEGRATOR) does this, for
example.
'physmap' map driver (CONFIG_MTD_PHYSMAP) does this, for example.
config MTD_OF_PARTS
def_bool y

View File

@@ -8,7 +8,6 @@ endif
# Chip mappings
obj-$(CONFIG_MTD_CDB89712) += cdb89712.o
obj-$(CONFIG_MTD_ARM_INTEGRATOR)+= integrator-flash.o
obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
obj-$(CONFIG_MTD_DC21285) += dc21285.o
obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o

View File

@@ -1,309 +0,0 @@
/*======================================================================
drivers/mtd/maps/integrator-flash.c: ARM Integrator flash map driver
Copyright (C) 2000 ARM Limited
Copyright (C) 2003 Deep Blue Solutions Ltd.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
This is access code for flashes using ARM's flash partitioning
standards.
======================================================================*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/concat.h>
#include <asm/mach/flash.h>
#include <mach/hardware.h>
#include <asm/system.h>
struct armflash_subdev_info {
char *name;
struct mtd_info *mtd;
struct map_info map;
struct flash_platform_data *plat;
};
struct armflash_info {
struct resource *res;
struct mtd_partition *parts;
struct mtd_info *mtd;
int nr_subdev;
struct armflash_subdev_info subdev[0];
};
static void armflash_set_vpp(struct map_info *map, int on)
{
struct armflash_subdev_info *info =
container_of(map, struct armflash_subdev_info, map);
if (info->plat && info->plat->set_vpp)
info->plat->set_vpp(on);
}
static const char *probes[] = { "cmdlinepart", "RedBoot", "afs", NULL };
static int armflash_subdev_probe(struct armflash_subdev_info *subdev,
struct resource *res)
{
struct flash_platform_data *plat = subdev->plat;
resource_size_t size = res->end - res->start + 1;
void __iomem *base;
int err = 0;
if (!request_mem_region(res->start, size, subdev->name)) {
err = -EBUSY;
goto out;
}
base = ioremap(res->start, size);
if (!base) {
err = -ENOMEM;
goto no_mem;
}
/*
* look for CFI based flash parts fitted to this board
*/
subdev->map.size = size;
subdev->map.bankwidth = plat->width;
subdev->map.phys = res->start;
subdev->map.virt = base;
subdev->map.name = subdev->name;
subdev->map.set_vpp = armflash_set_vpp;
simple_map_init(&subdev->map);
/*
* Also, the CFI layer automatically works out what size
* of chips we have, and does the necessary identification
* for us automatically.
*/
subdev->mtd = do_map_probe(plat->map_name, &subdev->map);
if (!subdev->mtd) {
err = -ENXIO;
goto no_device;
}
subdev->mtd->owner = THIS_MODULE;
/* Successful? */
if (err == 0)
return err;
if (subdev->mtd)
map_destroy(subdev->mtd);
no_device:
iounmap(base);
no_mem:
release_mem_region(res->start, size);
out:
return err;
}
static void armflash_subdev_remove(struct armflash_subdev_info *subdev)
{
if (subdev->mtd)
map_destroy(subdev->mtd);
if (subdev->map.virt)
iounmap(subdev->map.virt);
kfree(subdev->name);
subdev->name = NULL;
release_mem_region(subdev->map.phys, subdev->map.size);
}
static int armflash_probe(struct platform_device *dev)
{
struct flash_platform_data *plat = dev->dev.platform_data;
unsigned int size;
struct armflash_info *info;
int i, nr, err;
/* Count the number of devices */
for (nr = 0; ; nr++)
if (!platform_get_resource(dev, IORESOURCE_MEM, nr))
break;
if (nr == 0) {
err = -ENODEV;
goto out;
}
size = sizeof(struct armflash_info) +
sizeof(struct armflash_subdev_info) * nr;
info = kzalloc(size, GFP_KERNEL);
if (!info) {
err = -ENOMEM;
goto out;
}
if (plat && plat->init) {
err = plat->init();
if (err)
goto no_resource;
}
for (i = 0; i < nr; i++) {
struct armflash_subdev_info *subdev = &info->subdev[i];
struct resource *res;
res = platform_get_resource(dev, IORESOURCE_MEM, i);
if (!res)
break;
if (nr == 1)
/* No MTD concatenation, just use the default name */
subdev->name = kstrdup(dev_name(&dev->dev), GFP_KERNEL);
else
subdev->name = kasprintf(GFP_KERNEL, "%s-%d",
dev_name(&dev->dev), i);
if (!subdev->name) {
err = -ENOMEM;
break;
}
subdev->plat = plat;
err = armflash_subdev_probe(subdev, res);
if (err) {
kfree(subdev->name);
subdev->name = NULL;
break;
}
}
info->nr_subdev = i;
if (err)
goto subdev_err;
if (info->nr_subdev == 1)
info->mtd = info->subdev[0].mtd;
else if (info->nr_subdev > 1) {
struct mtd_info *cdev[info->nr_subdev];
/*
* We detected multiple devices. Concatenate them together.
*/
for (i = 0; i < info->nr_subdev; i++)
cdev[i] = info->subdev[i].mtd;
info->mtd = mtd_concat_create(cdev, info->nr_subdev,
dev_name(&dev->dev));
if (info->mtd == NULL)
err = -ENXIO;
}
if (err < 0)
goto cleanup;
err = parse_mtd_partitions(info->mtd, probes, &info->parts, 0);
if (err > 0) {
err = add_mtd_partitions(info->mtd, info->parts, err);
if (err)
printk(KERN_ERR
"mtd partition registration failed: %d\n", err);
}
if (err == 0) {
platform_set_drvdata(dev, info);
return err;
}
/*
* We got an error, free all resources.
*/
cleanup:
if (info->mtd) {
del_mtd_partitions(info->mtd);
if (info->mtd != info->subdev[0].mtd)
mtd_concat_destroy(info->mtd);
}
kfree(info->parts);
subdev_err:
for (i = info->nr_subdev - 1; i >= 0; i--)
armflash_subdev_remove(&info->subdev[i]);
no_resource:
if (plat && plat->exit)
plat->exit();
kfree(info);
out:
return err;
}
static int armflash_remove(struct platform_device *dev)
{
struct armflash_info *info = platform_get_drvdata(dev);
struct flash_platform_data *plat = dev->dev.platform_data;
int i;
platform_set_drvdata(dev, NULL);
if (info) {
if (info->mtd) {
del_mtd_partitions(info->mtd);
if (info->mtd != info->subdev[0].mtd)
mtd_concat_destroy(info->mtd);
}
kfree(info->parts);
for (i = info->nr_subdev - 1; i >= 0; i--)
armflash_subdev_remove(&info->subdev[i]);
if (plat && plat->exit)
plat->exit();
kfree(info);
}
return 0;
}
static struct platform_driver armflash_driver = {
.probe = armflash_probe,
.remove = armflash_remove,
.driver = {
.name = "armflash",
.owner = THIS_MODULE,
},
};
static int __init armflash_init(void)
{
return platform_driver_register(&armflash_driver);
}
static void __exit armflash_exit(void)
{
platform_driver_unregister(&armflash_driver);
}
module_init(armflash_init);
module_exit(armflash_exit);
MODULE_AUTHOR("ARM Ltd");
MODULE_DESCRIPTION("ARM Integrator CFI map driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:armflash");

View File

@@ -67,9 +67,25 @@ static int physmap_flash_remove(struct platform_device *dev)
if (info->mtd[i] != NULL)
map_destroy(info->mtd[i]);
}
if (physmap_data->exit)
physmap_data->exit(dev);
return 0;
}
static void physmap_set_vpp(struct map_info *map, int state)
{
struct platform_device *pdev;
struct physmap_flash_data *physmap_data;
pdev = (struct platform_device *)map->map_priv_1;
physmap_data = pdev->dev.platform_data;
if (physmap_data->set_vpp)
physmap_data->set_vpp(pdev, state);
}
static const char *rom_probe_types[] = {
"cfi_probe",
"jedec_probe",
@@ -77,7 +93,8 @@ static const char *rom_probe_types[] = {
"map_rom",
NULL };
#ifdef CONFIG_MTD_PARTITIONS
static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "afs",
NULL };
#endif
static int physmap_flash_probe(struct platform_device *dev)
@@ -100,6 +117,12 @@ static int physmap_flash_probe(struct platform_device *dev)
goto err_out;
}
if (physmap_data->init) {
err = physmap_data->init(dev);
if (err)
goto err_out;
}
platform_set_drvdata(dev, info);
for (i = 0; i < dev->num_resources; i++) {
@@ -120,8 +143,9 @@ static int physmap_flash_probe(struct platform_device *dev)
info->map[i].phys = dev->resource[i].start;
info->map[i].size = resource_size(&dev->resource[i]);
info->map[i].bankwidth = physmap_data->width;
info->map[i].set_vpp = physmap_data->set_vpp;
info->map[i].set_vpp = physmap_set_vpp;
info->map[i].pfow_base = physmap_data->pfow_base;
info->map[i].map_priv_1 = (unsigned long)dev;
info->map[i].virt = devm_ioremap(&dev->dev, info->map[i].phys,
info->map[i].size);

View File

@@ -50,39 +50,13 @@ struct pismo_data {
struct platform_device *dev[PISMO_NUM_CS];
};
/* FIXME: set_vpp could do with a better calling convention */
static struct pismo_data *vpp_pismo;
static DEFINE_MUTEX(pismo_mutex);
static int pismo_setvpp_probe_fix(struct pismo_data *pismo)
static void pismo_set_vpp(struct platform_device *pdev, int on)
{
mutex_lock(&pismo_mutex);
if (vpp_pismo) {
mutex_unlock(&pismo_mutex);
kfree(pismo);
return -EBUSY;
}
vpp_pismo = pismo;
mutex_unlock(&pismo_mutex);
return 0;
}
static void pismo_setvpp_remove_fix(struct pismo_data *pismo)
{
mutex_lock(&pismo_mutex);
if (vpp_pismo == pismo)
vpp_pismo = NULL;
mutex_unlock(&pismo_mutex);
}
static void pismo_set_vpp(struct map_info *map, int on)
{
struct pismo_data *pismo = vpp_pismo;
struct i2c_client *client = to_i2c_client(pdev->dev.parent);
struct pismo_data *pismo = i2c_get_clientdata(client);
pismo->vpp(pismo->vpp_data, on);
}
/* end of hack */
static unsigned int __devinit pismo_width_to_bytes(unsigned int width)
{
@@ -231,9 +205,6 @@ static int __devexit pismo_remove(struct i2c_client *client)
for (i = 0; i < ARRAY_SIZE(pismo->dev); i++)
platform_device_unregister(pismo->dev[i]);
/* FIXME: set_vpp needs saner arguments */
pismo_setvpp_remove_fix(pismo);
kfree(pismo);
return 0;
@@ -257,11 +228,6 @@ static int __devinit pismo_probe(struct i2c_client *client,
if (!pismo)
return -ENOMEM;
/* FIXME: set_vpp needs saner arguments */
ret = pismo_setvpp_probe_fix(pismo);
if (ret)
return ret;
pismo->client = client;
if (pdata) {
pismo->vpp = pdata->set_vpp;

View File

@@ -8,9 +8,6 @@ menu "Graphics support"
config HAVE_FB_ATMEL
bool
config HAVE_FB_IMX
bool
config SH_MIPI_DSI
tristate
depends on (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
@@ -359,7 +356,7 @@ config FB_SA1100
config FB_IMX
tristate "Freescale i.MX LCD support"
depends on FB && (HAVE_FB_IMX || ARCH_MX1 || ARCH_MX2)
depends on FB && IMX_HAVE_PLATFORM_IMX_FB
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT

View File

@@ -65,12 +65,6 @@
#define CPOS_OP (1<<28)
#define CPOS_CXP(x) (((x) & 3ff) << 16)
#ifdef CONFIG_ARCH_MX1
#define CPOS_CYP(y) ((y) & 0x1ff)
#else
#define CPOS_CYP(y) ((y) & 0x3ff)
#endif
#define LCDC_LCWHB 0x10
#define LCWHB_BK_EN (1<<31)
#define LCWHB_CW(w) (((w) & 0x1f) << 24)
@@ -79,16 +73,6 @@
#define LCDC_LCHCC 0x14
#ifdef CONFIG_ARCH_MX1
#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11)
#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5)
#define LCHCC_CUR_COL_B(b) ((b) & 0x1f)
#else
#define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12)
#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6)
#define LCHCC_CUR_COL_B(b) ((b) & 0x3f)
#endif
#define LCDC_PCR 0x18
#define LCDC_HCR 0x1C
@@ -115,11 +99,7 @@
#define LCDC_RMCR 0x34
#ifdef CONFIG_ARCH_MX1
#define RMCR_LCDC_EN (1<<1)
#else
#define RMCR_LCDC_EN 0
#endif
#define RMCR_LCDC_EN_MX1 (1<<1)
#define RMCR_SELF_REF (1<<0)
@@ -536,7 +516,11 @@ static void imxfb_enable_controller(struct imxfb_info *fbi)
writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
fbi->regs + LCDC_CPOS);
writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR);
/*
* RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt
* on other SoCs
*/
writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
clk_enable(fbi->clk);