diff --git a/drivers/staging/comedi/Kconfig b/drivers/staging/comedi/Kconfig index 8304c39ab57c..341fc07b2a54 100644 --- a/drivers/staging/comedi/Kconfig +++ b/drivers/staging/comedi/Kconfig @@ -1037,8 +1037,6 @@ config COMEDI_NI_660X config COMEDI_NI_670X tristate "NI 670x PCI card support" - depends on HAS_DMA - select COMEDI_MITE ---help--- Enable support for National Instruments PCI-6703 and PCI-6704 diff --git a/drivers/staging/comedi/drivers/ni_670x.c b/drivers/staging/comedi/drivers/ni_670x.c index b487f8d9eeed..709119c9e089 100644 --- a/drivers/staging/comedi/drivers/ni_670x.c +++ b/drivers/staging/comedi/drivers/ni_670x.c @@ -42,8 +42,6 @@ Commands are not supported. #include "../comedidev.h" -#include "mite.h" - #define AO_VALUE_OFFSET 0x00 #define AO_CHAN_OFFSET 0x0c #define AO_STATUS_OFFSET 0x10 @@ -82,8 +80,7 @@ static const struct ni_670x_board ni_670x_boards[] = { }; struct ni_670x_private { - - struct mite_struct *mite; + void __iomem *mmio; int boardtype; int dio; unsigned int ao_readback[32]; @@ -111,9 +108,9 @@ static int ni_670x_ao_winsn(struct comedi_device *dev, for (i = 0; i < insn->n; i++) { /* First write in channel register which channel to use */ writel(((chan & 15) << 1) | ((chan & 16) >> 4), - devpriv->mite->daq_io_addr + AO_CHAN_OFFSET); + devpriv->mmio + AO_CHAN_OFFSET); /* write channel value */ - writel(data[i], devpriv->mite->daq_io_addr + AO_VALUE_OFFSET); + writel(data[i], devpriv->mmio + AO_VALUE_OFFSET); devpriv->ao_readback[chan] = data[i]; } @@ -140,8 +137,7 @@ static int ni_670x_dio_insn_bits(struct comedi_device *dev, unsigned int *data) { struct ni_670x_private *devpriv = dev->private; - void __iomem *io_addr = devpriv->mite->daq_io_addr + - DIO_PORT0_DATA_OFFSET; + void __iomem *io_addr = devpriv->mmio + DIO_PORT0_DATA_OFFSET; if (comedi_dio_update_state(s, data)) writel(s->state, io_addr); @@ -163,11 +159,34 @@ static int ni_670x_dio_insn_config(struct comedi_device *dev, if (ret) return ret; - writel(s->io_bits, devpriv->mite->daq_io_addr + DIO_PORT0_DIR_OFFSET); + writel(s->io_bits, devpriv->mmio + DIO_PORT0_DIR_OFFSET); return insn->n; } +/* ripped from mite.h and mite_setup2() to avoid mite dependancy */ +#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */ +#define WENAB (1 << 7) /* window enable */ + +static int ni_670x_mite_init(struct pci_dev *pcidev) +{ + void __iomem *mite_base; + u32 main_phys_addr; + + /* ioremap the MITE registers (BAR 0) temporarily */ + mite_base = pci_ioremap_bar(pcidev, 0); + if (!mite_base) + return -ENOMEM; + + /* set data window to main registers (BAR 1) */ + main_phys_addr = pci_resource_start(pcidev, 1); + writel(main_phys_addr | WENAB, mite_base + MITE_IODWBSR); + + /* finished with MITE registers */ + iounmap(mite_base); + return 0; +} + static int ni_670x_auto_attach(struct comedi_device *dev, unsigned long context) { @@ -193,15 +212,13 @@ static int ni_670x_auto_attach(struct comedi_device *dev, if (!devpriv) return -ENOMEM; - devpriv->mite = mite_alloc(pcidev); - if (!devpriv->mite) - return -ENOMEM; - - ret = mite_setup(devpriv->mite); - if (ret < 0) { - dev_warn(dev->class_dev, "error setting up mite\n"); + ret = ni_670x_mite_init(pcidev); + if (ret) return ret; - } + + devpriv->mmio = pci_ioremap_bar(pcidev, 1); + if (!devpriv->mmio) + return -ENOMEM; ret = comedi_alloc_subdevices(dev, 2); if (ret) @@ -242,9 +259,9 @@ static int ni_670x_auto_attach(struct comedi_device *dev, s->insn_config = ni_670x_dio_insn_config; /* Config of misc registers */ - writel(0x10, devpriv->mite->daq_io_addr + MISC_CONTROL_OFFSET); + writel(0x10, devpriv->mmio + MISC_CONTROL_OFFSET); /* Config of ao registers */ - writel(0x00, devpriv->mite->daq_io_addr + AO_CONTROL_OFFSET); + writel(0x00, devpriv->mmio + AO_CONTROL_OFFSET); return 0; } @@ -259,8 +276,8 @@ static void ni_670x_detach(struct comedi_device *dev) if (s) kfree(s->range_table_list); } - if (devpriv) - mite_detach(devpriv->mite); + if (devpriv && devpriv->mmio) + iounmap(devpriv->mmio); comedi_pci_disable(dev); }