From 77ad0f2e34f849d4f85c30933c14ab742f617078 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 5 Jun 2018 10:17:48 +0530 Subject: [PATCH 1/5] ARM: dts: sun8i-h3: Add missing cooling device properties for CPUs The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Fix other missing properties (clocks, clock-names) as well to make it all work. Signed-off-by: Viresh Kumar Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 41d57c76f290..9dff6887923c 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -84,21 +84,30 @@ cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; }; From 7389172fc3ed5c4c6757e853d7d5bd2cfc6d204b Mon Sep 17 00:00:00 2001 From: Marcus Cooper Date: Wed, 4 Jul 2018 10:30:03 +0200 Subject: [PATCH 2/5] ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2 The enabling of the EMAC was reverted as there was an issue on how to handle the integrated PHY and it was getting close to the release window (fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")). When a solution was found, then the changes were restored in 4b236a0fe512 ("arm: dts: sunxi: h3/h5: Restore EMAC changes") and 4904337fe34f ("ARM: dts: sunxi: Restore EMAC changes (boards)"). Unfortunately enabling for the Beelink X2 was missed. This reverts partially commit 6b0e06df5cad (Revert "ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2") Signed-off-by: Marcus Cooper Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts index cf1f970b0c6f..5d23667dc2d2 100644 --- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts +++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts @@ -123,6 +123,13 @@ &ehci1 { status = "okay"; }; +&emac { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; + &hdmi { status = "okay"; }; From 51ecdd779e31ed45709bc32ff7efd4b28c3ce083 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Wed, 11 Jul 2018 21:44:50 +0800 Subject: [PATCH 3/5] ARM: sun8i: h3: add SY8113B regulator on Banana Pi M2 Zero board Banana Pi M2 Zero board has a SY8113B regulator, which is controlled via GPIO and capable of outputing 1.1V when the PL1 GPIO is set to output 0 or 1.1V when the PL6 GPIO is set to input or output 1, and the output is the power supply of the ARM cores in H3 SoC. Add the device tree node of this regulator and set the cpu's cpu-supply property to it. Signed-off-by: Icenowy Zheng Signed-off-by: Maxime Ripard --- .../dts/sun8i-h2-plus-bananapi-m2-zero.dts | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts index 7d01f9322658..1db2541135a7 100644 --- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts +++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts @@ -48,6 +48,23 @@ sw4 { }; }; + reg_vdd_cpux: vdd-cpux-regulator { + compatible = "regulator-gpio"; + regulator-name = "vdd-cpux"; + regulator-type = "voltage"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-ramp-delay = <50>; /* 4ms */ + + gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */ + enable-active-high; + gpios-states = <0x1>; + states = <1100000 0x0 + 1300000 0x1>; + }; + wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; @@ -55,6 +72,10 @@ wifi_pwrseq: wifi_pwrseq { }; }; +&cpu0 { + cpu-supply = <®_vdd_cpux>; +}; + &ehci0 { status = "okay"; }; From 8249ede477c50d82c4ce82b0f08f1ce89c919ae7 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Thu, 12 Jul 2018 11:04:17 +0800 Subject: [PATCH 4/5] ARM: dts: sunxi: libretech-all-h3-cc: Enable eMMC module The Libretech ALL-H3-CC has a high density connector for attaching an eMMC module. The module form factor and connection is specific to Libretech, and has provisions for split vmmc/vqmmc (core and I/O) voltage supplies, but this board does not wire the vqmmc side. The H2+/H3/H5 SoCs do not support alternate I/O voltages for eMMC either. Only 3.3V is supported. A specific module that ties vqmmc to vmmc, with both at 3.3V, must be used. Given that a) eMMC is not designed to be hotplugged, b) power is always provided on the pins, and c) MMC controllers can deal with missing cards, we can enable this by default. If a module is attached it will be picked up by the system. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi b/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi index f7ffdd6658a2..1eadc132390c 100644 --- a/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi +++ b/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi @@ -178,6 +178,15 @@ &mmc0 { status = "okay"; }; +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc_io>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + &ohci0 { status = "okay"; }; From 8fb147322a8fdec96852d537affe9623d307edfb Mon Sep 17 00:00:00 2001 From: Corentin Labbe Date: Wed, 18 Jul 2018 11:40:38 +0000 Subject: [PATCH 5/5] ARM: dts: sunxi-h3-h5: Remove unused address-cells/size-cells of dwmac-sun8i address-cells/size-cells is unnecessary for dwmac-sun8i node. It was in early days, but since a mdio node is used, it could be removed. This patch fix the following DT warning: Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Corentin Labbe Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index c3bff1105e5d..fc6131315c47 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -506,8 +506,6 @@ emac: ethernet@1c30000 { reset-names = "stmmaceth"; clocks = <&ccu CLK_BUS_EMAC>; clock-names = "stmmaceth"; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; mdio: mdio {