mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-24 01:31:46 -04:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: exynos8895-dreamlte: enable support for microSD storage

Browse Source 
Enable MMC for the Samsung Galaxy S8, used as external microSD card
storage. Since the main PMIC is currently not supported, assume the
required regulators are enabled by the previous bootloader.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Link: https://lore.kernel.org/r/20250105161344.420749-6-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Ivaylo Ivanov
2025-01-05 18:13:43 +02:00
committed by Krzysztof Kozlowski
parent 1d73bb1ed1
commit 2e7281e60a
1 changed files with 32 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts
View File

@@ -16,6 +16,10 @@ / {
compatible = "samsung,dreamlte", "samsung,exynos8895";
chassis-type = "handset";
aliases {
mmc0 = &mmc;
};
chosen {
#address-cells = <2>;
#size-cells = <1>;
@@ -95,6 +99,27 @@ &oscclk {
clock-frequency = <26000000>;
};
&mmc {
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4 &sd2_cd>;
pinctrl-names = "default";
bus-width = <4>;
card-detect-delay = <200>;
cd-gpios = <&gpa1 5 GPIO_ACTIVE_LOW>;
clock-frequency = <800000000>;
disable-wp;
sd-uhs-sdr50;
sd-uhs-sdr104;
/* TODO: Add regulators once PMIC is implemented */
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-ddr-timing = <1 2>;
samsung,dw-mshc-sdr-timing = <0 3>;
status = "okay";
};
&pinctrl_alive {
key_power: key-power-pins {
samsung,pins = "gpa2-4";
@@ -123,4 +148,11 @@ key_wink: key-wink-pins {
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>;
};
sd2_cd: sd2-cd-pins {
samsung,pins = "gpa1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS7_PIN_DRV_LV4>;
};
};