From 36dc3b1a7e9dd332d224cc187acdaa9f2023a1f1 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 25 Mar 2020 01:43:33 +0300 Subject: [PATCH 1/3] ARM: tegra: Initialize r0 register for firmware wake-up MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Downstream kernel of ASUS TF300T sets r0 to #3. There is no explanation in downstream code whether this is really needed and some of T30 downstream kernels have and explicit comment telling that all arguments are ignored by firmware. Let's take a safe side by replicating behavior of the TF300T downstream kernel. This change works fine on Ouya and Nexus 7 devices. Tested-by: Michał Mirosław Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Peter Geis Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/reset-handler.S | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 53123ae4ac3b..06ca44b09381 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -98,7 +98,12 @@ ENTRY(tegra_resume_trusted_foundations) reteq lr .arch_extension sec - /* First call after suspend wakes firmware. No arguments required. */ + /* + * First call after suspend wakes firmware. No arguments required + * for some firmware versions. Downstream kernel of ASUS TF300T uses + * r0=3 for the wake-up notification. + */ + mov r0, #3 smc #0 b cpu_resume From 38743e414e7cc6d23f41276f298ad4781890a89f Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 25 Mar 2020 01:43:34 +0300 Subject: [PATCH 2/3] ARM: tegra: Do not fully reinitialize L2 on resume MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ASUS TF300T device may not work properly if firmware is asked to fully re-initialize L2 cache after resume from LP2 suspend. The downstream kernel of TF300T uses different opcode to enable cache after resuming from LP2, this opcode also works fine on Nexus 7 and Ouya devices. Supposedly, this may be needed by an older firmware versions. Reported-by: Michał Mirosław Tested-by: Michał Mirosław Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Peter Geis Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/pm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index d1e1a61b12cf..6452ebf68d40 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -216,6 +216,8 @@ int tegra_pm_enter_lp2(void) restore_cpu_complex(); cpu_cluster_pm_exit(); + call_firmware_op(prepare_idle, TF_PM_MODE_NONE); + return err; } @@ -391,6 +393,8 @@ static int tegra_suspend_enter(suspend_state_t state) local_fiq_enable(); + call_firmware_op(prepare_idle, TF_PM_MODE_NONE); + return 0; } From fafd62e7688096dcfe4107d7a2f6c7c6eb6045de Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 25 Mar 2020 01:43:35 +0300 Subject: [PATCH 3/3] cpuidle: tegra: Support CPU cluster power-down state on Tegra30 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The new Tegra CPU Idle driver now has a unified code path for the coupled CC6 (LP2) state, this allows to enable the deepest idling state on Tegra30 SoC where the whole CPU cluster is power-gated. Tested-by: Michał Mirosław Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Peter Geis Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- drivers/cpuidle/cpuidle-tegra.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index 313b0290e97b..150045849d78 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -365,7 +365,6 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) break; case TEGRA30: - tegra_cpuidle_disable_state(TEGRA_CC6); break; case TEGRA114: