From 3ea03a9d512ca19d59315492230e954a1653ff6e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Tue, 26 Jan 2016 23:35:16 +0100 Subject: [PATCH 01/14] ARM: BCM5301X: Add DT for D-Link DIR-885L MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's device based on BCM47094 which is quite similar to BCM4709 except for higher CPU frequency. This device has 2 flash memories, it boots from serial one and stores firmware on NAND. Other than that we define standard stuff like LEDs, buttons and UART. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 111 ++++++++++++++++++ 2 files changed, 112 insertions(+) create mode 100644 arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a4a6d70e8b26..e75711c6fd7e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -79,6 +79,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4709-buffalo-wxr-1900dhp.dtb \ bcm4709-netgear-r7000.dtb \ bcm4709-netgear-r8000.dtb \ + bcm47094-dlink-dir-885l.dtb \ bcm94708.dtb \ bcm94709.dtb \ bcm953012k.dtb diff --git a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts new file mode 100644 index 000000000000..6c83538bc2d7 --- /dev/null +++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts @@ -0,0 +1,111 @@ +/* + * Broadcom BCM470X / BCM5301X ARM platform code. + * DTS for D-Link DIR-885L + * + * Copyright (C) 2016 Rafał Miłecki + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +/dts-v1/; + +#include "bcm4708.dtsi" +#include "bcm5301x-nand-cs0-bch8.dtsi" + +/ { + compatible = "dlink,dir-885l", "brcm,bcm47094", "brcm,bcm4708"; + model = "D-Link DIR-885L"; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + memory { + reg = <0x00000000 0x08000000>; + }; + + nand: nand@18028000 { + nandcs@0 { + partition@0 { + label = "firmware"; + reg = <0x00000000 0x08000000>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + power-white { + label = "bcm53xx:white:power"; + gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + wan-white { + label = "bcm53xx:white:wan"; + gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-off"; + }; + + power-amber { + label = "bcm53xx:amber:power"; + gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-off"; + }; + + wan-amber { + label = "bcm53xx:amber:wan"; + gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-off"; + }; + + usb3-white { + label = "bcm53xx:white:usb3"; + gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-off"; + }; + + 2ghz { + label = "bcm53xx:white:2ghz"; + gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-off"; + }; + + 5ghz { + label = "bcm53xx:white:5ghz"; + gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-off"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + wps { + label = "WPS"; + linux,code = ; + gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; + }; + + /* Switch: router / extender */ + extender { + label = "Extender"; + linux,code = ; + gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; + }; + + restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&uart0 { + status = "okay"; + clock-frequency = <125000000>; +}; From 3dd3c077b5121ae33329187e677bc86d91fa2ddd Mon Sep 17 00:00:00 2001 From: Simran Rai Date: Sun, 31 Jan 2016 16:19:42 -0800 Subject: [PATCH 02/14] ARM: dts: Add audio clock to the existing Broadcom Cygnus clock DT Signed-off-by: Simran Rai Reviewed-by: Ray Jui Reviewed-by: Scott Branden Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus-clock.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/bcm-cygnus-clock.dtsi b/arch/arm/boot/dts/bcm-cygnus-clock.dtsi index 32bcd45ef22b..80b6ba4ca50c 100644 --- a/arch/arm/boot/dts/bcm-cygnus-clock.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus-clock.dtsi @@ -121,4 +121,13 @@ asiu_clks: asiu_clks { clocks = <&osc>; clock-output-names = "keypad", "adc/touch", "pwm"; }; + + audiopll: audiopll { + #clock-cells = <1>; + compatible = "brcm,cygnus-audiopll"; + reg = <0x180aeb00 0x68>; + clocks = <&osc>; + clock-output-names = "audiopll", "ch0_audio", + "ch1_audio", "ch2_audio"; + }; }; From f974d685d27fd1898e25390fbbdd3bf620d15082 Mon Sep 17 00:00:00 2001 From: Martin Sperl Date: Fri, 11 Sep 2015 11:22:05 +0000 Subject: [PATCH 03/14] ARM: bcm2835: add the auxiliary spi1 and spi2 to the device tree This enables the use of the auxiliary spi1 and spi2 devices on the bcm2835 SOC. Note that this requires the use of the new clk-bcm2835-aux to work. Signed-off-by: Martin Sperl Acked-by: Stephen Warren [anholt: Rebased on 2835.dtsi -> 283x.dtsi change] Signed-off-by: Eric Anholt --- arch/arm/boot/dts/bcm283x.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 971e741e5467..f0d457312746 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -1,5 +1,6 @@ #include #include +#include #include "skeleton.dtsi" /* This include file covers the common peripherals and configuration between @@ -159,6 +160,26 @@ aux: aux@0x7e215000 { clocks = <&clocks BCM2835_CLOCK_VPU>; }; + spi1: spi@7e215080 { + compatible = "brcm,bcm2835-aux-spi"; + reg = <0x7e215080 0x40>; + interrupts = <1 29>; + clocks = <&aux BCM2835_AUX_CLOCK_SPI1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi2: spi@7e2150c0 { + compatible = "brcm,bcm2835-aux-spi"; + reg = <0x7e2150c0 0x40>; + interrupts = <1 29>; + clocks = <&aux BCM2835_AUX_CLOCK_SPI2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + sdhci: sdhci@7e300000 { compatible = "brcm,bcm2835-sdhci"; reg = <0x7e300000 0x100>; From 40ad4499bafa0202f3a1880fc43718ae3a3e2c24 Mon Sep 17 00:00:00 2001 From: Remi Pommarel Date: Mon, 21 Dec 2015 21:12:59 +0100 Subject: [PATCH 04/14] ARM: bcm2835: Add PWM clock support to the device tree Signed-off-by: Remi Pommarel [anholt: Rebased on 2835.dtsi -> 283x.dtsi change] Signed-off-by: Eric Anholt --- arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 ++++ arch/arm/boot/dts/bcm283x.dtsi | 10 ++++++++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi index 3afb9fefe2d1..a584a93f631d 100644 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi @@ -58,3 +58,7 @@ &sdhci { status = "okay"; bus-width = <4>; }; + +&pwm { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index f0d457312746..e4a279261d72 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -180,6 +180,16 @@ spi2: spi@7e2150c0 { status = "disabled"; }; + pwm: pwm@7e20c000 { + compatible = "brcm,bcm2835-pwm"; + reg = <0x7e20c000 0x28>; + clocks = <&clocks BCM2835_CLOCK_PWM>; + assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; + assigned-clock-rates = <10000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + sdhci: sdhci@7e300000 { compatible = "brcm,bcm2835-sdhci"; reg = <0x7e300000 0x100>; From 68e2ef17a54401603c927e2bccf5e8ac8d5da9d3 Mon Sep 17 00:00:00 2001 From: Martin Sperl Date: Sun, 17 Jan 2016 12:15:28 +0000 Subject: [PATCH 05/14] ARM: bcm2835: follow dt uart node-naming convention This patch fixes the naming of the device tree node: uart@7e201000 to conform to the standard of: serial@7e201000 Signed-off-by: Martin Sperl [anholt: Rebased on 2835.dtsi -> 283x.dtsi change] Signed-off-by: Eric Anholt --- arch/arm/boot/dts/bcm283x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index e4a279261d72..c003f2d77de5 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -112,7 +112,7 @@ gpio: gpio@7e200000 { #interrupt-cells = <2>; }; - uart0: uart@7e201000 { + uart0: serial@7e201000 { compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; reg = <0x7e201000 0x1000>; interrupts = <2 25>; From 7a1298e339249f25f4ef97fed332c70e1d1507e4 Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Mon, 25 Jan 2016 21:40:06 +0100 Subject: [PATCH 06/14] ARM: bcm2835: dt: Add Raspberry Pi Model A This one is essentially the same as revision 2 B board (with the I2S on P5 header). Signed-off-by: Lubomir Rintel Acked-by: Stephen Warren [anholt: Rebased on bcm2835.dtsi -> bcm283x.dtsi change] Signed-off-by: Eric Anholt --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm2835-rpi-a.dts | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 arch/arm/boot/dts/bcm2835-rpi-a.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a4a6d70e8b26..d00081447c32 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -60,6 +60,7 @@ dtb-$(CONFIG_ARCH_AXXIA) += \ axm5516-amarillo.dtb dtb-$(CONFIG_ARCH_BCM2835) += \ bcm2835-rpi-b.dtb \ + bcm2835-rpi-a.dtb \ bcm2835-rpi-b-rev2.dtb \ bcm2835-rpi-b-plus.dtb \ bcm2835-rpi-a-plus.dtb \ diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts new file mode 100644 index 000000000000..ddbbbbd42dda --- /dev/null +++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts @@ -0,0 +1,24 @@ +/dts-v1/; +#include "bcm2835.dtsi" +#include "bcm2835-rpi.dtsi" + +/ { + compatible = "raspberrypi,model-a", "brcm,bcm2835"; + model = "Raspberry Pi Model A"; + + leds { + act { + gpios = <&gpio 16 1>; + }; + }; +}; + +&gpio { + pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>; + + /* I2S interface */ + i2s_alt2: i2s_alt2 { + brcm,pins = <28 29 30 31>; + brcm,function = ; + }; +}; From 5ec6f2cd8ec4bcd38ba199ea8711a5ec906d85e7 Mon Sep 17 00:00:00 2001 From: Alexander Aring Date: Wed, 16 Dec 2015 16:26:49 -0800 Subject: [PATCH 07/14] ARM: bcm2835: Add the Raspberry Pi power domain driver to the DT. This connects the USB driver to the USB power domain, so that USB can actually be turned on at boot if the bootloader didn't do it for us. Signed-off-by: Alexander Aring Signed-off-by: Eric Anholt Reviewed-by: Kevin Hilman --- arch/arm/boot/dts/bcm2835-rpi.dtsi | 12 ++++++++++++ arch/arm/boot/dts/bcm283x.dtsi | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi index a584a93f631d..76bdbcafab18 100644 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi @@ -1,3 +1,5 @@ +#include + / { memory { reg = <0 0x10000000>; @@ -18,6 +20,12 @@ firmware: firmware { compatible = "raspberrypi,bcm2835-firmware"; mboxes = <&mailbox>; }; + + power: power { + compatible = "raspberrypi,bcm2835-power"; + firmware = <&firmware>; + #power-domain-cells = <1>; + }; }; }; @@ -62,3 +70,7 @@ &sdhci { &pwm { status = "okay"; }; + +&usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; +}; diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index c003f2d77de5..05ff5ce91c95 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -218,7 +218,7 @@ i2c2: i2c@7e805000 { status = "disabled"; }; - usb@7e980000 { + usb: usb@7e980000 { compatible = "brcm,bcm2835-usb"; reg = <0x7e980000 0x10000>; interrupts = <1 9>; From 018e4feb7584971b3dbda6daa6a8fef310cafbcb Mon Sep 17 00:00:00 2001 From: Yendapally Reddy Dhananjaya Reddy Date: Fri, 4 Dec 2015 12:12:42 -0500 Subject: [PATCH 08/14] ARM: dts: enable GPIO-a for Broadcom NSP This enables the GPIO-a support for Broadcom NSP SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 10bdef557ba0..49f9376d0d12 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -169,6 +169,18 @@ axi { #address-cells = <1>; #size-cells = <1>; + gpioa: gpio@0020 { + compatible = "brcm,nsp-gpio-a"; + reg = <0x0020 0x70>, + <0x3f1c4 0x1c>; + #gpio-cells = <2>; + gpio-controller; + ngpios = <32>; + interrupt-controller; + interrupts = ; + gpio-ranges = <&pinctrl 0 0 32>; + }; + uart0: serial@0300 { compatible = "ns16550a"; reg = <0x0300 0x100>; From 522199029fdcc3a8b507779d59d1d78d4fa14460 Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Fri, 5 Feb 2016 17:43:20 -0500 Subject: [PATCH 09/14] ARM: dts: NSP: Fix PCIE DT issue Adding the ranges value is preventing the PCI nodes from working. Pulling them out outside makes them work again (and makes it similar to the NS2 device tree). Signed-off-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 144 ++++++++++++++++----------------- 1 file changed, 72 insertions(+), 72 deletions(-) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 49f9376d0d12..3b8c2c09286f 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -197,78 +197,6 @@ uart1: serial@0400 { status = "disabled"; }; - pcie0: pcie@12000 { - compatible = "brcm,iproc-pcie"; - reg = <0x12000 0x1000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>; - - linux,pci-domain = <0>; - - bus-range = <0x00 0xff>; - - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - - /* Note: The HW does not support I/O resources. So, - * only the memory resource range is being specified. - */ - ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>; - - status = "disabled"; - }; - - pcie1: pcie@13000 { - compatible = "brcm,iproc-pcie"; - reg = <0x13000 0x1000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>; - - linux,pci-domain = <1>; - - bus-range = <0x00 0xff>; - - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - - /* Note: The HW does not support I/O resources. So, - * only the memory resource range is being specified. - */ - ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>; - - status = "disabled"; - }; - - pcie2: pcie@14000 { - compatible = "brcm,iproc-pcie"; - reg = <0x14000 0x1000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>; - - linux,pci-domain = <2>; - - bus-range = <0x00 0xff>; - - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - - /* Note: The HW does not support I/O resources. So, - * only the memory resource range is being specified. - */ - ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>; - - status = "disabled"; - }; - nand: nand@26000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; reg = <0x026000 0x600>, @@ -318,4 +246,76 @@ pinctrl: pinctrl@3f1c0 { <0x3f408 0x04>; }; }; + + pcie0: pcie@18012000 { + compatible = "brcm,iproc-pcie"; + reg = <0x18012000 0x1000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>; + + linux,pci-domain = <0>; + + bus-range = <0x00 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + + /* Note: The HW does not support I/O resources. So, + * only the memory resource range is being specified. + */ + ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>; + + status = "disabled"; + }; + + pcie1: pcie@18013000 { + compatible = "brcm,iproc-pcie"; + reg = <0x18013000 0x1000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>; + + linux,pci-domain = <1>; + + bus-range = <0x00 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + + /* Note: The HW does not support I/O resources. So, + * only the memory resource range is being specified. + */ + ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>; + + status = "disabled"; + }; + + pcie2: pcie@18014000 { + compatible = "brcm,iproc-pcie"; + reg = <0x18014000 0x1000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>; + + linux,pci-domain = <2>; + + bus-range = <0x00 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + + /* Note: The HW does not support I/O resources. So, + * only the memory resource range is being specified. + */ + ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>; + + status = "disabled"; + }; }; From 5a6c7b52d09baa7dcf37657b232ee8dfcc55d734 Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Fri, 5 Feb 2016 17:43:21 -0500 Subject: [PATCH 10/14] ARM: dts: NSP: Fix CPU DT issue There is a double definition of the CPUs present in the device tree. Remove unnecessary cpu device tree definition. Signed-off-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 3b8c2c09286f..834862b52b52 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -68,18 +68,6 @@ mpcore { #address-cells = <1>; #size-cells = <1>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x0>; - }; - }; - a9pll: arm_clk@00000 { #clock-cells = <0>; compatible = "brcm,nsp-armpll"; From 9d57f60c219832dc74954c7479675e07abb86f9a Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Fri, 5 Feb 2016 17:43:22 -0500 Subject: [PATCH 11/14] ARM: dts: NSP: Add PMU Support to DT Add support for the ARM Performance Monitor Unit to the Northstar Plus device tree. Signed-off-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 834862b52b52..a984bafee208 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -45,14 +45,14 @@ cpus { #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x0>; }; - cpu@1 { + cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; @@ -62,6 +62,13 @@ cpu@1 { }; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = ; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; + mpcore { compatible = "simple-bus"; ranges = <0x00000000 0x19000000 0x00023000>; From a0efb0d28b77e481704b67a419d36a789e16beaa Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Sat, 6 Feb 2016 12:53:39 -0500 Subject: [PATCH 12/14] ARM: dts: NSP: Add SP804 Support to DT Add support for the ARM SP804 timer to the Northstar Plus device tree. Signed-off-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index a984bafee208..bed67017f9d0 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -206,6 +206,24 @@ nand: nand@26000 { brcm,nand-has-wp; }; + ccbtimer0: timer@34000 { + compatible = "arm,sp804"; + reg = <0x34000 0x1000>; + interrupts = , + ; + clocks = <&iprocslow>; + clock-names = "apb_pclk"; + }; + + ccbtimer1: timer@35000 { + compatible = "arm,sp804"; + reg = <0x35000 0x1000>; + interrupts = , + ; + clocks = <&iprocslow>; + clock-names = "apb_pclk"; + }; + i2c0: i2c@38000 { compatible = "brcm,iproc-i2c"; reg = <0x38000 0x50>; From 7c3fe8a1f6d1d2287de5dc8cbfc901a0a2d71838 Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Fri, 5 Feb 2016 17:43:23 -0500 Subject: [PATCH 13/14] ARM: dts: NSP: Add SP805 Support to DT Add support for the ARM SP805 Watchdog timer to the Northstar Plus device tree. Signed-off-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index bed67017f9d0..def9e783b5c6 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -233,6 +233,14 @@ i2c0: i2c@38000 { clock-frequency = <100000>; }; + watchdog@39000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x39000 0x1000>; + interrupts = ; + clocks = <&iprocslow>, <&iprocslow>; + clock-names = "wdogclk", "apb_pclk"; + }; + lcpll0: lcpll0@3f100 { #clock-cells = <1>; compatible = "brcm,nsp-lcpll0"; From 1305141d1a7254b53b35303ee84f4c4948007bd0 Mon Sep 17 00:00:00 2001 From: Martin Sperl Date: Fri, 12 Feb 2016 11:14:25 +0000 Subject: [PATCH 14/14] ARM: bcm2835: add bcm2835-aux-uart support to DT Add bcm2835-aux-uart support to the device tree. Signed-off-by: Martin Sperl Signed-off-by: Eric Anholt --- arch/arm/boot/dts/bcm283x.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 05ff5ce91c95..8aaf193711bf 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -160,6 +160,14 @@ aux: aux@0x7e215000 { clocks = <&clocks BCM2835_CLOCK_VPU>; }; + uart1: serial@7e215040 { + compatible = "brcm,bcm2835-aux-uart"; + reg = <0x7e215040 0x40>; + interrupts = <1 29>; + clocks = <&aux BCM2835_AUX_CLOCK_UART>; + status = "disabled"; + }; + spi1: spi@7e215080 { compatible = "brcm,bcm2835-aux-spi"; reg = <0x7e215080 0x40>;