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synced 2026-05-27 13:42:27 -04:00
Merge tag 'mmc-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson: "MMC core: - Don't force a retune before eMMC RPMB switch - Add optional HS400 tuning in HS400es initialization - Add a sysfs node to for write-protect-group-size - Add re-tuning test to the mmc-test module - Use mrq.sbc to support close-ended ioctl requests MMC host: - mmci: Add support for SDIO in-band irqs for the stm32 variant - mmc_spi: Remove broken support custom DMA mapped buffers - mtk-sd: Improve and extend the support for tunings - renesas_sdhi: Document support for the RZ/Five variant - sdhci_am654: Drop support for the ti,otap-del-sel DT property - sdhci-brcmstb: Add support for the brcm 74165b0 variant - sdhci-msm: Add compatibles for IPQ4019 and IPQ8074 - sdhci-of-dwcmshc: Add support for the T-Head TH1520 variant - sdhci-xenon: Add support for the Marvell ac5 variant" * tag 'mmc-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (27 commits) mmc: xenon: Add ac5 support via bounce buffer dt-bindings: mmc: add Marvell ac5 mmc: sdhci-brcmstb: add new sdhci reset sequence for brcm 74165b0 dt-bindings: mmc: brcm,sdhci-brcmstb: Add support for 74165b0 mmc: core: Do not force a retune before RPMB switch mmc: core: Add HS400 tuning in HS400es initialization mmc: sdhci_omap: Fix TI SoC dependencies mmc: sdhci_am654: Fix TI SoC dependencies mmc: core: Add wp_grp_size sysfs node mmc: mmc_test: Add re-tuning test mmc: mmc_spi: remove custom DMA mapped buffers dt-bindings: mmc: sdhci-msm: document dedicated IPQ4019 and IPQ8074 dt-bindings: mmc: synopsys-dw-mshc: add iommus for Intel SocFPGA mmc: mtk-sd: Extend number of tuning steps dt-bindings: mmc: mtk-sd: add tuning steps related property mmc: sdhci-omap: don't misuse kernel-doc marker mmc: mtk-sd: Increase the verbosity of msdc_track_cmd_data mmc: core: Use mrq.sbc in close-ended ffu mmc: sdhci_am654: Drop lookup for deprecated ti,otap-del-sel mmc: sdhci-of-dwcmshc: Use logical OR instead of bitwise OR in dwcmshc_probe() ...
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@@ -32,6 +32,7 @@ struct mmc_csd {
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unsigned int r2w_factor;
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unsigned int max_dtr;
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unsigned int erase_size; /* In sectors */
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unsigned int wp_grp_size;
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unsigned int read_blkbits;
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unsigned int write_blkbits;
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unsigned int capacity;
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@@ -52,9 +53,6 @@ struct mmc_ext_csd {
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u8 part_config;
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u8 cache_ctrl;
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u8 rst_n_function;
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u8 max_packed_writes;
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u8 max_packed_reads;
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u8 packed_event_en;
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unsigned int part_time; /* Units: ms */
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unsigned int sa_timeout; /* Units: 100ns */
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unsigned int generic_cmd6_time; /* Units: 10ms */
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@@ -306,6 +304,7 @@ struct mmc_card {
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unsigned int eg_boundary; /* don't cross erase-group boundaries */
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unsigned int erase_arg; /* erase / trim / discard */
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u8 erased_byte; /* value of erased bytes */
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unsigned int wp_grp_size; /* write group size in sectors */
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u32 raw_cid[4]; /* raw card CID */
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u32 raw_csd[4]; /* raw card CSD */
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@@ -27,7 +27,6 @@ struct mmc_command {
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u32 opcode;
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u32 arg;
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#define MMC_CMD23_ARG_REL_WR (1 << 31)
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#define MMC_CMD23_ARG_PACKED ((0 << 31) | (1 << 30))
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#define MMC_CMD23_ARG_TAG_REQ (1 << 29)
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u32 resp[4];
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unsigned int flags; /* expected response type */
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@@ -257,8 +257,6 @@ static inline bool mmc_ready_for_data(u32 status)
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#define EXT_CSD_FLUSH_CACHE 32 /* W */
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#define EXT_CSD_CACHE_CTRL 33 /* R/W */
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#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
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#define EXT_CSD_PACKED_FAILURE_INDEX 35 /* RO */
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#define EXT_CSD_PACKED_CMD_STATUS 36 /* RO */
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#define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */
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#define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */
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#define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */
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@@ -321,8 +319,6 @@ static inline bool mmc_ready_for_data(u32 status)
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#define EXT_CSD_SUPPORTED_MODE 493 /* RO */
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#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
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#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
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#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
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#define EXT_CSD_MAX_PACKED_READS 501 /* RO */
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#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
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#define EXT_CSD_HPI_FEATURES 503 /* RO */
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@@ -402,18 +398,12 @@ static inline bool mmc_ready_for_data(u32 status)
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#define EXT_CSD_PWR_CL_8BIT_SHIFT 4
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#define EXT_CSD_PWR_CL_4BIT_SHIFT 0
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#define EXT_CSD_PACKED_EVENT_EN BIT(3)
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/*
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* EXCEPTION_EVENT_STATUS field
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*/
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#define EXT_CSD_URGENT_BKOPS BIT(0)
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#define EXT_CSD_DYNCAP_NEEDED BIT(1)
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#define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2)
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#define EXT_CSD_PACKED_FAILURE BIT(3)
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#define EXT_CSD_PACKED_GENERIC_ERROR BIT(0)
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#define EXT_CSD_PACKED_INDEXED_ERROR BIT(1)
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/*
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* BKOPS status level
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