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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-12-27 14:41:22 -05:00
iio: dac: ad5592r: use lock guards
Use lock guards from linux/cleanup.h to simplify the code and remove some labels. Note that we need to initialize some variables even though it's not technically required as scoped_guards() are implemented as for loops. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250409-gpiochip-set-rv-iio-v2-2-4b36428f39cb@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
committed by
Jonathan Cameron
parent
0f8d8b3548
commit
135e101f4d
@@ -7,6 +7,7 @@
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*/
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#include <linux/bitops.h>
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#include <linux/cleanup.h>
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#include <linux/delay.h>
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#include <linux/iio/iio.h>
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#include <linux/module.h>
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@@ -24,16 +25,14 @@ static int ad5592r_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct ad5592r_state *st = gpiochip_get_data(chip);
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int ret = 0;
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u8 val;
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u8 val = 0;
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mutex_lock(&st->gpio_lock);
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if (st->gpio_out & BIT(offset))
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val = st->gpio_val;
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else
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ret = st->ops->gpio_read(st, &val);
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mutex_unlock(&st->gpio_lock);
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scoped_guard(mutex, &st->gpio_lock) {
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if (st->gpio_out & BIT(offset))
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val = st->gpio_val;
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else
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ret = st->ops->gpio_read(st, &val);
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}
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if (ret < 0)
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return ret;
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@@ -45,7 +44,7 @@ static void ad5592r_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct ad5592r_state *st = gpiochip_get_data(chip);
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mutex_lock(&st->gpio_lock);
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guard(mutex)(&st->gpio_lock);
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if (value)
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st->gpio_val |= BIT(offset);
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@@ -53,8 +52,6 @@ static void ad5592r_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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st->gpio_val &= ~BIT(offset);
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st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
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mutex_unlock(&st->gpio_lock);
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}
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static int ad5592r_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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@@ -62,21 +59,16 @@ static int ad5592r_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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struct ad5592r_state *st = gpiochip_get_data(chip);
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int ret;
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mutex_lock(&st->gpio_lock);
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guard(mutex)(&st->gpio_lock);
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st->gpio_out &= ~BIT(offset);
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st->gpio_in |= BIT(offset);
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
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if (ret < 0)
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goto err_unlock;
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return ret;
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
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err_unlock:
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mutex_unlock(&st->gpio_lock);
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return ret;
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return st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
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}
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static int ad5592r_gpio_direction_output(struct gpio_chip *chip,
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@@ -85,7 +77,7 @@ static int ad5592r_gpio_direction_output(struct gpio_chip *chip,
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struct ad5592r_state *st = gpiochip_get_data(chip);
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int ret;
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mutex_lock(&st->gpio_lock);
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guard(mutex)(&st->gpio_lock);
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if (value)
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st->gpio_val |= BIT(offset);
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@@ -97,18 +89,13 @@ static int ad5592r_gpio_direction_output(struct gpio_chip *chip,
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
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if (ret < 0)
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goto err_unlock;
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return ret;
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
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if (ret < 0)
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goto err_unlock;
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return ret;
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
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err_unlock:
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mutex_unlock(&st->gpio_lock);
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return ret;
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return st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
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}
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static int ad5592r_gpio_request(struct gpio_chip *chip, unsigned offset)
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@@ -171,10 +158,9 @@ static int ad5592r_reset(struct ad5592r_state *st)
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udelay(1);
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gpiod_set_value(gpio, 1);
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} else {
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mutex_lock(&st->lock);
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/* Writing this magic value resets the device */
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st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
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mutex_unlock(&st->lock);
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scoped_guard(mutex, &st->lock)
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/* Writing this magic value resets the device */
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st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
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}
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udelay(250);
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@@ -249,46 +235,44 @@ static int ad5592r_set_channel_modes(struct ad5592r_state *st)
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}
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}
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mutex_lock(&st->lock);
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guard(mutex)(&st->lock);
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/* Pull down unused pins to GND */
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ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown);
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if (ret)
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goto err_unlock;
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return ret;
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ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate);
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if (ret)
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goto err_unlock;
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return ret;
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/* Configure pins that we use */
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ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac);
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if (ret)
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goto err_unlock;
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return ret;
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ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc);
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if (ret)
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goto err_unlock;
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return ret;
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ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
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if (ret)
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goto err_unlock;
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return ret;
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ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
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if (ret)
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goto err_unlock;
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return ret;
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ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
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if (ret)
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goto err_unlock;
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return ret;
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/* Verify that we can read back at least one register */
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ret = ops->reg_read(st, AD5592R_REG_ADC_EN, &read_back);
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if (!ret && (read_back & 0xff) != adc)
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ret = -EIO;
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return -EIO;
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err_unlock:
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mutex_unlock(&st->lock);
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return ret;
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return 0;
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}
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static int ad5592r_reset_channel_modes(struct ad5592r_state *st)
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@@ -305,7 +289,7 @@ static int ad5592r_write_raw(struct iio_dev *iio_dev,
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struct iio_chan_spec const *chan, int val, int val2, long mask)
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{
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struct ad5592r_state *st = iio_priv(iio_dev);
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int ret;
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int ret = 0;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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@@ -316,11 +300,11 @@ static int ad5592r_write_raw(struct iio_dev *iio_dev,
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if (!chan->output)
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return -EINVAL;
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mutex_lock(&st->lock);
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ret = st->ops->write_dac(st, chan->channel, val);
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if (!ret)
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st->cached_dac[chan->channel] = val;
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mutex_unlock(&st->lock);
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scoped_guard(mutex, &st->lock) {
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ret = st->ops->write_dac(st, chan->channel, val);
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if (!ret)
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st->cached_dac[chan->channel] = val;
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}
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return ret;
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case IIO_CHAN_INFO_SCALE:
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if (chan->type == IIO_VOLTAGE) {
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@@ -335,7 +319,7 @@ static int ad5592r_write_raw(struct iio_dev *iio_dev,
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else
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return -EINVAL;
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mutex_lock(&st->lock);
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guard(mutex)(&st->lock);
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ret = st->ops->reg_read(st, AD5592R_REG_CTRL,
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&st->cached_gp_ctrl);
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@@ -360,11 +344,8 @@ static int ad5592r_write_raw(struct iio_dev *iio_dev,
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~AD5592R_REG_CTRL_ADC_RANGE;
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}
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ret = st->ops->reg_write(st, AD5592R_REG_CTRL,
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st->cached_gp_ctrl);
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mutex_unlock(&st->lock);
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return ret;
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return st->ops->reg_write(st, AD5592R_REG_CTRL,
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st->cached_gp_ctrl);
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}
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break;
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default:
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@@ -379,15 +360,15 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev,
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int *val, int *val2, long m)
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{
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struct ad5592r_state *st = iio_priv(iio_dev);
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u16 read_val;
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int ret, mult;
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u16 read_val = 0;
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int ret = 0, mult = 0;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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if (!chan->output) {
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mutex_lock(&st->lock);
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ret = st->ops->read_adc(st, chan->channel, &read_val);
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mutex_unlock(&st->lock);
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scoped_guard(mutex, &st->lock)
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ret = st->ops->read_adc(st, chan->channel,
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&read_val);
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if (ret)
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return ret;
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@@ -400,9 +381,8 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev,
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read_val &= GENMASK(11, 0);
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} else {
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mutex_lock(&st->lock);
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read_val = st->cached_dac[chan->channel];
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mutex_unlock(&st->lock);
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scoped_guard(mutex, &st->lock)
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read_val = st->cached_dac[chan->channel];
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}
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dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
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@@ -420,35 +400,32 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev,
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return IIO_VAL_INT_PLUS_NANO;
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}
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mutex_lock(&st->lock);
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if (chan->output)
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mult = !!(st->cached_gp_ctrl &
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AD5592R_REG_CTRL_DAC_RANGE);
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else
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mult = !!(st->cached_gp_ctrl &
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AD5592R_REG_CTRL_ADC_RANGE);
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mutex_unlock(&st->lock);
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scoped_guard(mutex, &st->lock) {
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if (chan->output)
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mult = !!(st->cached_gp_ctrl &
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AD5592R_REG_CTRL_DAC_RANGE);
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else
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mult = !!(st->cached_gp_ctrl &
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AD5592R_REG_CTRL_ADC_RANGE);
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}
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*val *= ++mult;
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*val2 = chan->scan_type.realbits;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_CHAN_INFO_OFFSET:
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case IIO_CHAN_INFO_OFFSET: {
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ret = ad5592r_get_vref(st);
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mutex_lock(&st->lock);
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guard(mutex)(&st->lock);
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if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE)
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*val = (-34365 * 25) / ret;
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else
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*val = (-75365 * 25) / ret;
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mutex_unlock(&st->lock);
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return IIO_VAL_INT;
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}
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default:
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return -EINVAL;
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}
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