From 5c36aa6fda503b72a1b63e650abba62c46b96553 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Tue, 17 Nov 2015 17:02:55 -0300 Subject: [PATCH 1/5] ARM: dts: lpc18xx: add EEPROM memory node Add node for the NXP LPC18xx EEPROM memory which can be found in NXP LPC185x/3x and LPC435x/3x/2x/1x devices. Signed-off-by: Ariel D'Alessandro Signed-off-by: Joachim Eastwood --- arch/arm/boot/dts/lpc18xx.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi index 52591d83e8cd..053a1f54f4bb 100644 --- a/arch/arm/boot/dts/lpc18xx.dtsi +++ b/arch/arm/boot/dts/lpc18xx.dtsi @@ -166,6 +166,17 @@ lcdc: lcd-controller@40008000 { status = "disabled"; }; + eeprom: eeprom@4000e000 { + compatible = "nxp,lpc1857-eeprom"; + reg = <0x4000e000 0x1000>, <0x20040000 0x4000>; + reg-names = "reg", "mem"; + clocks = <&ccu1 CLK_CPU_EEPROM>; + clock-names = "eeprom"; + resets = <&rgu 27>; + interrupts = <4>; + status = "disabled"; + }; + mac: ethernet@40010000 { compatible = "nxp,lpc1850-dwmac", "snps,dwmac-3.611", "snps,dwmac"; reg = <0x40010000 0x2000>; From 7d775d34b181c1884827fac9f6d1dced83cbd344 Mon Sep 17 00:00:00 2001 From: Joachim Eastwood Date: Mon, 14 Dec 2015 23:03:50 +0100 Subject: [PATCH 2/5] ARM: dts: lpc4357: enable EEPROM memory Enable EEPROM for all LPC435x/3x/2x/1x controllers that include the 16 kB EEPROM device. Signed-off-by: Joachim Eastwood --- arch/arm/boot/dts/lpc4357.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/lpc4357.dtsi b/arch/arm/boot/dts/lpc4357.dtsi index fb9ecc754e8d..72f12db8d53a 100644 --- a/arch/arm/boot/dts/lpc4357.dtsi +++ b/arch/arm/boot/dts/lpc4357.dtsi @@ -37,3 +37,7 @@ sram2: sram@20000000 { }; }; }; + +&eeprom { + status = "okay"; +}; From a086dfe5bfd625cab32da405dfde877ab2f577a6 Mon Sep 17 00:00:00 2001 From: Joachim Eastwood Date: Sat, 24 Oct 2015 20:28:25 +0200 Subject: [PATCH 3/5] ARM: dts: lpc4357-ea4357: add mma7455 i2c accelerometer Add Freescale MMA7455 3-axis I2C accelerometer as found on Embedded Artists' LPC4357 Developer's Kit to the device tree. This makes it possible to access the accelerometer through the API provided by IIO. Signed-off-by: Joachim Eastwood --- arch/arm/boot/dts/lpc4357-ea4357-devkit.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts index 391121d24daa..079d3cf8c00b 100644 --- a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts +++ b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts @@ -467,6 +467,11 @@ &i2c0 { pinctrl-0 = <&i2c0_pins>; clock-frequency = <400000>; + mma7455@1d { + compatible = "fsl,mma7455"; + reg = <0x1d>; + }; + lm75@48 { compatible = "nxp,lm75"; reg = <0x48>; From 7888c8c12fb44ffc5bda08f0ae144b1cede8b4a3 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Mon, 23 Nov 2015 09:37:04 -0300 Subject: [PATCH 4/5] ARM: dts: lpc4337-ciaa: enable SCT-PWM Enable the PWM based on the State Configurable Timer (SCT) included in the LPC4337 SoC of the CIAA-NXP board. Signed-off-by: Ariel D'Alessandro Signed-off-by: Joachim Eastwood --- arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts index 5f500c1ad89c..f126b713b175 100644 --- a/arch/arm/boot/dts/lpc4337-ciaa.dts +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts @@ -166,6 +166,10 @@ &mac { pinctrl-0 = <&enet_rmii_pins>; }; +&sct_pwm { + status = "okay"; +}; + &ssp1 { status = "okay"; pinctrl-names = "default"; From 5743520806db4731cc30fad4cb2f01f0501a930c Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Mon, 23 Nov 2015 09:37:05 -0300 Subject: [PATCH 5/5] ARM: dts: lpc4337-ciaa: add i2c0 and devices Add I2C0 and two I2C EEPROM devices on the CIAA-NXP board: * 24AA1025 EEPROM, 1Mbit: it is accessed as two 512Kbit EEPROMs. * 24AA025E48 EEPROM, 2kbit. Signed-off-by: Ariel D'Alessandro Signed-off-by: Joachim Eastwood --- arch/arm/boot/dts/lpc4337-ciaa.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts index f126b713b175..5cfadb06c8df 100644 --- a/arch/arm/boot/dts/lpc4337-ciaa.dts +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts @@ -99,6 +99,14 @@ enet_mdc_cfg { }; }; + i2c0_pins: i2c0-pins { + i2c0_pins_cfg { + pins = "i2c0_scl", "i2c0_sda"; + function = "i2c0"; + input-enable; + }; + }; + ssp_pins: ssp-pins { ssp1_cs { pins = "p6_7"; @@ -159,6 +167,28 @@ &enet_tx_clk { clock-frequency = <50000000>; }; +&i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + clock-frequency = <400000>; + + eeprom@50 { + compatible = "microchip,24c512"; + reg = <0x50>; + }; + + eeprom@51 { + compatible = "microchip,24c02"; + reg = <0x51>; + }; + + eeprom@54 { + compatible = "microchip,24c512"; + reg = <0x54>; + }; +}; + &mac { status = "okay"; phy-mode = "rmii";