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Merge drm/drm-next into drm-misc-next

Browse Source 
Backmerging required to pull topic/phy-compliance.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
This commit is contained in:
Thomas Zimmermann
2020-04-17 08:12:22 +02:00
parent 13e3d94110 8f3d9f3542
commit 08d99b2c23
10045 changed files with 453864 additions and 215658 deletions
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2
include/acpi/acpi_bus.h
View File

@@ -80,7 +80,7 @@ bool acpi_dev_present(const char *hid, const char *uid, s64 hrv);
#ifdef CONFIG_ACPI
#include <linux/proc_fs.h>
struct proc_dir_entry;
#define ACPI_BUS_FILE_ROOT "acpi"
extern struct proc_dir_entry *acpi_root_dir;

4
include/acpi/acpixf.h
View File

@@ -12,7 +12,7 @@
/* Current ACPICA subsystem version in YYYYMMDD format */
#define ACPI_CA_VERSION 0x20200110
#define ACPI_CA_VERSION 0x20200326
#include <acpi/acconfig.h>
#include <acpi/actypes.h>
@@ -752,7 +752,7 @@ ACPI_HW_DEPENDENT_RETURN_UINT32(u32 acpi_dispatch_gpe(acpi_handle gpe_device, u3
ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status acpi_disable_all_gpes(void))
ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status acpi_enable_all_runtime_gpes(void))
ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status acpi_enable_all_wakeup_gpes(void))
ACPI_HW_DEPENDENT_RETURN_UINT32(u32 acpi_any_gpe_status_set(void))
ACPI_HW_DEPENDENT_RETURN_UINT32(u32 acpi_any_gpe_status_set(u32 gpe_skip_number))
ACPI_HW_DEPENDENT_RETURN_UINT32(u32 acpi_any_fixed_event_status_set(void))
ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status

2
include/acpi/actbl1.h
View File

@@ -862,7 +862,7 @@ enum acpi_erst_instructions {
/* Command status return values */
enum acpi_erst_command_status {
ACPI_ERST_SUCESS = 0,
ACPI_ERST_SUCCESS = 0,
ACPI_ERST_NO_SPACE = 1,
ACPI_ERST_NOT_AVAILABLE = 2,
ACPI_ERST_FAILURE = 3,

21
include/acpi/actbl2.h
View File

@@ -43,6 +43,7 @@
#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
#define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */
/*
* All tables must be byte-packed to match the ACPI specification, since
@@ -274,7 +275,8 @@ struct acpi_ivrs_header {
/* Values for subtable Type above */
enum acpi_ivrs_type {
ACPI_IVRS_TYPE_HARDWARE = 0x10,
ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
ACPI_IVRS_TYPE_MEMORY1 = 0x20,
ACPI_IVRS_TYPE_MEMORY2 = 0x21,
ACPI_IVRS_TYPE_MEMORY3 = 0x22
@@ -301,13 +303,26 @@ enum acpi_ivrs_type {
/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
struct acpi_ivrs_hardware {
struct acpi_ivrs_hardware_10 {
struct acpi_ivrs_header header;
u16 capability_offset; /* Offset for IOMMU control fields */
u64 base_address; /* IOMMU control registers */
u16 pci_segment_group;
u16 info; /* MSI number and unit ID */
u32 reserved;
u32 feature_reporting;
};
/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
struct acpi_ivrs_hardware_11 {
struct acpi_ivrs_header header;
u16 capability_offset; /* Offset for IOMMU control fields */
u64 base_address; /* IOMMU control registers */
u16 pci_segment_group;
u16 info; /* MSI number and unit ID */
u32 attributes;
u64 efr_register_image;
u64 reserved;
};
/* Masks for Info field above */

6
include/acpi/actbl3.h
View File

@@ -39,7 +39,7 @@
#define ACPI_SIG_WDDT "WDDT" /* Watchdog Timer Description Table */
#define ACPI_SIG_WDRT "WDRT" /* Watchdog Resource Table */
#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */
#define ACPI_SIG_WSMT "WSMT" /* Windows SMM Security Migrations Table */
#define ACPI_SIG_WSMT "WSMT" /* Windows SMM Security Mitigations Table */
#define ACPI_SIG_XENV "XENV" /* Xen Environment table */
#define ACPI_SIG_XXXX "XXXX" /* Intermediate AML header for ASL/ASL+ converter */
@@ -673,10 +673,10 @@ struct acpi_table_wpbt {
/*******************************************************************************
*
* WSMT - Windows SMM Security Migrations Table
* WSMT - Windows SMM Security Mitigations Table
* Version 1
*
* Conforms to "Windows SMM Security Migrations Table",
* Conforms to "Windows SMM Security Mitigations Table",
* Version 1.0, April 18, 2016
*
******************************************************************************/

2
include/acpi/acuuid.h
View File

@@ -57,4 +57,4 @@
#define UUID_THERMAL_EXTENSIONS "14d399cd-7a27-4b18-8fb4-7cb7b9f4e500"
#define UUID_DEVICE_PROPERTIES "daffd814-6eba-4d8c-8a91-bc9bbf4aa301"
#endif /* __AUUID_H__ */
#endif /* __ACUUID_H__ */

4
include/acpi/button.h
View File

@@ -2,6 +2,10 @@
#ifndef ACPI_BUTTON_H
#define ACPI_BUTTON_H
#define ACPI_BUTTON_HID_POWER "PNP0C0C"
#define ACPI_BUTTON_HID_LID "PNP0C0D"
#define ACPI_BUTTON_HID_SLEEP "PNP0C0E"
#if IS_ENABLED(CONFIG_ACPI_BUTTON)
extern int acpi_lid_open(void);
#else

8
include/acpi/processor.h
View File

@@ -297,6 +297,14 @@ static inline void acpi_processor_ffh_cstate_enter(struct acpi_processor_cx
}
#endif
static inline int call_on_cpu(int cpu, long (*fn)(void *), void *arg,
bool direct)
{
if (direct || (is_percpu_thread() && cpu == smp_processor_id()))
return fn(arg);
return work_on_cpu(cpu, fn, arg);
}
/* in processor_perflib.c */
#ifdef CONFIG_CPU_FREQ

52
include/asm-generic/Kbuild
View File

@@ -4,6 +4,58 @@
# (This file is not included when SRCARCH=um since UML borrows several
# asm headers from the host architecutre.)
mandatory-y += atomic.h
mandatory-y += barrier.h
mandatory-y += bitops.h
mandatory-y += bug.h
mandatory-y += bugs.h
mandatory-y += cacheflush.h
mandatory-y += checksum.h
mandatory-y += compat.h
mandatory-y += current.h
mandatory-y += delay.h
mandatory-y += device.h
mandatory-y += div64.h
mandatory-y += dma-contiguous.h
mandatory-y += dma-mapping.h
mandatory-y += dma.h
mandatory-y += emergency-restart.h
mandatory-y += exec.h
mandatory-y += fb.h
mandatory-y += ftrace.h
mandatory-y += futex.h
mandatory-y += hardirq.h
mandatory-y += hw_irq.h
mandatory-y += io.h
mandatory-y += irq.h
mandatory-y += irq_regs.h
mandatory-y += irq_work.h
mandatory-y += kdebug.h
mandatory-y += kmap_types.h
mandatory-y += kprobes.h
mandatory-y += linkage.h
mandatory-y += local.h
mandatory-y += mm-arch-hooks.h
mandatory-y += mmiowb.h
mandatory-y += mmu.h
mandatory-y += mmu_context.h
mandatory-y += module.h
mandatory-y += msi.h
mandatory-y += pci.h
mandatory-y += percpu.h
mandatory-y += pgalloc.h
mandatory-y += preempt.h
mandatory-y += sections.h
mandatory-y += serial.h
mandatory-y += shmparam.h
mandatory-y += simd.h
mandatory-y += switch_to.h
mandatory-y += timex.h
mandatory-y += tlbflush.h
mandatory-y += topology.h
mandatory-y += trace_clock.h
mandatory-y += uaccess.h
mandatory-y += unaligned.h
mandatory-y += vga.h
mandatory-y += word-at-a-time.h
mandatory-y += xor.h

5
include/asm-generic/bitops.h
View File

@@ -4,8 +4,9 @@
/*
* For the benefit of those who are trying to port Linux to another
* architecture, here are some C-language equivalents. You should
* recode these in the native assembly language, if at all possible.
* architecture, here are some C-language equivalents. They should
* generate reasonable code, so take a look at what your compiler spits
* out before rolling your own buggy implementation in assembly language.
*
* C language equivalents written by Theodore Ts'o, 9/26/92
*/

2
include/asm-generic/futex.h
View File

@@ -34,7 +34,6 @@ arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval, u32 __user *uaddr)
u32 tmp;
preempt_disable();
pagefault_disable();
ret = -EFAULT;
if (unlikely(get_user(oldval, uaddr) != 0))
@@ -67,7 +66,6 @@ arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval, u32 __user *uaddr)
ret = -EFAULT;
out_pagefault_enable:
pagefault_enable();
preempt_enable();
if (ret == 0)

4
include/asm-generic/gpio.h
View File

@@ -2,10 +2,8 @@
#ifndef _ASM_GENERIC_GPIO_H
#define _ASM_GENERIC_GPIO_H
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/of.h>
#ifdef CONFIG_GPIOLIB
@@ -140,6 +138,8 @@ static inline void gpio_unexport(unsigned gpio)
#else /* !CONFIG_GPIOLIB */
#include <linux/kernel.h>
static inline bool gpio_is_valid(int number)
{
/* only non-negative numbers are valid */

1
include/asm-generic/pgtable.h
View File

@@ -10,6 +10,7 @@
#include <linux/mm_types.h>
#include <linux/bug.h>
#include <linux/errno.h>
#include <asm-generic/pgtable_uffd.h>
#if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS

66
include/asm-generic/pgtable_uffd.h Normal file
View File

@@ -0,0 +1,66 @@
#ifndef _ASM_GENERIC_PGTABLE_UFFD_H
#define _ASM_GENERIC_PGTABLE_UFFD_H
#ifndef CONFIG_HAVE_ARCH_USERFAULTFD_WP
static __always_inline int pte_uffd_wp(pte_t pte)
{
return 0;
}
static __always_inline int pmd_uffd_wp(pmd_t pmd)
{
return 0;
}
static __always_inline pte_t pte_mkuffd_wp(pte_t pte)
{
return pte;
}
static __always_inline pmd_t pmd_mkuffd_wp(pmd_t pmd)
{
return pmd;
}
static __always_inline pte_t pte_clear_uffd_wp(pte_t pte)
{
return pte;
}
static __always_inline pmd_t pmd_clear_uffd_wp(pmd_t pmd)
{
return pmd;
}
static __always_inline pte_t pte_swp_mkuffd_wp(pte_t pte)
{
return pte;
}
static __always_inline int pte_swp_uffd_wp(pte_t pte)
{
return 0;
}
static __always_inline pte_t pte_swp_clear_uffd_wp(pte_t pte)
{
return pte;
}
static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd)
{
return pmd;
}
static inline int pmd_swp_uffd_wp(pmd_t pmd)
{
return 0;
}
static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd)
{
return pmd;
}
#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
#endif /* _ASM_GENERIC_PGTABLE_UFFD_H */

3
include/asm-generic/tlb.h
View File

@@ -13,6 +13,7 @@
#include <linux/mmu_notifier.h>
#include <linux/swap.h>
#include <linux/hugetlb_inline.h>
#include <asm/pgalloc.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
@@ -398,7 +399,7 @@ tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma)
* We rely on tlb_end_vma() to issue a flush, such that when we reset
* these values the batch is empty.
*/
tlb->vma_huge = !!(vma->vm_flags & VM_HUGETLB);
tlb->vma_huge = is_vm_hugetlb_page(vma);
tlb->vma_exec = !!(vma->vm_flags & VM_EXEC);
}

14
include/asm-generic/vdso/vsyscall.h
View File

@@ -11,20 +11,6 @@ static __always_inline struct vdso_data *__arch_get_k_vdso_data(void)
}
#endif /* __arch_get_k_vdso_data */
#ifndef __arch_update_vdso_data
static __always_inline bool __arch_update_vdso_data(void)
{
return true;
}
#endif /* __arch_update_vdso_data */
#ifndef __arch_get_clock_mode
static __always_inline int __arch_get_clock_mode(struct timekeeper *tk)
{
return 0;
}
#endif /* __arch_get_clock_mode */
#ifndef __arch_update_vsyscall
static __always_inline void __arch_update_vsyscall(struct vdso_data *vdata,
struct timekeeper *tk)

26
include/asm-generic/vmlinux.lds.h
View File

@@ -535,6 +535,7 @@
\
RO_EXCEPTION_TABLE \
NOTES \
BTF \
\
. = ALIGN((align)); \
__end_rodata = .;
@@ -621,6 +622,20 @@
__stop___ex_table = .; \
}
/*
* .BTF
*/
#ifdef CONFIG_DEBUG_INFO_BTF
#define BTF \
.BTF : AT(ADDR(.BTF) - LOAD_OFFSET) { \
__start_BTF = .; \
*(.BTF) \
__stop_BTF = .; \
}
#else
#define BTF
#endif
/*
* Init task
*/
@@ -894,10 +909,17 @@
* section definitions so that such archs put those in earlier section
* definitions.
*/
#ifdef RUNTIME_DISCARD_EXIT
#define EXIT_DISCARDS
#else
#define EXIT_DISCARDS \
EXIT_TEXT \
EXIT_DATA
#endif
#define DISCARDS \
/DISCARD/ : { \
EXIT_TEXT \
EXIT_DATA \
EXIT_DISCARDS \
EXIT_CALL \
*(.discard) \
*(.discard.*) \

7
include/clocksource/timer-ti-dm.h
View File

@@ -105,17 +105,17 @@ struct omap_dm_timer {
void __iomem *pend; /* write pending */
void __iomem *func_base; /* function register base */
atomic_t enabled;
unsigned long rate;
unsigned reserved:1;
unsigned posted:1;
struct timer_regs context;
int (*get_context_loss_count)(struct device *);
int ctx_loss_count;
int revision;
u32 capability;
u32 errata;
struct platform_device *pdev;
struct list_head node;
struct notifier_block nb;
};
int omap_dm_timer_reserve_systimer(int id);
@@ -248,8 +248,7 @@ int omap_dm_timers_active(void);
/*
* The below are inlined to optimize code size for system timers. Other code
* should not need these at all, see
* include/linux/platform_data/pwm_omap_dmtimer.h
* should not need these at all.
*/
#if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP2PLUS)
static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,

40
include/crypto/aead.h
View File

@@ -43,27 +43,33 @@
*
* Memory Structure:
*
* To support the needs of the most prominent user of AEAD ciphers, namely
* IPSEC, the AEAD ciphers have a special memory layout the caller must adhere
* to.
* The source scatterlist must contain the concatenation of
* associated data || plaintext or ciphertext.
*
* The scatter list pointing to the input data must contain:
* The destination scatterlist has the same layout, except that the plaintext
* (resp. ciphertext) will grow (resp. shrink) by the authentication tag size
* during encryption (resp. decryption).
*
* * for RFC4106 ciphers, the concatenation of
* associated authentication data || IV || plaintext or ciphertext. Note, the
* same IV (buffer) is also set with the aead_request_set_crypt call. Note,
* the API call of aead_request_set_ad must provide the length of the AAD and
* the IV. The API call of aead_request_set_crypt only points to the size of
* the input plaintext or ciphertext.
* In-place encryption/decryption is enabled by using the same scatterlist
* pointer for both the source and destination.
*
* * for "normal" AEAD ciphers, the concatenation of
* associated authentication data || plaintext or ciphertext.
* Even in the out-of-place case, space must be reserved in the destination for
* the associated data, even though it won't be written to. This makes the
* in-place and out-of-place cases more consistent. It is permissible for the
* "destination" associated data to alias the "source" associated data.
*
* It is important to note that if multiple scatter gather list entries form
* the input data mentioned above, the first entry must not point to a NULL
* buffer. If there is any potential where the AAD buffer can be NULL, the
* calling code must contain a precaution to ensure that this does not result
* in the first scatter gather list entry pointing to a NULL buffer.
* As with the other scatterlist crypto APIs, zero-length scatterlist elements
* are not allowed in the used part of the scatterlist. Thus, if there is no
* associated data, the first element must point to the plaintext/ciphertext.
*
* To meet the needs of IPsec, a special quirk applies to rfc4106, rfc4309,
* rfc4543, and rfc7539esp ciphers. For these ciphers, the final 'ivsize' bytes
* of the associated data buffer must contain a second copy of the IV. This is
* in addition to the copy passed to aead_request_set_crypt(). These two IV
* copies must not differ; different implementations of the same algorithm may
* behave differently in that case. Note that the algorithm might not actually
* treat the IV as associated data; nevertheless the length passed to
* aead_request_set_ad() must include it.
*/
struct crypto_aead;

2
include/crypto/if_alg.h
View File

@@ -66,7 +66,7 @@ struct af_alg_sgl {
struct af_alg_tsgl {
struct list_head list;
unsigned int cur; /* Last processed SG entry */
struct scatterlist sg[0]; /* Array of SGs forming the SGL */
struct scatterlist sg[]; /* Array of SGs forming the SGL */
};
#define MAX_SGL_ENTS ((4096 - sizeof(struct af_alg_tsgl)) / \

5
include/drm/bridge/analogix_dp.h
View File

@@ -42,9 +42,10 @@ int analogix_dp_resume(struct analogix_dp_device *dp);
int analogix_dp_suspend(struct analogix_dp_device *dp);
struct analogix_dp_device *
analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
struct analogix_dp_plat_data *plat_data);
analogix_dp_probe(struct device *dev, struct analogix_dp_plat_data *plat_data);
int analogix_dp_bind(struct analogix_dp_device *dp, struct drm_device *drm_dev);
void analogix_dp_unbind(struct analogix_dp_device *dp);
void analogix_dp_remove(struct analogix_dp_device *dp);
int analogix_dp_start_crc(struct drm_connector *connector);
int analogix_dp_stop_crc(struct drm_connector *connector);

4
include/drm/drm_dp_mst_helper.h
View File

@@ -81,7 +81,7 @@ struct drm_dp_vcpi {
* &drm_dp_mst_topology_mgr.base.lock.
* @num_sdp_stream_sinks: Number of stream sinks. Protected by
* &drm_dp_mst_topology_mgr.base.lock.
* @available_pbn: Available bandwidth for this port. Protected by
* @full_pbn: Max possible bandwidth for this port. Protected by
* &drm_dp_mst_topology_mgr.base.lock.
* @next: link to next port on this branch device
* @aux: i2c aux transport to talk to device connected to this port, protected
@@ -126,7 +126,7 @@ struct drm_dp_mst_port {
u8 dpcd_rev;
u8 num_sdp_streams;
u8 num_sdp_stream_sinks;
uint16_t available_pbn;
uint16_t full_pbn;
struct list_head next;
/**
* @mstb: the branch device connected to this port, if there is one.

9
include/drm/drm_file.h
View File

@@ -402,4 +402,13 @@ void drm_send_event(struct drm_device *dev, struct drm_pending_event *e);
struct file *mock_drm_getfile(struct drm_minor *minor, unsigned int flags);
#ifdef CONFIG_MMU
struct drm_vma_offset_manager;
unsigned long drm_get_unmapped_area(struct file *file,
unsigned long uaddr, unsigned long len,
unsigned long pgoff, unsigned long flags,
struct drm_vma_offset_manager *mgr);
#endif /* CONFIG_MMU */
#endif /* _DRM_FILE_H_ */

2
include/drm/drm_legacy.h
View File

@@ -136,7 +136,7 @@ struct drm_sg_mem {
* Kernel side of a mapping
*/
struct drm_local_map {
resource_size_t offset; /**< Requested physical address (0 for SAREA)*/
dma_addr_t offset; /**< Requested physical address (0 for SAREA)*/
unsigned long size; /**< Requested physical size (bytes) */
enum drm_map_type type; /**< Type of memory to map */
enum drm_map_flags flags; /**< Flags */

3
include/drm/ttm/ttm_bo_api.h
View File

@@ -727,7 +727,8 @@ vm_fault_t ttm_bo_vm_reserve(struct ttm_buffer_object *bo,
vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf,
pgprot_t prot,
pgoff_t num_prefault);
pgoff_t num_prefault,
pgoff_t fault_page_size);
vm_fault_t ttm_bo_vm_fault(struct vm_fault *vmf);

37
include/dt-bindings/arm/coresight-cti-dt.h Normal file
View File

@@ -0,0 +1,37 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* This header provides constants for the defined trigger signal
* types on CoreSight CTI.
*/
#ifndef _DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H
#define _DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H
#define GEN_IO 0
#define GEN_INTREQ 1
#define GEN_INTACK 2
#define GEN_HALTREQ 3
#define GEN_RESTARTREQ 4
#define PE_EDBGREQ 5
#define PE_DBGRESTART 6
#define PE_CTIIRQ 7
#define PE_PMUIRQ 8
#define PE_DBGTRIGGER 9
#define ETM_EXTOUT 10
#define ETM_EXTIN 11
#define SNK_FULL 12
#define SNK_ACQCOMP 13
#define SNK_FLUSHCOMP 14
#define SNK_FLUSHIN 15
#define SNK_TRIGIN 16
#define STM_ASYNCOUT 17
#define STM_TOUT_SPTE 18
#define STM_TOUT_SW 19
#define STM_TOUT_HETE 20
#define STM_HWEVENT 21
#define ELA_TSTART 22
#define ELA_TSTOP 23
#define ELA_DBGREQ 24
#define CTI_TRIG_MAX 25
#endif /*_DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H */

4
include/dt-bindings/bus/ti-sysc.h
View File

@@ -18,6 +18,10 @@
#define SYSC_DRA7_MCAN_ENAWAKEUP (1 << 4)
/* PRUSS sysc found on AM33xx/AM43xx/AM57xx */
#define SYSC_PRUSS_SUB_MWAIT (1 << 5)
#define SYSC_PRUSS_STANDBY_INIT (1 << 4)
/* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */
#define SYSC_IDLE_FORCE 0
#define SYSC_IDLE_NO 1

5
include/dt-bindings/clock/dm814.h
View File

@@ -34,4 +34,9 @@
#define DM814_MMC2_CLKCTRL DM814_CLKCTRL_INDEX(0x220)
#define DM814_MMC3_CLKCTRL DM814_CLKCTRL_INDEX(0x224)
/* alwon_ethernet clocks */
#define DM814_ETHERNET_CLKCTRL_OFFSET 0x1d4
#define DM814_ETHERNET_CLKCTRL_INDEX(offset) ((offset) - DM814_ETHERNET_CLKCTRL_OFFSET)
#define DM814_ETHERNET_CPGMAC0_CLKCTRL DM814_ETHERNET_CLKCTRL_INDEX(0x1d4)
#endif

2
include/dt-bindings/clock/g12a-clkc.h
View File

@@ -143,5 +143,7 @@
#define CLKID_CPU1_CLK 253
#define CLKID_CPU2_CLK 254
#define CLKID_CPU3_CLK 255
#define CLKID_SPICC0_SCLK 258
#define CLKID_SPICC1_SCLK 261
#endif /* __G12A_CLKC_H */

1
include/dt-bindings/clock/gxbb-clkc.h
View File

@@ -146,5 +146,6 @@
#define CLKID_CTS_VDAC 201
#define CLKID_HDMI_TX 202
#define CLKID_HDMI 205
#define CLKID_ACODEC 206
#endif /* __GXBB_CLKC_H */

3
include/dt-bindings/clock/imx7d-clock.h
View File

@@ -451,5 +451,6 @@
#define IMX7D_SNVS_CLK 442
#define IMX7D_CAAM_CLK 443
#define IMX7D_KPP_ROOT_CLK 444
#define IMX7D_CLK_END 445
#define IMX7D_PXP_CLK 445
#define IMX7D_CLK_END 446
#endif /* __DT_BINDINGS_CLOCK_IMX7D_H */

11
include/dt-bindings/clock/imx8mm-clock.h
View File

@@ -265,6 +265,15 @@
#define IMX8MM_SYS_PLL2_333M_CG 244
#define IMX8MM_SYS_PLL2_500M_CG 245
#define IMX8MM_CLK_END 246
#define IMX8MM_CLK_M4_CORE 246
#define IMX8MM_CLK_VPU_CORE 247
#define IMX8MM_CLK_GPU3D_CORE 248
#define IMX8MM_CLK_GPU2D_CORE 249
#define IMX8MM_CLK_CLKO2 250
#define IMX8MM_CLK_A53_CORE 251
#define IMX8MM_CLK_END 252
#endif

12
include/dt-bindings/clock/imx8mn-clock.h
View File

@@ -122,8 +122,8 @@
#define IMX8MN_CLK_I2C1 105
#define IMX8MN_CLK_I2C2 106
#define IMX8MN_CLK_I2C3 107
#define IMX8MN_CLK_I2C4 118
#define IMX8MN_CLK_UART1 119
#define IMX8MN_CLK_I2C4 108
#define IMX8MN_CLK_UART1 109
#define IMX8MN_CLK_UART2 110
#define IMX8MN_CLK_UART3 111
#define IMX8MN_CLK_UART4 112
@@ -228,6 +228,12 @@
#define IMX8MN_SYS_PLL2_333M_CG 209
#define IMX8MN_SYS_PLL2_500M_CG 210
#define IMX8MN_CLK_END 211
#define IMX8MN_CLK_SNVS_ROOT 211
#define IMX8MN_CLK_GPU_CORE 212
#define IMX8MN_CLK_GPU_SHADER 213
#define IMX8MN_CLK_A53_CORE 214
#define IMX8MN_CLK_END 215
#endif

5
include/dt-bindings/clock/imx8mp-clock.h
View File

@@ -173,7 +173,7 @@
#define IMX8MP_CLK_IPP_DO_CLKO1 164
#define IMX8MP_CLK_IPP_DO_CLKO2 165
#define IMX8MP_CLK_HDMI_FDCC_TST 166
#define IMX8MP_CLK_HDMI_27M 167
#define IMX8MP_CLK_HDMI_24M 167
#define IMX8MP_CLK_HDMI_REF_266M 168
#define IMX8MP_CLK_USDHC3 169
#define IMX8MP_CLK_MEDIA_CAM1_PIX 170
@@ -294,7 +294,8 @@
#define IMX8MP_CLK_DRAM_ALT_ROOT 285
#define IMX8MP_CLK_DRAM_CORE 286
#define IMX8MP_CLK_ARM 287
#define IMX8MP_CLK_A53_CORE 288
#define IMX8MP_CLK_END 288
#define IMX8MP_CLK_END 289
#endif

9
include/dt-bindings/clock/imx8mq-clock.h
View File

@@ -424,6 +424,13 @@
#define IMX8MQ_SYS2_PLL_500M_CG 283
#define IMX8MQ_SYS2_PLL_1000M_CG 284
#define IMX8MQ_CLK_END 285
#define IMX8MQ_CLK_GPU_CORE 285
#define IMX8MQ_CLK_GPU_SHADER 286
#define IMX8MQ_CLK_M4_CORE 287
#define IMX8MQ_CLK_VPU_CORE 288
#define IMX8MQ_CLK_A53_CORE 289
#define IMX8MQ_CLK_END 290
#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */

20
include/dt-bindings/clock/k210-clk.h Normal file
View File

@@ -0,0 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
* Copyright (c) 2020 Western Digital Corporation or its affiliates.
*/
#ifndef K210_CLK_H
#define K210_CLK_H
/*
* Arbitrary identifiers for clocks.
* The structure is: in0 -> pll0 -> aclk -> cpu
*
* Since we use the hardware defaults for now, set all these to the same clock.
*/
#define K210_CLK_PLL0 0
#define K210_CLK_PLL1 0
#define K210_CLK_ACLK 0
#define K210_CLK_CPU 0
#endif /* K210_CLK_H */

13
include/dt-bindings/clock/marvell,mmp2.h
View File

@@ -26,6 +26,9 @@
#define MMP2_CLK_VCTCXO_4 25
#define MMP2_CLK_UART_PLL 26
#define MMP2_CLK_USB_PLL 27
#define MMP3_CLK_PLL1_P 28
#define MMP3_CLK_PLL2_P 29
#define MMP3_CLK_PLL3 30
/* apb periphrals */
#define MMP2_CLK_TWSI0 60
@@ -50,6 +53,10 @@
#define MMP2_CLK_SSP2 79
#define MMP2_CLK_SSP3 80
#define MMP2_CLK_TIMER 81
#define MMP2_CLK_THERMAL0 82
#define MMP3_CLK_THERMAL1 83
#define MMP3_CLK_THERMAL2 84
#define MMP3_CLK_THERMAL3 85
/* axi periphrals */
#define MMP2_CLK_SDH0 101
@@ -74,6 +81,12 @@
#define MMP2_CLK_DISP0_LCDC 120
#define MMP2_CLK_USBHSIC0 121
#define MMP2_CLK_USBHSIC1 122
#define MMP2_CLK_GPU_BUS 123
#define MMP3_CLK_GPU_BUS MMP2_CLK_GPU_BUS
#define MMP2_CLK_GPU_3D 124
#define MMP3_CLK_GPU_3D MMP2_CLK_GPU_3D
#define MMP3_CLK_GPU_2D 125
#define MMP3_CLK_SDH4 126
#define MMP2_NR_CLKS 200
#endif

7
include/dt-bindings/clock/qcom,gcc-sc7180.h
View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_GCC_SC7180_H
@@ -132,6 +132,11 @@
#define GCC_VIDEO_GPLL0_DIV_CLK_SRC 122
#define GCC_VIDEO_THROTTLE_AXI_CLK 123
#define GCC_VIDEO_XO_CLK 124
#define GCC_MSS_CFG_AHB_CLK 125
#define GCC_MSS_MFAB_AXIS_CLK 126
#define GCC_MSS_NAV_AXI_CLK 127
#define GCC_MSS_Q6_MEMNOC_AXI_CLK 128
#define GCC_MSS_SNOC_AXI_CLK 129
/* GCC resets */
#define GCC_QUSB2PHY_PRIM_BCR 0

4
include/dt-bindings/clock/qcom,gcc-sm8150.h
View File

@@ -240,4 +240,8 @@
#define GCC_USB30_SEC_BCR 27
#define GCC_USB_PHY_CFG_AHB2PHY_BCR 28
/* GCC GDSCRs */
#define USB30_PRIM_GDSC 4
#define USB30_SEC_GDSC 5
#endif

271
include/dt-bindings/clock/qcom,gcc-sm8250.h Normal file
View File

@@ -0,0 +1,271 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_GCC_SM8250_H
#define _DT_BINDINGS_CLK_QCOM_GCC_SM8250_H
/* GCC clocks */
#define GPLL0 0
#define GPLL0_OUT_EVEN 1
#define GPLL4 2
#define GPLL9 3
#define GCC_AGGRE_NOC_PCIE_TBU_CLK 4
#define GCC_AGGRE_UFS_CARD_AXI_CLK 5
#define GCC_AGGRE_UFS_PHY_AXI_CLK 6
#define GCC_AGGRE_USB3_PRIM_AXI_CLK 7
#define GCC_AGGRE_USB3_SEC_AXI_CLK 8
#define GCC_BOOT_ROM_AHB_CLK 9
#define GCC_CAMERA_AHB_CLK 10
#define GCC_CAMERA_HF_AXI_CLK 11
#define GCC_CAMERA_SF_AXI_CLK 12
#define GCC_CAMERA_XO_CLK 13
#define GCC_CFG_NOC_USB3_PRIM_AXI_CLK 14
#define GCC_CFG_NOC_USB3_SEC_AXI_CLK 15
#define GCC_CPUSS_AHB_CLK 16
#define GCC_CPUSS_AHB_CLK_SRC 17
#define GCC_CPUSS_AHB_POSTDIV_CLK_SRC 18
#define GCC_CPUSS_DVM_BUS_CLK 19
#define GCC_CPUSS_RBCPR_CLK 20
#define GCC_DDRSS_GPU_AXI_CLK 21
#define GCC_DDRSS_PCIE_SF_TBU_CLK 22
#define GCC_DISP_AHB_CLK 23
#define GCC_DISP_HF_AXI_CLK 24
#define GCC_DISP_SF_AXI_CLK 25
#define GCC_DISP_XO_CLK 26
#define GCC_GP1_CLK 27
#define GCC_GP1_CLK_SRC 28
#define GCC_GP2_CLK 29
#define GCC_GP2_CLK_SRC 30
#define GCC_GP3_CLK 31
#define GCC_GP3_CLK_SRC 32
#define GCC_GPU_CFG_AHB_CLK 33
#define GCC_GPU_GPLL0_CLK_SRC 34
#define GCC_GPU_GPLL0_DIV_CLK_SRC 35
#define GCC_GPU_IREF_EN 36
#define GCC_GPU_MEMNOC_GFX_CLK 37
#define GCC_GPU_SNOC_DVM_GFX_CLK 38
#define GCC_NPU_AXI_CLK 39
#define GCC_NPU_BWMON_AXI_CLK 40
#define GCC_NPU_BWMON_CFG_AHB_CLK 41
#define GCC_NPU_CFG_AHB_CLK 42
#define GCC_NPU_DMA_CLK 43
#define GCC_NPU_GPLL0_CLK_SRC 44
#define GCC_NPU_GPLL0_DIV_CLK_SRC 45
#define GCC_PCIE0_PHY_REFGEN_CLK 46
#define GCC_PCIE1_PHY_REFGEN_CLK 47
#define GCC_PCIE2_PHY_REFGEN_CLK 48
#define GCC_PCIE_0_AUX_CLK 49
#define GCC_PCIE_0_AUX_CLK_SRC 50
#define GCC_PCIE_0_CFG_AHB_CLK 51
#define GCC_PCIE_0_MSTR_AXI_CLK 52
#define GCC_PCIE_0_PIPE_CLK 53
#define GCC_PCIE_0_SLV_AXI_CLK 54
#define GCC_PCIE_0_SLV_Q2A_AXI_CLK 55
#define GCC_PCIE_1_AUX_CLK 56
#define GCC_PCIE_1_AUX_CLK_SRC 57
#define GCC_PCIE_1_CFG_AHB_CLK 58
#define GCC_PCIE_1_MSTR_AXI_CLK 59
#define GCC_PCIE_1_PIPE_CLK 60
#define GCC_PCIE_1_SLV_AXI_CLK 61
#define GCC_PCIE_1_SLV_Q2A_AXI_CLK 62
#define GCC_PCIE_2_AUX_CLK 63
#define GCC_PCIE_2_AUX_CLK_SRC 64
#define GCC_PCIE_2_CFG_AHB_CLK 65
#define GCC_PCIE_2_MSTR_AXI_CLK 66
#define GCC_PCIE_2_PIPE_CLK 67
#define GCC_PCIE_2_SLV_AXI_CLK 68
#define GCC_PCIE_2_SLV_Q2A_AXI_CLK 69
#define GCC_PCIE_MDM_CLKREF_EN 70
#define GCC_PCIE_PHY_AUX_CLK 71
#define GCC_PCIE_PHY_REFGEN_CLK_SRC 72
#define GCC_PCIE_WIFI_CLKREF_EN 73
#define GCC_PCIE_WIGIG_CLKREF_EN 74
#define GCC_PDM2_CLK 75
#define GCC_PDM2_CLK_SRC 76
#define GCC_PDM_AHB_CLK 77
#define GCC_PDM_XO4_CLK 78
#define GCC_PRNG_AHB_CLK 79
#define GCC_QMIP_CAMERA_NRT_AHB_CLK 80
#define GCC_QMIP_CAMERA_RT_AHB_CLK 81
#define GCC_QMIP_DISP_AHB_CLK 82
#define GCC_QMIP_VIDEO_CVP_AHB_CLK 83
#define GCC_QMIP_VIDEO_VCODEC_AHB_CLK 84
#define GCC_QUPV3_WRAP0_CORE_2X_CLK 85
#define GCC_QUPV3_WRAP0_CORE_CLK 86
#define GCC_QUPV3_WRAP0_S0_CLK 87
#define GCC_QUPV3_WRAP0_S0_CLK_SRC 88
#define GCC_QUPV3_WRAP0_S1_CLK 89
#define GCC_QUPV3_WRAP0_S1_CLK_SRC 90
#define GCC_QUPV3_WRAP0_S2_CLK 91
#define GCC_QUPV3_WRAP0_S2_CLK_SRC 92
#define GCC_QUPV3_WRAP0_S3_CLK 93
#define GCC_QUPV3_WRAP0_S3_CLK_SRC 94
#define GCC_QUPV3_WRAP0_S4_CLK 95
#define GCC_QUPV3_WRAP0_S4_CLK_SRC 96
#define GCC_QUPV3_WRAP0_S5_CLK 97
#define GCC_QUPV3_WRAP0_S5_CLK_SRC 98
#define GCC_QUPV3_WRAP0_S6_CLK 99
#define GCC_QUPV3_WRAP0_S6_CLK_SRC 100
#define GCC_QUPV3_WRAP0_S7_CLK 101
#define GCC_QUPV3_WRAP0_S7_CLK_SRC 102
#define GCC_QUPV3_WRAP1_CORE_2X_CLK 103
#define GCC_QUPV3_WRAP1_CORE_CLK 104
#define GCC_QUPV3_WRAP1_S0_CLK 105
#define GCC_QUPV3_WRAP1_S0_CLK_SRC 106
#define GCC_QUPV3_WRAP1_S1_CLK 107
#define GCC_QUPV3_WRAP1_S1_CLK_SRC 108
#define GCC_QUPV3_WRAP1_S2_CLK 109
#define GCC_QUPV3_WRAP1_S2_CLK_SRC 110
#define GCC_QUPV3_WRAP1_S3_CLK 111
#define GCC_QUPV3_WRAP1_S3_CLK_SRC 112
#define GCC_QUPV3_WRAP1_S4_CLK 113
#define GCC_QUPV3_WRAP1_S4_CLK_SRC 114
#define GCC_QUPV3_WRAP1_S5_CLK 115
#define GCC_QUPV3_WRAP1_S5_CLK_SRC 116
#define GCC_QUPV3_WRAP2_CORE_2X_CLK 117
#define GCC_QUPV3_WRAP2_CORE_CLK 118
#define GCC_QUPV3_WRAP2_S0_CLK 119
#define GCC_QUPV3_WRAP2_S0_CLK_SRC 120
#define GCC_QUPV3_WRAP2_S1_CLK 121
#define GCC_QUPV3_WRAP2_S1_CLK_SRC 122
#define GCC_QUPV3_WRAP2_S2_CLK 123
#define GCC_QUPV3_WRAP2_S2_CLK_SRC 124
#define GCC_QUPV3_WRAP2_S3_CLK 125
#define GCC_QUPV3_WRAP2_S3_CLK_SRC 126
#define GCC_QUPV3_WRAP2_S4_CLK 127
#define GCC_QUPV3_WRAP2_S4_CLK_SRC 128
#define GCC_QUPV3_WRAP2_S5_CLK 129
#define GCC_QUPV3_WRAP2_S5_CLK_SRC 130
#define GCC_QUPV3_WRAP_0_M_AHB_CLK 131
#define GCC_QUPV3_WRAP_0_S_AHB_CLK 132
#define GCC_QUPV3_WRAP_1_M_AHB_CLK 133
#define GCC_QUPV3_WRAP_1_S_AHB_CLK 134
#define GCC_QUPV3_WRAP_2_M_AHB_CLK 135
#define GCC_QUPV3_WRAP_2_S_AHB_CLK 136
#define GCC_SDCC2_AHB_CLK 137
#define GCC_SDCC2_APPS_CLK 138
#define GCC_SDCC2_APPS_CLK_SRC 139
#define GCC_SDCC4_AHB_CLK 140
#define GCC_SDCC4_APPS_CLK 141
#define GCC_SDCC4_APPS_CLK_SRC 142
#define GCC_SYS_NOC_CPUSS_AHB_CLK 143
#define GCC_TSIF_AHB_CLK 144
#define GCC_TSIF_INACTIVITY_TIMERS_CLK 145
#define GCC_TSIF_REF_CLK 146
#define GCC_TSIF_REF_CLK_SRC 147
#define GCC_UFS_1X_CLKREF_EN 148
#define GCC_UFS_CARD_AHB_CLK 149
#define GCC_UFS_CARD_AXI_CLK 150
#define GCC_UFS_CARD_AXI_CLK_SRC 151
#define GCC_UFS_CARD_ICE_CORE_CLK 152
#define GCC_UFS_CARD_ICE_CORE_CLK_SRC 153
#define GCC_UFS_CARD_PHY_AUX_CLK 154
#define GCC_UFS_CARD_PHY_AUX_CLK_SRC 155
#define GCC_UFS_CARD_RX_SYMBOL_0_CLK 156
#define GCC_UFS_CARD_RX_SYMBOL_1_CLK 157
#define GCC_UFS_CARD_TX_SYMBOL_0_CLK 158
#define GCC_UFS_CARD_UNIPRO_CORE_CLK 159
#define GCC_UFS_CARD_UNIPRO_CORE_CLK_SRC 160
#define GCC_UFS_PHY_AHB_CLK 161
#define GCC_UFS_PHY_AXI_CLK 162
#define GCC_UFS_PHY_AXI_CLK_SRC 163
#define GCC_UFS_PHY_ICE_CORE_CLK 164
#define GCC_UFS_PHY_ICE_CORE_CLK_SRC 165
#define GCC_UFS_PHY_PHY_AUX_CLK 166
#define GCC_UFS_PHY_PHY_AUX_CLK_SRC 167
#define GCC_UFS_PHY_RX_SYMBOL_0_CLK 168
#define GCC_UFS_PHY_RX_SYMBOL_1_CLK 169
#define GCC_UFS_PHY_TX_SYMBOL_0_CLK 170
#define GCC_UFS_PHY_UNIPRO_CORE_CLK 171
#define GCC_UFS_PHY_UNIPRO_CORE_CLK_SRC 172
#define GCC_USB30_PRIM_MASTER_CLK 173
#define GCC_USB30_PRIM_MASTER_CLK_SRC 174
#define GCC_USB30_PRIM_MOCK_UTMI_CLK 175
#define GCC_USB30_PRIM_MOCK_UTMI_CLK_SRC 176
#define GCC_USB30_PRIM_MOCK_UTMI_POSTDIV_CLK_SRC 177
#define GCC_USB30_PRIM_SLEEP_CLK 178
#define GCC_USB30_SEC_MASTER_CLK 179
#define GCC_USB30_SEC_MASTER_CLK_SRC 180
#define GCC_USB30_SEC_MOCK_UTMI_CLK 181
#define GCC_USB30_SEC_MOCK_UTMI_CLK_SRC 182
#define GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC 183
#define GCC_USB30_SEC_SLEEP_CLK 184
#define GCC_USB3_PRIM_PHY_AUX_CLK 185
#define GCC_USB3_PRIM_PHY_AUX_CLK_SRC 186
#define GCC_USB3_PRIM_PHY_COM_AUX_CLK 187
#define GCC_USB3_PRIM_PHY_PIPE_CLK 188
#define GCC_USB3_PRIM_PHY_PIPE_CLK_SRC 189
#define GCC_USB3_SEC_CLKREF_EN 190
#define GCC_USB3_SEC_PHY_AUX_CLK 191
#define GCC_USB3_SEC_PHY_AUX_CLK_SRC 192
#define GCC_USB3_SEC_PHY_COM_AUX_CLK 193
#define GCC_USB3_SEC_PHY_PIPE_CLK 194
#define GCC_USB3_SEC_PHY_PIPE_CLK_SRC 195
#define GCC_VIDEO_AHB_CLK 196
#define GCC_VIDEO_AXI0_CLK 197
#define GCC_VIDEO_AXI1_CLK 198
#define GCC_VIDEO_XO_CLK 199
/* GCC resets */
#define GCC_GPU_BCR 0
#define GCC_MMSS_BCR 1
#define GCC_NPU_BWMON_BCR 2
#define GCC_NPU_BCR 3
#define GCC_PCIE_0_BCR 4
#define GCC_PCIE_0_LINK_DOWN_BCR 5
#define GCC_PCIE_0_NOCSR_COM_PHY_BCR 6
#define GCC_PCIE_0_PHY_BCR 7
#define GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR 8
#define GCC_PCIE_1_BCR 9
#define GCC_PCIE_1_LINK_DOWN_BCR 10
#define GCC_PCIE_1_NOCSR_COM_PHY_BCR 11
#define GCC_PCIE_1_PHY_BCR 12
#define GCC_PCIE_1_PHY_NOCSR_COM_PHY_BCR 13
#define GCC_PCIE_2_BCR 14
#define GCC_PCIE_2_LINK_DOWN_BCR 15
#define GCC_PCIE_2_NOCSR_COM_PHY_BCR 16
#define GCC_PCIE_2_PHY_BCR 17
#define GCC_PCIE_2_PHY_NOCSR_COM_PHY_BCR 18
#define GCC_PCIE_PHY_BCR 19
#define GCC_PCIE_PHY_CFG_AHB_BCR 20
#define GCC_PCIE_PHY_COM_BCR 21
#define GCC_PDM_BCR 22
#define GCC_PRNG_BCR 23
#define GCC_QUPV3_WRAPPER_0_BCR 24
#define GCC_QUPV3_WRAPPER_1_BCR 25
#define GCC_QUPV3_WRAPPER_2_BCR 26
#define GCC_QUSB2PHY_PRIM_BCR 27
#define GCC_QUSB2PHY_SEC_BCR 28
#define GCC_SDCC2_BCR 29
#define GCC_SDCC4_BCR 30
#define GCC_TSIF_BCR 31
#define GCC_UFS_CARD_BCR 32
#define GCC_UFS_PHY_BCR 33
#define GCC_USB30_PRIM_BCR 34
#define GCC_USB30_SEC_BCR 35
#define GCC_USB3_DP_PHY_PRIM_BCR 36
#define GCC_USB3_DP_PHY_SEC_BCR 37
#define GCC_USB3_PHY_PRIM_BCR 38
#define GCC_USB3_PHY_SEC_BCR 39
#define GCC_USB3PHY_PHY_PRIM_BCR 40
#define GCC_USB3PHY_PHY_SEC_BCR 41
#define GCC_USB_PHY_CFG_AHB2PHY_BCR 42
#define GCC_VIDEO_AXI0_CLK_ARES 43
#define GCC_VIDEO_AXI1_CLK_ARES 44
/* GCC power domains */
#define PCIE_0_GDSC 0
#define PCIE_1_GDSC 1
#define PCIE_2_GDSC 2
#define UFS_CARD_GDSC 3
#define UFS_PHY_GDSC 4
#define USB30_PRIM_GDSC 5
#define USB30_SEC_GDSC 6
#define HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC 7
#define HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC 8
#define HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC 9
#define HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC 10
#endif

3
include/dt-bindings/clock/qcom,gpucc-sc7180.h
View File

@@ -15,7 +15,8 @@
#define GPU_CC_CXO_CLK 6
#define GPU_CC_GMU_CLK_SRC 7
/* CAM_CC GDSCRs */
/* GPU_CC GDSCRs */
#define CX_GDSC 0
#define GX_GDSC 1
#endif

12
include/dt-bindings/clock/qcom,mss-sc7180.h Normal file
View File

@@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_MSS_SC7180_H
#define _DT_BINDINGS_CLK_QCOM_MSS_SC7180_H
#define MSS_AXI_CRYPTO_CLK 0
#define MSS_AXI_NAV_CLK 1
#endif

4
include/dt-bindings/clock/qcom,rpmcc.h
View File

@@ -37,6 +37,10 @@
#define RPM_XO_A0 27
#define RPM_XO_A1 28
#define RPM_XO_A2 29
#define RPM_NSS_FABRIC_0_CLK 30
#define RPM_NSS_FABRIC_0_A_CLK 31
#define RPM_NSS_FABRIC_1_CLK 32
#define RPM_NSS_FABRIC_1_A_CLK 33
/* SMD RPM clocks */
#define RPM_SMD_XO_CLK_SRC 0

4
include/dt-bindings/clock/qcom,rpmh.h
View File

@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
/* Copyright (c) 2018, 2020, The Linux Foundation. All rights reserved. */
#ifndef _DT_BINDINGS_CLK_MSM_RPMH_H
@@ -19,5 +19,7 @@
#define RPMH_RF_CLK3 10
#define RPMH_RF_CLK3_A 11
#define RPMH_IPA_CLK 12
#define RPMH_LN_BB_CLK1 13
#define RPMH_LN_BB_CLK1_A 14
#endif

334
include/dt-bindings/clock/sprd,sc9863a-clk.h Normal file
View File

@@ -0,0 +1,334 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Unisoc SC9863A platform clocks
*
* Copyright (C) 2019, Unisoc Communications Inc.
*/
#ifndef _DT_BINDINGS_CLK_SC9863A_H_
#define _DT_BINDINGS_CLK_SC9863A_H_
#define CLK_MPLL0_GATE 0
#define CLK_DPLL0_GATE 1
#define CLK_LPLL_GATE 2
#define CLK_GPLL_GATE 3
#define CLK_DPLL1_GATE 4
#define CLK_MPLL1_GATE 5
#define CLK_MPLL2_GATE 6
#define CLK_ISPPLL_GATE 7
#define CLK_PMU_APB_NUM (CLK_ISPPLL_GATE + 1)
#define CLK_AUDIO_GATE 0
#define CLK_RPLL 1
#define CLK_RPLL_390M 2
#define CLK_RPLL_260M 3
#define CLK_RPLL_195M 4
#define CLK_RPLL_26M 5
#define CLK_ANLG_PHY_G5_NUM (CLK_RPLL_26M + 1)
#define CLK_TWPLL 0
#define CLK_TWPLL_768M 1
#define CLK_TWPLL_384M 2
#define CLK_TWPLL_192M 3
#define CLK_TWPLL_96M 4
#define CLK_TWPLL_48M 5
#define CLK_TWPLL_24M 6
#define CLK_TWPLL_12M 7
#define CLK_TWPLL_512M 8
#define CLK_TWPLL_256M 9
#define CLK_TWPLL_128M 10
#define CLK_TWPLL_64M 11
#define CLK_TWPLL_307M2 12
#define CLK_TWPLL_219M4 13
#define CLK_TWPLL_170M6 14
#define CLK_TWPLL_153M6 15
#define CLK_TWPLL_76M8 16
#define CLK_TWPLL_51M2 17
#define CLK_TWPLL_38M4 18
#define CLK_TWPLL_19M2 19
#define CLK_LPLL 20
#define CLK_LPLL_409M6 21
#define CLK_LPLL_245M76 22
#define CLK_GPLL 23
#define CLK_ISPPLL 24
#define CLK_ISPPLL_468M 25
#define CLK_ANLG_PHY_G1_NUM (CLK_ISPPLL_468M + 1)
#define CLK_DPLL0 0
#define CLK_DPLL1 1
#define CLK_DPLL0_933M 2
#define CLK_DPLL0_622M3 3
#define CLK_DPLL0_400M 4
#define CLK_DPLL0_266M7 5
#define CLK_DPLL0_123M1 6
#define CLK_DPLL0_50M 7
#define CLK_ANLG_PHY_G7_NUM (CLK_DPLL0_50M + 1)
#define CLK_MPLL0 0
#define CLK_MPLL1 1
#define CLK_MPLL2 2
#define CLK_MPLL2_675M 3
#define CLK_ANLG_PHY_G4_NUM (CLK_MPLL2_675M + 1)
#define CLK_AP_APB 0
#define CLK_AP_CE 1
#define CLK_NANDC_ECC 2
#define CLK_NANDC_26M 3
#define CLK_EMMC_32K 4
#define CLK_SDIO0_32K 5
#define CLK_SDIO1_32K 6
#define CLK_SDIO2_32K 7
#define CLK_OTG_UTMI 8
#define CLK_AP_UART0 9
#define CLK_AP_UART1 10
#define CLK_AP_UART2 11
#define CLK_AP_UART3 12
#define CLK_AP_UART4 13
#define CLK_AP_I2C0 14
#define CLK_AP_I2C1 15
#define CLK_AP_I2C2 16
#define CLK_AP_I2C3 17
#define CLK_AP_I2C4 18
#define CLK_AP_I2C5 19
#define CLK_AP_I2C6 20
#define CLK_AP_SPI0 21
#define CLK_AP_SPI1 22
#define CLK_AP_SPI2 23
#define CLK_AP_SPI3 24
#define CLK_AP_IIS0 25
#define CLK_AP_IIS1 26
#define CLK_AP_IIS2 27
#define CLK_SIM0 28
#define CLK_SIM0_32K 29
#define CLK_AP_CLK_NUM (CLK_SIM0_32K + 1)
#define CLK_13M 0
#define CLK_6M5 1
#define CLK_4M3 2
#define CLK_2M 3
#define CLK_250K 4
#define CLK_RCO_25M 5
#define CLK_RCO_4M 6
#define CLK_RCO_2M 7
#define CLK_EMC 8
#define CLK_AON_APB 9
#define CLK_ADI 10
#define CLK_AUX0 11
#define CLK_AUX1 12
#define CLK_AUX2 13
#define CLK_PROBE 14
#define CLK_PWM0 15
#define CLK_PWM1 16
#define CLK_PWM2 17
#define CLK_AON_THM 18
#define CLK_AUDIF 19
#define CLK_CPU_DAP 20
#define CLK_CPU_TS 21
#define CLK_DJTAG_TCK 22
#define CLK_EMC_REF 23
#define CLK_CSSYS 24
#define CLK_AON_PMU 25
#define CLK_PMU_26M 26
#define CLK_AON_TMR 27
#define CLK_POWER_CPU 28
#define CLK_AP_AXI 29
#define CLK_SDIO0_2X 30
#define CLK_SDIO1_2X 31
#define CLK_SDIO2_2X 32
#define CLK_EMMC_2X 33
#define CLK_DPU 34
#define CLK_DPU_DPI 35
#define CLK_OTG_REF 36
#define CLK_SDPHY_APB 37
#define CLK_ALG_IO_APB 38
#define CLK_GPU_CORE 39
#define CLK_GPU_SOC 40
#define CLK_MM_EMC 41
#define CLK_MM_AHB 42
#define CLK_BPC 43
#define CLK_DCAM_IF 44
#define CLK_ISP 45
#define CLK_JPG 46
#define CLK_CPP 47
#define CLK_SENSOR0 48
#define CLK_SENSOR1 49
#define CLK_SENSOR2 50
#define CLK_MM_VEMC 51
#define CLK_MM_VAHB 52
#define CLK_VSP 53
#define CLK_CORE0 54
#define CLK_CORE1 55
#define CLK_CORE2 56
#define CLK_CORE3 57
#define CLK_CORE4 58
#define CLK_CORE5 59
#define CLK_CORE6 60
#define CLK_CORE7 61
#define CLK_SCU 62
#define CLK_ACE 63
#define CLK_AXI_PERIPH 64
#define CLK_AXI_ACP 65
#define CLK_ATB 66
#define CLK_DEBUG_APB 67
#define CLK_GIC 68
#define CLK_PERIPH 69
#define CLK_AON_CLK_NUM (CLK_VSP + 1)
#define CLK_OTG_EB 0
#define CLK_DMA_EB 1
#define CLK_CE_EB 2
#define CLK_NANDC_EB 3
#define CLK_SDIO0_EB 4
#define CLK_SDIO1_EB 5
#define CLK_SDIO2_EB 6
#define CLK_EMMC_EB 7
#define CLK_EMMC_32K_EB 8
#define CLK_SDIO0_32K_EB 9
#define CLK_SDIO1_32K_EB 10
#define CLK_SDIO2_32K_EB 11
#define CLK_NANDC_26M_EB 12
#define CLK_DMA_EB2 13
#define CLK_CE_EB2 14
#define CLK_AP_AHB_GATE_NUM (CLK_CE_EB2 + 1)
#define CLK_GPIO_EB 0
#define CLK_PWM0_EB 1
#define CLK_PWM1_EB 2
#define CLK_PWM2_EB 3
#define CLK_PWM3_EB 4
#define CLK_KPD_EB 5
#define CLK_AON_SYST_EB 6
#define CLK_AP_SYST_EB 7
#define CLK_AON_TMR_EB 8
#define CLK_EFUSE_EB 9
#define CLK_EIC_EB 10
#define CLK_INTC_EB 11
#define CLK_ADI_EB 12
#define CLK_AUDIF_EB 13
#define CLK_AUD_EB 14
#define CLK_VBC_EB 15
#define CLK_PIN_EB 16
#define CLK_AP_WDG_EB 17
#define CLK_MM_EB 18
#define CLK_AON_APB_CKG_EB 19
#define CLK_CA53_TS0_EB 20
#define CLK_CA53_TS1_EB 21
#define CLK_CS53_DAP_EB 22
#define CLK_PMU_EB 23
#define CLK_THM_EB 24
#define CLK_AUX0_EB 25
#define CLK_AUX1_EB 26
#define CLK_AUX2_EB 27
#define CLK_PROBE_EB 28
#define CLK_EMC_REF_EB 29
#define CLK_CA53_WDG_EB 30
#define CLK_AP_TMR1_EB 31
#define CLK_AP_TMR2_EB 32
#define CLK_DISP_EMC_EB 33
#define CLK_ZIP_EMC_EB 34
#define CLK_GSP_EMC_EB 35
#define CLK_MM_VSP_EB 36
#define CLK_MDAR_EB 37
#define CLK_RTC4M0_CAL_EB 38
#define CLK_RTC4M1_CAL_EB 39
#define CLK_DJTAG_EB 40
#define CLK_MBOX_EB 41
#define CLK_AON_DMA_EB 42
#define CLK_AON_APB_DEF_EB 43
#define CLK_CA5_TS0_EB 44
#define CLK_DBG_EB 45
#define CLK_DBG_EMC_EB 46
#define CLK_CROSS_TRIG_EB 47
#define CLK_SERDES_DPHY_EB 48
#define CLK_ARCH_RTC_EB 49
#define CLK_KPD_RTC_EB 50
#define CLK_AON_SYST_RTC_EB 51
#define CLK_AP_SYST_RTC_EB 52
#define CLK_AON_TMR_RTC_EB 53
#define CLK_AP_TMR0_RTC_EB 54
#define CLK_EIC_RTC_EB 55
#define CLK_EIC_RTCDV5_EB 56
#define CLK_AP_WDG_RTC_EB 57
#define CLK_CA53_WDG_RTC_EB 58
#define CLK_THM_RTC_EB 59
#define CLK_ATHMA_RTC_EB 60
#define CLK_GTHMA_RTC_EB 61
#define CLK_ATHMA_RTC_A_EB 62
#define CLK_GTHMA_RTC_A_EB 63
#define CLK_AP_TMR1_RTC_EB 64
#define CLK_AP_TMR2_RTC_EB 65
#define CLK_DXCO_LC_RTC_EB 66
#define CLK_BB_CAL_RTC_EB 67
#define CLK_GNU_EB 68
#define CLK_DISP_EB 69
#define CLK_MM_EMC_EB 70
#define CLK_POWER_CPU_EB 71
#define CLK_HW_I2C_EB 72
#define CLK_MM_VSP_EMC_EB 73
#define CLK_VSP_EB 74
#define CLK_CSSYS_EB 75
#define CLK_DMC_EB 76
#define CLK_ROSC_EB 77
#define CLK_S_D_CFG_EB 78
#define CLK_S_D_REF_EB 79
#define CLK_B_DMA_EB 80
#define CLK_ANLG_EB 81
#define CLK_ANLG_APB_EB 82
#define CLK_BSMTMR_EB 83
#define CLK_AP_AXI_EB 84
#define CLK_AP_INTC0_EB 85
#define CLK_AP_INTC1_EB 86
#define CLK_AP_INTC2_EB 87
#define CLK_AP_INTC3_EB 88
#define CLK_AP_INTC4_EB 89
#define CLK_AP_INTC5_EB 90
#define CLK_SCC_EB 91
#define CLK_DPHY_CFG_EB 92
#define CLK_DPHY_REF_EB 93
#define CLK_CPHY_CFG_EB 94
#define CLK_OTG_REF_EB 95
#define CLK_SERDES_EB 96
#define CLK_AON_AP_EMC_EB 97
#define CLK_AON_APB_GATE_NUM (CLK_AON_AP_EMC_EB + 1)
#define CLK_MAHB_CKG_EB 0
#define CLK_MDCAM_EB 1
#define CLK_MISP_EB 2
#define CLK_MAHBCSI_EB 3
#define CLK_MCSI_S_EB 4
#define CLK_MCSI_T_EB 5
#define CLK_DCAM_AXI_EB 6
#define CLK_ISP_AXI_EB 7
#define CLK_MCSI_EB 8
#define CLK_MCSI_S_CKG_EB 9
#define CLK_MCSI_T_CKG_EB 10
#define CLK_SENSOR0_EB 11
#define CLK_SENSOR1_EB 12
#define CLK_SENSOR2_EB 13
#define CLK_MCPHY_CFG_EB 14
#define CLK_MM_GATE_NUM (CLK_MCPHY_CFG_EB + 1)
#define CLK_SIM0_EB 0
#define CLK_IIS0_EB 1
#define CLK_IIS1_EB 2
#define CLK_IIS2_EB 3
#define CLK_SPI0_EB 4
#define CLK_SPI1_EB 5
#define CLK_SPI2_EB 6
#define CLK_I2C0_EB 7
#define CLK_I2C1_EB 8
#define CLK_I2C2_EB 9
#define CLK_I2C3_EB 10
#define CLK_I2C4_EB 11
#define CLK_UART0_EB 12
#define CLK_UART1_EB 13
#define CLK_UART2_EB 14
#define CLK_UART3_EB 15
#define CLK_UART4_EB 16
#define CLK_SIM0_32K_EB 17
#define CLK_SPI3_EB 18
#define CLK_I2C5_EB 19
#define CLK_I2C6_EB 20
#define CLK_AP_APB_GATE_NUM (CLK_I2C6_EB + 1)
#endif /* _DT_BINDINGS_CLK_SC9863A_H_ */

2
include/dt-bindings/clock/sun50i-a64-ccu.h
View File

@@ -131,7 +131,7 @@
#define CLK_AVS 109
#define CLK_HDMI 110
#define CLK_HDMI_DDC 111
#define CLK_MBUS 112
#define CLK_DSI_DPHY 113
#define CLK_GPU 114

4
include/dt-bindings/clock/tegra114-car.h
View File

@@ -228,6 +228,8 @@
#define TEGRA114_CLK_CLK_M 201
#define TEGRA114_CLK_CLK_M_DIV2 202
#define TEGRA114_CLK_CLK_M_DIV4 203
#define TEGRA114_CLK_OSC_DIV2 202
#define TEGRA114_CLK_OSC_DIV4 203
#define TEGRA114_CLK_PLL_REF 204
#define TEGRA114_CLK_PLL_C 205
#define TEGRA114_CLK_PLL_C_OUT1 206
@@ -274,7 +276,7 @@
#define TEGRA114_CLK_CLK_OUT_2 246
#define TEGRA114_CLK_CLK_OUT_3 247
#define TEGRA114_CLK_BLINK 248
/* 249 */
#define TEGRA114_CLK_OSC 249
/* 250 */
/* 251 */
#define TEGRA114_CLK_XUSB_HOST_SRC 252

4
include/dt-bindings/clock/tegra124-car-common.h
View File

@@ -227,6 +227,8 @@
#define TEGRA124_CLK_CLK_M 201
#define TEGRA124_CLK_CLK_M_DIV2 202
#define TEGRA124_CLK_CLK_M_DIV4 203
#define TEGRA124_CLK_OSC_DIV2 202
#define TEGRA124_CLK_OSC_DIV4 203
#define TEGRA124_CLK_PLL_REF 204
#define TEGRA124_CLK_PLL_C 205
#define TEGRA124_CLK_PLL_C_OUT1 206
@@ -273,7 +275,7 @@
#define TEGRA124_CLK_CLK_OUT_2 246
#define TEGRA124_CLK_CLK_OUT_3 247
#define TEGRA124_CLK_BLINK 248
/* 249 */
#define TEGRA124_CLK_OSC 249
/* 250 */
/* 251 */
#define TEGRA124_CLK_XUSB_HOST_SRC 252

4
include/dt-bindings/clock/tegra210-car.h
View File

@@ -262,6 +262,8 @@
#define TEGRA210_CLK_CLK_M 233
#define TEGRA210_CLK_CLK_M_DIV2 234
#define TEGRA210_CLK_CLK_M_DIV4 235
#define TEGRA210_CLK_OSC_DIV2 234
#define TEGRA210_CLK_OSC_DIV4 235
#define TEGRA210_CLK_PLL_REF 236
#define TEGRA210_CLK_PLL_C 237
#define TEGRA210_CLK_PLL_C_OUT1 238
@@ -355,7 +357,7 @@
#define TEGRA210_CLK_PLL_A_OUT_ADSP 323
#define TEGRA210_CLK_PLL_A_OUT0_OUT_ADSP 324
/* 325 */
/* 326 */
#define TEGRA210_CLK_OSC 326
/* 327 */
/* 328 */
/* 329 */

4
include/dt-bindings/clock/tegra30-car.h
View File

@@ -196,6 +196,8 @@
#define TEGRA30_CLK_CLK_M 171
#define TEGRA30_CLK_CLK_M_DIV2 172
#define TEGRA30_CLK_CLK_M_DIV4 173
#define TEGRA30_CLK_OSC_DIV2 172
#define TEGRA30_CLK_OSC_DIV4 173
#define TEGRA30_CLK_PLL_REF 174
#define TEGRA30_CLK_PLL_C 175
#define TEGRA30_CLK_PLL_C_OUT1 176
@@ -243,7 +245,7 @@
#define TEGRA30_CLK_HCLK 217
#define TEGRA30_CLK_PCLK 218
/* 219 */
/* 220 */
#define TEGRA30_CLK_OSC 220
/* 221 */
/* 222 */
/* 223 */

76
include/dt-bindings/display/sdtv-standards.h Normal file
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@@ -0,0 +1,76 @@
/* SPDX-License-Identifier: GPL-2.0-only or X11 */
/*
* Copyright 2019 Pengutronix, Marco Felsch <kernel@pengutronix.de>
*/
#ifndef _DT_BINDINGS_DISPLAY_SDTV_STDS_H
#define _DT_BINDINGS_DISPLAY_SDTV_STDS_H
/*
* Attention: Keep the SDTV_STD_* bit definitions in sync with
* include/uapi/linux/videodev2.h V4L2_STD_* bit definitions.
*/
/* One bit for each standard */
#define SDTV_STD_PAL_B 0x00000001
#define SDTV_STD_PAL_B1 0x00000002
#define SDTV_STD_PAL_G 0x00000004
#define SDTV_STD_PAL_H 0x00000008
#define SDTV_STD_PAL_I 0x00000010
#define SDTV_STD_PAL_D 0x00000020
#define SDTV_STD_PAL_D1 0x00000040
#define SDTV_STD_PAL_K 0x00000080
#define SDTV_STD_PAL (SDTV_STD_PAL_B | \
SDTV_STD_PAL_B1 | \
SDTV_STD_PAL_G | \
SDTV_STD_PAL_H | \
SDTV_STD_PAL_I | \
SDTV_STD_PAL_D | \
SDTV_STD_PAL_D1 | \
SDTV_STD_PAL_K)
#define SDTV_STD_PAL_M 0x00000100
#define SDTV_STD_PAL_N 0x00000200
#define SDTV_STD_PAL_Nc 0x00000400
#define SDTV_STD_PAL_60 0x00000800
#define SDTV_STD_NTSC_M 0x00001000 /* BTSC */
#define SDTV_STD_NTSC_M_JP 0x00002000 /* EIA-J */
#define SDTV_STD_NTSC_443 0x00004000
#define SDTV_STD_NTSC_M_KR 0x00008000 /* FM A2 */
#define SDTV_STD_NTSC (SDTV_STD_NTSC_M | \
SDTV_STD_NTSC_M_JP | \
SDTV_STD_NTSC_M_KR)
#define SDTV_STD_SECAM_B 0x00010000
#define SDTV_STD_SECAM_D 0x00020000
#define SDTV_STD_SECAM_G 0x00040000
#define SDTV_STD_SECAM_H 0x00080000
#define SDTV_STD_SECAM_K 0x00100000
#define SDTV_STD_SECAM_K1 0x00200000
#define SDTV_STD_SECAM_L 0x00400000
#define SDTV_STD_SECAM_LC 0x00800000
#define SDTV_STD_SECAM (SDTV_STD_SECAM_B | \
SDTV_STD_SECAM_D | \
SDTV_STD_SECAM_G | \
SDTV_STD_SECAM_H | \
SDTV_STD_SECAM_K | \
SDTV_STD_SECAM_K1 | \
SDTV_STD_SECAM_L | \
SDTV_STD_SECAM_LC)
/* Standards for Countries with 60Hz Line frequency */
#define SDTV_STD_525_60 (SDTV_STD_PAL_M | \
SDTV_STD_PAL_60 | \
SDTV_STD_NTSC | \
SDTV_STD_NTSC_443)
/* Standards for Countries with 50Hz Line frequency */
#define SDTV_STD_625_50 (SDTV_STD_PAL | \
SDTV_STD_PAL_N | \
SDTV_STD_PAL_Nc | \
SDTV_STD_SECAM)
#endif /* _DT_BINDINGS_DISPLAY_SDTV_STDS_H */

12
include/dt-bindings/interconnect/qcom,osm-l3.h Normal file
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@@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2019 The Linux Foundation. All rights reserved.
*/
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_OSM_L3_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_OSM_L3_H
#define MASTER_OSM_L3_APPS 0
#define SLAVE_OSM_L3 1
#endif

161
include/dt-bindings/interconnect/qcom,sc7180.h Normal file
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@@ -0,0 +1,161 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Qualcomm SC7180 interconnect IDs
*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*/
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SC7180_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_SC7180_H
#define MASTER_A1NOC_CFG 0
#define MASTER_QSPI 1
#define MASTER_QUP_0 2
#define MASTER_SDCC_2 3
#define MASTER_EMMC 4
#define MASTER_UFS_MEM 5
#define SLAVE_A1NOC_SNOC 6
#define SLAVE_SERVICE_A1NOC 7
#define MASTER_A2NOC_CFG 0
#define MASTER_QDSS_BAM 1
#define MASTER_QUP_1 2
#define MASTER_USB3 3
#define MASTER_CRYPTO 4
#define MASTER_IPA 5
#define MASTER_QDSS_ETR 6
#define SLAVE_A2NOC_SNOC 7
#define SLAVE_SERVICE_A2NOC 8
#define MASTER_CAMNOC_HF0_UNCOMP 0
#define MASTER_CAMNOC_HF1_UNCOMP 1
#define MASTER_CAMNOC_SF_UNCOMP 2
#define SLAVE_CAMNOC_UNCOMP 3
#define MASTER_NPU 0
#define MASTER_NPU_PROC 1
#define SLAVE_CDSP_GEM_NOC 2
#define MASTER_SNOC_CNOC 0
#define MASTER_QDSS_DAP 1
#define SLAVE_A1NOC_CFG 2
#define SLAVE_A2NOC_CFG 3
#define SLAVE_AHB2PHY_SOUTH 4
#define SLAVE_AHB2PHY_CENTER 5
#define SLAVE_AOP 6
#define SLAVE_AOSS 7
#define SLAVE_BOOT_ROM 8
#define SLAVE_CAMERA_CFG 9
#define SLAVE_CAMERA_NRT_THROTTLE_CFG 10
#define SLAVE_CAMERA_RT_THROTTLE_CFG 11
#define SLAVE_CLK_CTL 12
#define SLAVE_RBCPR_CX_CFG 13
#define SLAVE_RBCPR_MX_CFG 14
#define SLAVE_CRYPTO_0_CFG 15
#define SLAVE_DCC_CFG 16
#define SLAVE_CNOC_DDRSS 17
#define SLAVE_DISPLAY_CFG 18
#define SLAVE_DISPLAY_RT_THROTTLE_CFG 19
#define SLAVE_DISPLAY_THROTTLE_CFG 20
#define SLAVE_EMMC_CFG 21
#define SLAVE_GLM 22
#define SLAVE_GFX3D_CFG 23
#define SLAVE_IMEM_CFG 24
#define SLAVE_IPA_CFG 25
#define SLAVE_CNOC_MNOC_CFG 26
#define SLAVE_CNOC_MSS 27
#define SLAVE_NPU_CFG 28
#define SLAVE_NPU_DMA_BWMON_CFG 29
#define SLAVE_NPU_PROC_BWMON_CFG 30
#define SLAVE_PDM 31
#define SLAVE_PIMEM_CFG 32
#define SLAVE_PRNG 33
#define SLAVE_QDSS_CFG 34
#define SLAVE_QM_CFG 35
#define SLAVE_QM_MPU_CFG 36
#define SLAVE_QSPI_0 37
#define SLAVE_QUP_0 38
#define SLAVE_QUP_1 39
#define SLAVE_SDCC_2 40
#define SLAVE_SECURITY 41
#define SLAVE_SNOC_CFG 42
#define SLAVE_TCSR 43
#define SLAVE_TLMM_WEST 44
#define SLAVE_TLMM_NORTH 45
#define SLAVE_TLMM_SOUTH 46
#define SLAVE_UFS_MEM_CFG 47
#define SLAVE_USB3 48
#define SLAVE_VENUS_CFG 49
#define SLAVE_VENUS_THROTTLE_CFG 50
#define SLAVE_VSENSE_CTRL_CFG 51
#define SLAVE_SERVICE_CNOC 52
#define MASTER_CNOC_DC_NOC 0
#define SLAVE_GEM_NOC_CFG 1
#define SLAVE_LLCC_CFG 2
#define MASTER_APPSS_PROC 0
#define MASTER_SYS_TCU 1
#define MASTER_GEM_NOC_CFG 2
#define MASTER_COMPUTE_NOC 3
#define MASTER_MNOC_HF_MEM_NOC 4
#define MASTER_MNOC_SF_MEM_NOC 5
#define MASTER_SNOC_GC_MEM_NOC 6
#define MASTER_SNOC_SF_MEM_NOC 7
#define MASTER_GFX3D 8
#define SLAVE_MSS_PROC_MS_MPU_CFG 9
#define SLAVE_GEM_NOC_SNOC 10
#define SLAVE_LLCC 11
#define SLAVE_SERVICE_GEM_NOC 12
#define MASTER_IPA_CORE 0
#define SLAVE_IPA_CORE 1
#define MASTER_LLCC 0
#define SLAVE_EBI1 1
#define MASTER_CNOC_MNOC_CFG 0
#define MASTER_CAMNOC_HF0 1
#define MASTER_CAMNOC_HF1 2
#define MASTER_CAMNOC_SF 3
#define MASTER_MDP0 4
#define MASTER_ROTATOR 5
#define MASTER_VIDEO_P0 6
#define MASTER_VIDEO_PROC 7
#define SLAVE_MNOC_HF_MEM_NOC 8
#define SLAVE_MNOC_SF_MEM_NOC 9
#define SLAVE_SERVICE_MNOC 10
#define MASTER_NPU_SYS 0
#define MASTER_NPU_NOC_CFG 1
#define SLAVE_NPU_CAL_DP0 2
#define SLAVE_NPU_CP 3
#define SLAVE_NPU_INT_DMA_BWMON_CFG 4
#define SLAVE_NPU_DPM 5
#define SLAVE_ISENSE_CFG 6
#define SLAVE_NPU_LLM_CFG 7
#define SLAVE_NPU_TCM 8
#define SLAVE_NPU_COMPUTE_NOC 9
#define SLAVE_SERVICE_NPU_NOC 10
#define MASTER_QUP_CORE_0 0
#define MASTER_QUP_CORE_1 1
#define SLAVE_QUP_CORE_0 2
#define SLAVE_QUP_CORE_1 3
#define MASTER_SNOC_CFG 0
#define MASTER_A1NOC_SNOC 1
#define MASTER_A2NOC_SNOC 2
#define MASTER_GEM_NOC_SNOC 3
#define MASTER_PIMEM 4
#define SLAVE_APPSS 5
#define SLAVE_SNOC_CNOC 6
#define SLAVE_SNOC_GEM_NOC_GC 7
#define SLAVE_SNOC_GEM_NOC_SF 8
#define SLAVE_IMEM 9
#define SLAVE_PIMEM 10
#define SLAVE_SERVICE_SNOC 11
#define SLAVE_QDSS_STM 12
#define SLAVE_TCU 13
#endif

263
include/dt-bindings/interconnect/qcom,sdm845.h
View File

@@ -10,134 +10,139 @@
#define __DT_BINDINGS_INTERCONNECT_QCOM_SDM845_H
#define MASTER_A1NOC_CFG 0
#define MASTER_BLSP_1 1
#define MASTER_TSIF 2
#define MASTER_SDCC_2 3
#define MASTER_SDCC_4 4
#define MASTER_UFS_CARD 5
#define MASTER_UFS_MEM 6
#define MASTER_PCIE_0 7
#define MASTER_A2NOC_CFG 8
#define MASTER_QDSS_BAM 9
#define MASTER_BLSP_2 10
#define MASTER_CNOC_A2NOC 11
#define MASTER_CRYPTO 12
#define MASTER_IPA 13
#define MASTER_PCIE_1 14
#define MASTER_QDSS_ETR 15
#define MASTER_USB3_0 16
#define MASTER_USB3_1 17
#define MASTER_CAMNOC_HF0_UNCOMP 18
#define MASTER_CAMNOC_HF1_UNCOMP 19
#define MASTER_CAMNOC_SF_UNCOMP 20
#define MASTER_SPDM 21
#define MASTER_TIC 22
#define MASTER_SNOC_CNOC 23
#define MASTER_QDSS_DAP 24
#define MASTER_CNOC_DC_NOC 25
#define MASTER_APPSS_PROC 26
#define MASTER_GNOC_CFG 27
#define MASTER_LLCC 28
#define MASTER_TCU_0 29
#define MASTER_MEM_NOC_CFG 30
#define MASTER_GNOC_MEM_NOC 31
#define MASTER_MNOC_HF_MEM_NOC 32
#define MASTER_MNOC_SF_MEM_NOC 33
#define MASTER_SNOC_GC_MEM_NOC 34
#define MASTER_SNOC_SF_MEM_NOC 35
#define MASTER_GFX3D 36
#define MASTER_CNOC_MNOC_CFG 37
#define MASTER_CAMNOC_HF0 38
#define MASTER_CAMNOC_HF1 39
#define MASTER_CAMNOC_SF 40
#define MASTER_MDP0 41
#define MASTER_MDP1 42
#define MASTER_ROTATOR 43
#define MASTER_VIDEO_P0 44
#define MASTER_VIDEO_P1 45
#define MASTER_VIDEO_PROC 46
#define MASTER_SNOC_CFG 47
#define MASTER_A1NOC_SNOC 48
#define MASTER_A2NOC_SNOC 49
#define MASTER_GNOC_SNOC 50
#define MASTER_MEM_NOC_SNOC 51
#define MASTER_ANOC_PCIE_SNOC 52
#define MASTER_PIMEM 53
#define MASTER_GIC 54
#define SLAVE_A1NOC_SNOC 55
#define SLAVE_SERVICE_A1NOC 56
#define SLAVE_ANOC_PCIE_A1NOC_SNOC 57
#define SLAVE_A2NOC_SNOC 58
#define SLAVE_ANOC_PCIE_SNOC 59
#define SLAVE_SERVICE_A2NOC 60
#define SLAVE_CAMNOC_UNCOMP 61
#define SLAVE_A1NOC_CFG 62
#define SLAVE_A2NOC_CFG 63
#define SLAVE_AOP 64
#define SLAVE_AOSS 65
#define SLAVE_CAMERA_CFG 66
#define SLAVE_CLK_CTL 67
#define SLAVE_CDSP_CFG 68
#define SLAVE_RBCPR_CX_CFG 69
#define SLAVE_CRYPTO_0_CFG 70
#define SLAVE_DCC_CFG 71
#define SLAVE_CNOC_DDRSS 72
#define SLAVE_DISPLAY_CFG 73
#define SLAVE_GLM 74
#define SLAVE_GFX3D_CFG 75
#define SLAVE_IMEM_CFG 76
#define SLAVE_IPA_CFG 77
#define SLAVE_CNOC_MNOC_CFG 78
#define SLAVE_PCIE_0_CFG 79
#define SLAVE_PCIE_1_CFG 80
#define SLAVE_PDM 81
#define SLAVE_SOUTH_PHY_CFG 82
#define SLAVE_PIMEM_CFG 83
#define SLAVE_PRNG 84
#define SLAVE_QDSS_CFG 85
#define SLAVE_BLSP_2 86
#define SLAVE_BLSP_1 87
#define SLAVE_SDCC_2 88
#define SLAVE_SDCC_4 89
#define SLAVE_SNOC_CFG 90
#define SLAVE_SPDM_WRAPPER 91
#define SLAVE_SPSS_CFG 92
#define SLAVE_TCSR 93
#define SLAVE_TLMM_NORTH 94
#define SLAVE_TLMM_SOUTH 95
#define SLAVE_TSIF 96
#define SLAVE_UFS_CARD_CFG 97
#define SLAVE_UFS_MEM_CFG 98
#define SLAVE_USB3_0 99
#define SLAVE_USB3_1 100
#define SLAVE_VENUS_CFG 101
#define SLAVE_VSENSE_CTRL_CFG 102
#define SLAVE_CNOC_A2NOC 103
#define SLAVE_SERVICE_CNOC 104
#define SLAVE_LLCC_CFG 105
#define SLAVE_MEM_NOC_CFG 106
#define SLAVE_GNOC_SNOC 107
#define SLAVE_GNOC_MEM_NOC 108
#define SLAVE_SERVICE_GNOC 109
#define SLAVE_EBI1 110
#define SLAVE_MSS_PROC_MS_MPU_CFG 111
#define SLAVE_MEM_NOC_GNOC 112
#define SLAVE_LLCC 113
#define SLAVE_MEM_NOC_SNOC 114
#define SLAVE_SERVICE_MEM_NOC 115
#define SLAVE_MNOC_SF_MEM_NOC 116
#define SLAVE_MNOC_HF_MEM_NOC 117
#define SLAVE_SERVICE_MNOC 118
#define SLAVE_APPSS 119
#define SLAVE_SNOC_CNOC 120
#define SLAVE_SNOC_MEM_NOC_GC 121
#define SLAVE_SNOC_MEM_NOC_SF 122
#define SLAVE_IMEM 123
#define SLAVE_PCIE_0 124
#define SLAVE_PCIE_1 125
#define SLAVE_PIMEM 126
#define SLAVE_SERVICE_SNOC 127
#define SLAVE_QDSS_STM 128
#define SLAVE_TCU 129
#define MASTER_TSIF 1
#define MASTER_SDCC_2 2
#define MASTER_SDCC_4 3
#define MASTER_UFS_CARD 4
#define MASTER_UFS_MEM 5
#define MASTER_PCIE_0 6
#define SLAVE_A1NOC_SNOC 7
#define SLAVE_SERVICE_A1NOC 8
#define SLAVE_ANOC_PCIE_A1NOC_SNOC 9
#define MASTER_A2NOC_CFG 0
#define MASTER_QDSS_BAM 1
#define MASTER_CNOC_A2NOC 2
#define MASTER_CRYPTO 3
#define MASTER_IPA 4
#define MASTER_PCIE_1 5
#define MASTER_QDSS_ETR 6
#define MASTER_USB3_0 7
#define MASTER_USB3_1 8
#define SLAVE_A2NOC_SNOC 9
#define SLAVE_ANOC_PCIE_SNOC 10
#define SLAVE_SERVICE_A2NOC 11
#define MASTER_SPDM 0
#define MASTER_TIC 1
#define MASTER_SNOC_CNOC 2
#define MASTER_QDSS_DAP 3
#define SLAVE_A1NOC_CFG 4
#define SLAVE_A2NOC_CFG 5
#define SLAVE_AOP 6
#define SLAVE_AOSS 7
#define SLAVE_CAMERA_CFG 8
#define SLAVE_CLK_CTL 9
#define SLAVE_CDSP_CFG 10
#define SLAVE_RBCPR_CX_CFG 11
#define SLAVE_CRYPTO_0_CFG 12
#define SLAVE_DCC_CFG 13
#define SLAVE_CNOC_DDRSS 14
#define SLAVE_DISPLAY_CFG 15
#define SLAVE_GLM 16
#define SLAVE_GFX3D_CFG 17
#define SLAVE_IMEM_CFG 18
#define SLAVE_IPA_CFG 19
#define SLAVE_CNOC_MNOC_CFG 20
#define SLAVE_PCIE_0_CFG 21
#define SLAVE_PCIE_1_CFG 22
#define SLAVE_PDM 23
#define SLAVE_SOUTH_PHY_CFG 24
#define SLAVE_PIMEM_CFG 25
#define SLAVE_PRNG 26
#define SLAVE_QDSS_CFG 27
#define SLAVE_BLSP_2 28
#define SLAVE_BLSP_1 29
#define SLAVE_SDCC_2 30
#define SLAVE_SDCC_4 31
#define SLAVE_SNOC_CFG 32
#define SLAVE_SPDM_WRAPPER 33
#define SLAVE_SPSS_CFG 34
#define SLAVE_TCSR 35
#define SLAVE_TLMM_NORTH 36
#define SLAVE_TLMM_SOUTH 37
#define SLAVE_TSIF 38
#define SLAVE_UFS_CARD_CFG 39
#define SLAVE_UFS_MEM_CFG 40
#define SLAVE_USB3_0 41
#define SLAVE_USB3_1 42
#define SLAVE_VENUS_CFG 43
#define SLAVE_VSENSE_CTRL_CFG 44
#define SLAVE_CNOC_A2NOC 45
#define SLAVE_SERVICE_CNOC 46
#define MASTER_CNOC_DC_NOC 0
#define SLAVE_LLCC_CFG 1
#define SLAVE_MEM_NOC_CFG 2
#define MASTER_APPSS_PROC 0
#define MASTER_GNOC_CFG 1
#define SLAVE_GNOC_SNOC 2
#define SLAVE_GNOC_MEM_NOC 3
#define SLAVE_SERVICE_GNOC 4
#define MASTER_TCU_0 0
#define MASTER_MEM_NOC_CFG 1
#define MASTER_GNOC_MEM_NOC 2
#define MASTER_MNOC_HF_MEM_NOC 3
#define MASTER_MNOC_SF_MEM_NOC 4
#define MASTER_SNOC_GC_MEM_NOC 5
#define MASTER_SNOC_SF_MEM_NOC 6
#define MASTER_GFX3D 7
#define SLAVE_MSS_PROC_MS_MPU_CFG 8
#define SLAVE_MEM_NOC_GNOC 9
#define SLAVE_LLCC 10
#define SLAVE_MEM_NOC_SNOC 11
#define SLAVE_SERVICE_MEM_NOC 12
#define MASTER_LLCC 13
#define SLAVE_EBI1 14
#define MASTER_CNOC_MNOC_CFG 0
#define MASTER_CAMNOC_HF0 1
#define MASTER_CAMNOC_HF1 2
#define MASTER_CAMNOC_SF 3
#define MASTER_MDP0 4
#define MASTER_MDP1 5
#define MASTER_ROTATOR 6
#define MASTER_VIDEO_P0 7
#define MASTER_VIDEO_P1 8
#define MASTER_VIDEO_PROC 9
#define SLAVE_MNOC_SF_MEM_NOC 10
#define SLAVE_MNOC_HF_MEM_NOC 11
#define SLAVE_SERVICE_MNOC 12
#define MASTER_CAMNOC_HF0_UNCOMP 13
#define MASTER_CAMNOC_HF1_UNCOMP 14
#define MASTER_CAMNOC_SF_UNCOMP 15
#define SLAVE_CAMNOC_UNCOMP 16
#define MASTER_SNOC_CFG 0
#define MASTER_A1NOC_SNOC 1
#define MASTER_A2NOC_SNOC 2
#define MASTER_GNOC_SNOC 3
#define MASTER_MEM_NOC_SNOC 4
#define MASTER_ANOC_PCIE_SNOC 5
#define MASTER_PIMEM 6
#define MASTER_GIC 7
#define SLAVE_APPSS 8
#define SLAVE_SNOC_CNOC 9
#define SLAVE_SNOC_MEM_NOC_GC 10
#define SLAVE_SNOC_MEM_NOC_SF 11
#define SLAVE_IMEM 12
#define SLAVE_PCIE_0 13
#define SLAVE_PCIE_1 14
#define SLAVE_PIMEM 15
#define SLAVE_SERVICE_SNOC 16
#define SLAVE_QDSS_STM 17
#define SLAVE_TCU 18
#endif

36
include/dt-bindings/leds/common.h
View File

@@ -6,6 +6,7 @@
* Author: Jacek Anaszewski <j.anaszewski@samsung.com>
*
* Copyright (C) 2019 Jacek Anaszewski <jacek.anaszewski@gmail.com>
* Copyright (C) 2020 Pavel Machek <pavel@ucw.cz>
*/
#ifndef __DT_BINDINGS_LEDS_H
@@ -32,16 +33,38 @@
#define LED_COLOR_ID_MAX 8
/* Standard LED functions */
/* Keyboard LEDs, usually it would be input4::capslock etc. */
/* Obsolete equivalent: "shift-key-light" */
#define LED_FUNCTION_CAPSLOCK "capslock"
#define LED_FUNCTION_SCROLLLOCK "scrolllock"
#define LED_FUNCTION_NUMLOCK "numlock"
/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads),
"lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */
#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight"
/* System LEDs, usually found on system body.
platform::mute (etc) is sometimes seen, :mute would be better */
#define LED_FUNCTION_POWER "power"
#define LED_FUNCTION_DISK "disk"
/* Obsolete: "platform:*:charging" (allwinner sun50i) */
#define LED_FUNCTION_CHARGING "charging"
/* Used RGB notification LEDs common on phones.
Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4),
"lp5523:{r,g,b}" (Nokia N900) */
#define LED_FUNCTION_STATUS "status"
#define LED_FUNCTION_MICMUTE "micmute"
#define LED_FUNCTION_MUTE "mute"
/* Miscelleaus functions. Use functions above if you can. */
#define LED_FUNCTION_ACTIVITY "activity"
#define LED_FUNCTION_ALARM "alarm"
#define LED_FUNCTION_BACKLIGHT "backlight"
#define LED_FUNCTION_BLUETOOTH "bluetooth"
#define LED_FUNCTION_BOOT "boot"
#define LED_FUNCTION_CPU "cpu"
#define LED_FUNCTION_CAPSLOCK "capslock"
#define LED_FUNCTION_CHARGING "charging"
#define LED_FUNCTION_DEBUG "debug"
#define LED_FUNCTION_DISK "disk"
#define LED_FUNCTION_DISK_ACTIVITY "disk-activity"
#define LED_FUNCTION_DISK_ERR "disk-err"
#define LED_FUNCTION_DISK_READ "disk-read"
@@ -50,21 +73,14 @@
#define LED_FUNCTION_FLASH "flash"
#define LED_FUNCTION_HEARTBEAT "heartbeat"
#define LED_FUNCTION_INDICATOR "indicator"
#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight"
#define LED_FUNCTION_LAN "lan"
#define LED_FUNCTION_MAIL "mail"
#define LED_FUNCTION_MTD "mtd"
#define LED_FUNCTION_MICMUTE "micmute"
#define LED_FUNCTION_MUTE "mute"
#define LED_FUNCTION_NUMLOCK "numlock"
#define LED_FUNCTION_PANIC "panic"
#define LED_FUNCTION_PROGRAMMING "programming"
#define LED_FUNCTION_POWER "power"
#define LED_FUNCTION_RX "rx"
#define LED_FUNCTION_SD "sd"
#define LED_FUNCTION_SCROLLLOCK "scrolllock"
#define LED_FUNCTION_STANDBY "standby"
#define LED_FUNCTION_STATUS "status"
#define LED_FUNCTION_TORCH "torch"
#define LED_FUNCTION_TX "tx"
#define LED_FUNCTION_USB "usb"

2
include/dt-bindings/media/tvp5150.h
View File

@@ -14,8 +14,6 @@
#define TVP5150_COMPOSITE1 1
#define TVP5150_SVIDEO 2
#define TVP5150_INPUT_NUM 3
/* TVP5150 HW outputs */
#define TVP5150_NORMAL 0
#define TVP5150_BLACK_SCREEN 1

32
include/dt-bindings/power/meson-a1-power.h Normal file
View File

@@ -0,0 +1,32 @@
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
/*
* Copyright (c) 2019 Amlogic, Inc.
* Author: Jianxin Pan <jianxin.pan@amlogic.com>
*/
#ifndef _DT_BINDINGS_MESON_A1_POWER_H
#define _DT_BINDINGS_MESON_A1_POWER_H
#define PWRC_DSPA_ID 8
#define PWRC_DSPB_ID 9
#define PWRC_UART_ID 10
#define PWRC_DMC_ID 11
#define PWRC_I2C_ID 12
#define PWRC_PSRAM_ID 13
#define PWRC_ACODEC_ID 14
#define PWRC_AUDIO_ID 15
#define PWRC_OTP_ID 16
#define PWRC_DMA_ID 17
#define PWRC_SD_EMMC_ID 18
#define PWRC_RAMA_ID 19
#define PWRC_RAMB_ID 20
#define PWRC_IR_ID 21
#define PWRC_SPICC_ID 22
#define PWRC_SPIFC_ID 23
#define PWRC_USB_ID 24
#define PWRC_NIC_ID 25
#define PWRC_PDMIN_ID 26
#define PWRC_RSA_ID 27
#define PWRC_MAX_ID 28
#endif

16
include/dt-bindings/soc/tegra-pmc.h Normal file
View File

@@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*/
#ifndef _DT_BINDINGS_SOC_TEGRA_PMC_H
#define _DT_BINDINGS_SOC_TEGRA_PMC_H
#define TEGRA_PMC_CLK_OUT_1 0
#define TEGRA_PMC_CLK_OUT_2 1
#define TEGRA_PMC_CLK_OUT_3 2
#define TEGRA_PMC_CLK_BLINK 3
#define TEGRA_PMC_CLK_MAX 4
#endif /* _DT_BINDINGS_SOC_TEGRA_PMC_H */

18
include/dt-bindings/sound/meson-aiu.h Normal file
View File

@@ -0,0 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __DT_MESON_AIU_H
#define __DT_MESON_AIU_H
#define AIU_CPU 0
#define AIU_HDMI 1
#define AIU_ACODEC 2
#define CPU_I2S_FIFO 0
#define CPU_SPDIF_FIFO 1
#define CPU_I2S_ENCODER 2
#define CPU_SPDIF_ENCODER 3
#define CTRL_I2S 0
#define CTRL_PCM 1
#define CTRL_OUT 2
#endif /* __DT_MESON_AIU_H */

10
include/dt-bindings/sound/meson-g12a-toacodec.h Normal file
View File

@@ -0,0 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __DT_MESON_G12A_TOACODEC_H
#define __DT_MESON_G12A_TOACODEC_H
#define TOACODEC_IN_A 0
#define TOACODEC_IN_B 1
#define TOACODEC_IN_C 2
#define TOACODEC_OUT 3
#endif /* __DT_MESON_G12A_TOACODEC_H */

2
include/keys/big_key-type.h
View File

@@ -17,6 +17,6 @@ extern void big_key_free_preparse(struct key_preparsed_payload *prep);
extern void big_key_revoke(struct key *key);
extern void big_key_destroy(struct key *key);
extern void big_key_describe(const struct key *big_key, struct seq_file *m);
extern long big_key_read(const struct key *key, char __user *buffer, size_t buflen);
extern long big_key_read(const struct key *key, char *buffer, size_t buflen);
#endif /* _KEYS_BIG_KEY_TYPE_H */

3
include/keys/user-type.h
View File

@@ -41,8 +41,7 @@ extern int user_update(struct key *key, struct key_preparsed_payload *prep);
extern void user_revoke(struct key *key);
extern void user_destroy(struct key *key);
extern void user_describe(const struct key *user, struct seq_file *m);
extern long user_read(const struct key *key,
char __user *buffer, size_t buflen);
extern long user_read(const struct key *key, char *buffer, size_t buflen);
static inline const struct user_key_payload *user_key_payload_rcu(const struct key *key)
{

63
include/kunit/test.h
View File

@@ -81,6 +81,17 @@ struct kunit_resource {
struct kunit;
/* Size of log associated with test. */
#define KUNIT_LOG_SIZE 512
/*
* TAP specifies subtest stream indentation of 4 spaces, 8 spaces for a
* sub-subtest. See the "Subtests" section in
* https://node-tap.org/tap-protocol/
*/
#define KUNIT_SUBTEST_INDENT " "
#define KUNIT_SUBSUBTEST_INDENT " "
/**
* struct kunit_case - represents an individual test case.
*
@@ -123,8 +134,14 @@ struct kunit_case {
/* private: internal use only. */
bool success;
char *log;
};
static inline char *kunit_status_to_string(bool status)
{
return status ? "ok" : "not ok";
}
/**
* KUNIT_CASE - A helper for creating a &struct kunit_case
*
@@ -157,6 +174,10 @@ struct kunit_suite {
int (*init)(struct kunit *test);
void (*exit)(struct kunit *test);
struct kunit_case *test_cases;
/* private - internal use only */
struct dentry *debugfs;
char *log;
};
/**
@@ -175,6 +196,7 @@ struct kunit {
/* private: internal use only. */
const char *name; /* Read only after initialization! */
char *log; /* Points at case log after initialization */
struct kunit_try_catch try_catch;
/*
* success starts as true, and may only be set to false during a
@@ -193,10 +215,19 @@ struct kunit {
struct list_head resources; /* Protected by lock. */
};
void kunit_init_test(struct kunit *test, const char *name);
void kunit_init_test(struct kunit *test, const char *name, char *log);
int kunit_run_tests(struct kunit_suite *suite);
size_t kunit_suite_num_test_cases(struct kunit_suite *suite);
unsigned int kunit_test_case_num(struct kunit_suite *suite,
struct kunit_case *test_case);
int __kunit_test_suites_init(struct kunit_suite **suites);
void __kunit_test_suites_exit(struct kunit_suite **suites);
/**
* kunit_test_suites() - used to register one or more &struct kunit_suite
* with KUnit.
@@ -226,20 +257,22 @@ int kunit_run_tests(struct kunit_suite *suite);
static struct kunit_suite *suites[] = { __VA_ARGS__, NULL}; \
static int kunit_test_suites_init(void) \
{ \
unsigned int i; \
for (i = 0; suites[i] != NULL; i++) \
kunit_run_tests(suites[i]); \
return 0; \
return __kunit_test_suites_init(suites); \
} \
late_initcall(kunit_test_suites_init); \
static void __exit kunit_test_suites_exit(void) \
{ \
return; \
return __kunit_test_suites_exit(suites); \
} \
module_exit(kunit_test_suites_exit)
#define kunit_test_suite(suite) kunit_test_suites(&suite)
#define kunit_suite_for_each_test_case(suite, test_case) \
for (test_case = suite->test_cases; test_case->run_case; test_case++)
bool kunit_suite_has_succeeded(struct kunit_suite *suite);
/*
* Like kunit_alloc_resource() below, but returns the struct kunit_resource
* object that contains the allocation. This is mostly for testing purposes.
@@ -356,8 +389,22 @@ static inline void *kunit_kzalloc(struct kunit *test, size_t size, gfp_t gfp)
void kunit_cleanup(struct kunit *test);
#define kunit_printk(lvl, test, fmt, ...) \
printk(lvl "\t# %s: " fmt, (test)->name, ##__VA_ARGS__)
void kunit_log_append(char *log, const char *fmt, ...);
/*
* printk and log to per-test or per-suite log buffer. Logging only done
* if CONFIG_KUNIT_DEBUGFS is 'y'; if it is 'n', no log is allocated/used.
*/
#define kunit_log(lvl, test_or_suite, fmt, ...) \
do { \
printk(lvl fmt, ##__VA_ARGS__); \
kunit_log_append((test_or_suite)->log, fmt "\n", \
##__VA_ARGS__); \
} while (0)
#define kunit_printk(lvl, test, fmt, ...) \
kunit_log(lvl, test, KUNIT_SUBTEST_INDENT "# %s: " fmt, \
(test)->name, ##__VA_ARGS__)
/**
* kunit_info() - Prints an INFO level message associated with @test.

4
include/kvm/arm_vgic.h
View File

@@ -70,6 +70,7 @@ struct vgic_global {
/* Hardware has GICv4? */
bool has_gicv4;
bool has_gicv4_1;
/* GIC system register CPU interface */
struct static_key_false gicv3_cpuif;
@@ -230,6 +231,9 @@ struct vgic_dist {
/* distributor enabled */
bool enabled;
/* Wants SGIs without active state */
bool nassgireq;
struct vgic_irq *spis;
struct vgic_io_device dist_iodev;

34
include/linux/acpi.h
View File

@@ -416,9 +416,30 @@ extern void acpi_osi_setup(char *str);
extern bool acpi_osi_is_win8(void);
#ifdef CONFIG_ACPI_NUMA
int acpi_map_pxm_to_online_node(int pxm);
int acpi_map_pxm_to_node(int pxm);
int acpi_get_node(acpi_handle handle);
/**
* acpi_map_pxm_to_online_node - Map proximity ID to online node
* @pxm: ACPI proximity ID
*
* This is similar to acpi_map_pxm_to_node(), but always returns an online
* node. When the mapped node from a given proximity ID is offline, it
* looks up the node distance table and returns the nearest online node.
*
* ACPI device drivers, which are called after the NUMA initialization has
* completed in the kernel, can call this interface to obtain their device
* NUMA topology from ACPI tables. Such drivers do not have to deal with
* offline nodes. A node may be offline when a device proximity ID is
* unique, SRAT memory entry does not exist, or NUMA is disabled, ex.
* "numa=off" on x86.
*/
static inline int acpi_map_pxm_to_online_node(int pxm)
{
int node = acpi_map_pxm_to_node(pxm);
return numa_map_to_online_node(node);
}
#else
static inline int acpi_map_pxm_to_online_node(int pxm)
{
@@ -488,6 +509,11 @@ void __init acpi_nvs_nosave_s3(void);
void __init acpi_sleep_no_blacklist(void);
#endif /* CONFIG_PM_SLEEP */
int acpi_register_wakeup_handler(
int wake_irq, bool (*wakeup)(void *context), void *context);
void acpi_unregister_wakeup_handler(
bool (*wakeup)(void *context), void *context);
struct acpi_osc_context {
char *uuid_str; /* UUID string */
int rev;
@@ -530,8 +556,9 @@ extern bool osc_pc_lpi_support_confirmed;
#define OSC_PCI_CLOCK_PM_SUPPORT 0x00000004
#define OSC_PCI_SEGMENT_GROUPS_SUPPORT 0x00000008
#define OSC_PCI_MSI_SUPPORT 0x00000010
#define OSC_PCI_EDR_SUPPORT 0x00000080
#define OSC_PCI_HPX_TYPE_3_SUPPORT 0x00000100
#define OSC_PCI_SUPPORT_MASKS 0x0000011f
#define OSC_PCI_SUPPORT_MASKS 0x0000019f
/* PCI Host Bridge _OSC: Capabilities DWORD 3: Control Field */
#define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL 0x00000001
@@ -540,7 +567,8 @@ extern bool osc_pc_lpi_support_confirmed;
#define OSC_PCI_EXPRESS_AER_CONTROL 0x00000008
#define OSC_PCI_EXPRESS_CAPABILITY_CONTROL 0x00000010
#define OSC_PCI_EXPRESS_LTR_CONTROL 0x00000020
#define OSC_PCI_CONTROL_MASKS 0x0000003f
#define OSC_PCI_EXPRESS_DPC_CONTROL 0x00000080
#define OSC_PCI_CONTROL_MASKS 0x000000bf
#define ACPI_GSB_ACCESS_ATTRIB_QUICK 0x00000002
#define ACPI_GSB_ACCESS_ATTRIB_SEND_RCV 0x00000004

9
include/linux/aer.h
View File

@@ -44,8 +44,7 @@ struct aer_capability_regs {
/* PCIe port driver needs this function to enable AER */
int pci_enable_pcie_error_reporting(struct pci_dev *dev);
int pci_disable_pcie_error_reporting(struct pci_dev *dev);
int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
int pci_cleanup_aer_error_status_regs(struct pci_dev *dev);
int pci_aer_clear_nonfatal_status(struct pci_dev *dev);
void pci_save_aer_state(struct pci_dev *dev);
void pci_restore_aer_state(struct pci_dev *dev);
#else
@@ -57,11 +56,7 @@ static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev)
{
return -EINVAL;
}
static inline int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
{
return -EINVAL;
}
static inline int pci_cleanup_aer_error_status_regs(struct pci_dev *dev)
static inline int pci_aer_clear_nonfatal_status(struct pci_dev *dev)
{
return -EINVAL;
}

19
include/linux/arch_topology.h
View File

@@ -16,9 +16,7 @@ bool topology_parse_cpu_capacity(struct device_node *cpu_node, int cpu);
DECLARE_PER_CPU(unsigned long, cpu_scale);
struct sched_domain;
static inline
unsigned long topology_get_cpu_scale(int cpu)
static inline unsigned long topology_get_cpu_scale(int cpu)
{
return per_cpu(cpu_scale, cpu);
}
@@ -27,12 +25,23 @@ void topology_set_cpu_scale(unsigned int cpu, unsigned long capacity);
DECLARE_PER_CPU(unsigned long, freq_scale);
static inline
unsigned long topology_get_freq_scale(int cpu)
static inline unsigned long topology_get_freq_scale(int cpu)
{
return per_cpu(freq_scale, cpu);
}
bool arch_freq_counters_available(struct cpumask *cpus);
DECLARE_PER_CPU(unsigned long, thermal_pressure);
static inline unsigned long topology_get_thermal_pressure(int cpu)
{
return per_cpu(thermal_pressure, cpu);
}
void arch_set_thermal_pressure(struct cpumask *cpus,
unsigned long th_pressure);
struct cpu_topology {
int thread_id;
int core_id;

58
include/linux/atmel-isc-media.h Normal file
View File

@@ -0,0 +1,58 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries
*
* Author: Eugen Hristev <eugen.hristev@microchip.com>
*/
#ifndef __LINUX_ATMEL_ISC_MEDIA_H__
#define __LINUX_ATMEL_ISC_MEDIA_H__
/*
* There are 8 controls available:
* 4 gain controls, sliders, for each of the BAYER components: R, B, GR, GB.
* These gains are multipliers for each component, in format unsigned 0:4:9 with
* a default value of 512 (1.0 multiplier).
* 4 offset controls, sliders, for each of the BAYER components: R, B, GR, GB.
* These offsets are added/substracted from each component, in format signed
* 1:12:0 with a default value of 0 (+/- 0)
*
* To expose this to userspace, added 8 custom controls, in an auto cluster.
*
* To summarize the functionality:
* The auto cluster switch is the auto white balance control, and it works
* like this:
* AWB == 1: autowhitebalance is on, the do_white_balance button is inactive,
* the gains/offsets are inactive, but volatile and readable.
* Thus, the results of the whitebalance algorithm are available to userspace to
* read at any time.
* AWB == 0: autowhitebalance is off, cluster is in manual mode, user can
* configure the gain/offsets directly.
* More than that, if the do_white_balance button is
* pressed, the driver will perform one-time-adjustment, (preferably with color
* checker card) and the userspace can read again the new values.
*
* With this feature, the userspace can save the coefficients and reinstall them
* for example after reboot or reprobing the driver.
*/
enum atmel_isc_ctrl_id {
/* Red component gain control */
ISC_CID_R_GAIN = (V4L2_CID_USER_ATMEL_ISC_BASE + 0),
/* Blue component gain control */
ISC_CID_B_GAIN,
/* Green Red component gain control */
ISC_CID_GR_GAIN,
/* Green Blue gain control */
ISC_CID_GB_GAIN,
/* Red component offset control */
ISC_CID_R_OFFSET,
/* Blue component offset control */
ISC_CID_B_OFFSET,
/* Green Red component offset control */
ISC_CID_GR_OFFSET,
/* Green Blue component offset control */
ISC_CID_GB_OFFSET,
};
#endif

8
include/linux/binfmts.h
View File

@@ -44,7 +44,13 @@ struct linux_binprm {
* exec has happened. Used to sanitize execution environment
* and to set AT_SECURE auxv for glibc.
*/
secureexec:1;
secureexec:1,
/*
* Set by flush_old_exec, when exec_mmap has been called.
* This is past the point of no return, when the
* exec_update_mutex has been taken.
*/
called_exec_mmap:1;
#ifdef __alpha__
unsigned int taso:1;
#endif

15
include/linux/bio.h
View File

@@ -441,14 +441,6 @@ void __bio_add_page(struct bio *bio, struct page *page,
unsigned int len, unsigned int off);
int bio_iov_iter_get_pages(struct bio *bio, struct iov_iter *iter);
void bio_release_pages(struct bio *bio, bool mark_dirty);
struct rq_map_data;
extern struct bio *bio_map_user_iov(struct request_queue *,
struct iov_iter *, gfp_t);
extern void bio_unmap_user(struct bio *);
extern struct bio *bio_map_kern(struct request_queue *, void *, unsigned int,
gfp_t);
extern struct bio *bio_copy_kern(struct request_queue *, void *, unsigned int,
gfp_t, int);
extern void bio_set_pages_dirty(struct bio *bio);
extern void bio_check_pages_dirty(struct bio *bio);
@@ -463,14 +455,9 @@ extern void bio_copy_data_iter(struct bio *dst, struct bvec_iter *dst_iter,
extern void bio_copy_data(struct bio *dst, struct bio *src);
extern void bio_list_copy_data(struct bio *dst, struct bio *src);
extern void bio_free_pages(struct bio *bio);
extern struct bio *bio_copy_user_iov(struct request_queue *,
struct rq_map_data *,
struct iov_iter *,
gfp_t);
extern int bio_uncopy_user(struct bio *);
void zero_fill_bio_iter(struct bio *bio, struct bvec_iter iter);
void bio_truncate(struct bio *bio, unsigned new_size);
void guard_bio_eod(struct bio *bio);
static inline void zero_fill_bio(struct bio *bio)
{

14
include/linux/bitfield.h
View File

@@ -55,6 +55,19 @@
(1ULL << __bf_shf(_mask))); \
})
/**
* FIELD_MAX() - produce the maximum value representable by a field
* @_mask: shifted mask defining the field's length and position
*
* FIELD_MAX() returns the maximum value that can be held in the field
* specified by @_mask.
*/
#define FIELD_MAX(_mask) \
({ \
__BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \
(typeof(_mask))((_mask) >> __bf_shf(_mask)); \
})
/**
* FIELD_FIT() - check if value fits in the field
* @_mask: shifted mask defining the field's length and position
@@ -110,6 +123,7 @@ static __always_inline u64 field_mask(u64 field)
{
return field / field_multiplier(field);
}
#define field_max(field) ((typeof(field))field_mask(field))
#define ____MAKE_OP(type,base,to,from) \
static __always_inline __##type type##_encode_bits(base v, base field) \
{ \

8
include/linux/bitmap.h
View File

@@ -50,7 +50,13 @@
* bitmap_set(dst, pos, nbits) Set specified bit area
* bitmap_clear(dst, pos, nbits) Clear specified bit area
* bitmap_find_next_zero_area(buf, len, pos, n, mask) Find bit free area
* bitmap_find_next_zero_area_off(buf, len, pos, n, mask) as above
* bitmap_find_next_zero_area_off(buf, len, pos, n, mask, mask_off) as above
* bitmap_next_clear_region(map, &start, &end, nbits) Find next clear region
* bitmap_next_set_region(map, &start, &end, nbits) Find next set region
* bitmap_for_each_clear_region(map, rs, re, start, end)
* Iterate over all clear regions
* bitmap_for_each_set_region(map, rs, re, start, end)
* Iterate over all set regions
* bitmap_shift_right(dst, src, n, nbits) *dst = *src >> n
* bitmap_shift_left(dst, src, n, nbits) *dst = *src << n
* bitmap_cut(dst, src, first, n, nbits) Cut n bits from first, copy rest

4
include/linux/bitops.h
View File

@@ -162,7 +162,7 @@ static inline __u8 ror8(__u8 word, unsigned int shift)
*
* This is safe to use for 16- and 8-bit types as well.
*/
static inline __s32 sign_extend32(__u32 value, int index)
static __always_inline __s32 sign_extend32(__u32 value, int index)
{
__u8 shift = 31 - index;
return (__s32)(value << shift) >> shift;
@@ -173,7 +173,7 @@ static inline __s32 sign_extend32(__u32 value, int index)
* @value: value to sign extend
* @index: 0 based bit index (0<=index<64) to sign bit
*/
static inline __s64 sign_extend64(__u64 value, int index)
static __always_inline __s64 sign_extend64(__u64 value, int index)
{
__u8 shift = 63 - index;
return (__s64)(value << shift) >> shift;

24
include/linux/bits.h
View File

@@ -3,9 +3,9 @@
#define __LINUX_BITS_H
#include <linux/const.h>
#include <vdso/bits.h>
#include <asm/bitsperlong.h>
#define BIT(nr) (UL(1) << (nr))
#define BIT_ULL(nr) (ULL(1) << (nr))
#define BIT_MASK(nr) (UL(1) << ((nr) % BITS_PER_LONG))
#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
@@ -18,12 +18,30 @@
* position @h. For example
* GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000.
*/
#define GENMASK(h, l) \
#if !defined(__ASSEMBLY__) && \
(!defined(CONFIG_CC_IS_GCC) || CONFIG_GCC_VERSION >= 49000)
#include <linux/build_bug.h>
#define GENMASK_INPUT_CHECK(h, l) \
(BUILD_BUG_ON_ZERO(__builtin_choose_expr( \
__builtin_constant_p((l) > (h)), (l) > (h), 0)))
#else
/*
* BUILD_BUG_ON_ZERO is not available in h files included from asm files,
* disable the input check if that is the case.
*/
#define GENMASK_INPUT_CHECK(h, l) 0
#endif
#define __GENMASK(h, l) \
(((~UL(0)) - (UL(1) << (l)) + 1) & \
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
#define GENMASK(h, l) \
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
#define GENMASK_ULL(h, l) \
#define __GENMASK_ULL(h, l) \
(((~ULL(0)) - (ULL(1) << (l)) + 1) & \
(~ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h))))
#define GENMASK_ULL(h, l) \
(GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l))
#endif /* __LINUX_BITS_H */

43
include/linux/blk-cgroup.h
View File

@@ -46,6 +46,7 @@ struct blkcg_gq;
struct blkcg {
struct cgroup_subsys_state css;
spinlock_t lock;
refcount_t online_pin;
struct radix_tree_root blkg_tree;
struct blkcg_gq __rcu *blkg_hint;
@@ -56,7 +57,6 @@ struct blkcg {
struct list_head all_blkcgs_node;
#ifdef CONFIG_CGROUP_WRITEBACK
struct list_head cgwb_list;
refcount_t cgwb_refcnt;
#endif
};
@@ -412,47 +412,38 @@ static inline struct blkcg *cpd_to_blkcg(struct blkcg_policy_data *cpd)
extern void blkcg_destroy_blkgs(struct blkcg *blkcg);
#ifdef CONFIG_CGROUP_WRITEBACK
/**
* blkcg_cgwb_get - get a reference for blkcg->cgwb_list
* blkcg_pin_online - pin online state
* @blkcg: blkcg of interest
*
* This is used to track the number of active wb's related to a blkcg.
* While pinned, a blkcg is kept online. This is primarily used to
* impedance-match blkg and cgwb lifetimes so that blkg doesn't go offline
* while an associated cgwb is still active.
*/
static inline void blkcg_cgwb_get(struct blkcg *blkcg)
static inline void blkcg_pin_online(struct blkcg *blkcg)
{
refcount_inc(&blkcg->cgwb_refcnt);
refcount_inc(&blkcg->online_pin);
}
/**
* blkcg_cgwb_put - put a reference for @blkcg->cgwb_list
* blkcg_unpin_online - unpin online state
* @blkcg: blkcg of interest
*
* This is used to track the number of active wb's related to a blkcg.
* When this count goes to zero, all active wb has finished so the
* This is primarily used to impedance-match blkg and cgwb lifetimes so
* that blkg doesn't go offline while an associated cgwb is still active.
* When this count goes to zero, all active cgwbs have finished so the
* blkcg can continue destruction by calling blkcg_destroy_blkgs().
* This work may occur in cgwb_release_workfn() on the cgwb_release
* workqueue.
*/
static inline void blkcg_cgwb_put(struct blkcg *blkcg)
static inline void blkcg_unpin_online(struct blkcg *blkcg)
{
if (refcount_dec_and_test(&blkcg->cgwb_refcnt))
do {
if (!refcount_dec_and_test(&blkcg->online_pin))
break;
blkcg_destroy_blkgs(blkcg);
blkcg = blkcg_parent(blkcg);
} while (blkcg);
}
#else
static inline void blkcg_cgwb_get(struct blkcg *blkcg) { }
static inline void blkcg_cgwb_put(struct blkcg *blkcg)
{
/* wb isn't being accounted, so trigger destruction right away */
blkcg_destroy_blkgs(blkcg);
}
#endif
/**
* blkg_path - format cgroup path of blkg
* @blkg: blkg of interest

7
include/linux/blk-mq.h
View File

@@ -162,7 +162,10 @@ struct blk_mq_hw_ctx {
struct dentry *sched_debugfs_dir;
#endif
/** @hctx_list: List of all hardware queues. */
/**
* @hctx_list: if this hctx is not in use, this is an entry in
* q->unused_hctx_list.
*/
struct list_head hctx_list;
/**
@@ -409,6 +412,8 @@ enum {
<< BLK_MQ_F_ALLOC_POLICY_START_BIT)
struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *);
struct request_queue *blk_mq_init_queue_data(struct blk_mq_tag_set *set,
void *queuedata);
struct request_queue *blk_mq_init_allocated_queue(struct blk_mq_tag_set *set,
struct request_queue *q,
bool elevator_init);

18
include/linux/blkdev.h
View File

@@ -952,6 +952,10 @@ static inline unsigned int blk_rq_stats_sectors(const struct request *rq)
}
#ifdef CONFIG_BLK_DEV_ZONED
/* Helper to convert BLK_ZONE_ZONE_XXX to its string format XXX */
const char *blk_zone_cond_str(enum blk_zone_cond zone_cond);
static inline unsigned int blk_rq_zone_no(struct request *rq)
{
return blk_queue_zone_no(rq->q, blk_rq_pos(rq));
@@ -1063,7 +1067,6 @@ extern void blk_abort_request(struct request *);
* Access functions for manipulating queue properties
*/
extern void blk_cleanup_queue(struct request_queue *);
extern void blk_queue_make_request(struct request_queue *, make_request_fn *);
extern void blk_queue_bounce_limit(struct request_queue *, u64);
extern void blk_queue_max_hw_sectors(struct request_queue *, unsigned int);
extern void blk_queue_chunk_sectors(struct request_queue *, unsigned int);
@@ -1140,8 +1143,7 @@ extern void blk_dump_rq_flags(struct request *, char *);
extern long nr_blockdev_pages(void);
bool __must_check blk_get_queue(struct request_queue *);
struct request_queue *blk_alloc_queue(gfp_t);
struct request_queue *blk_alloc_queue_node(gfp_t gfp_mask, int node_id);
struct request_queue *blk_alloc_queue(make_request_fn make_request, int node_id);
extern void blk_put_queue(struct request_queue *);
extern void blk_set_queue_dying(struct request_queue *);
@@ -1484,15 +1486,6 @@ static inline unsigned int block_size(struct block_device *bdev)
return bdev->bd_block_size;
}
typedef struct {struct page *v;} Sector;
unsigned char *read_dev_sector(struct block_device *, sector_t, Sector *);
static inline void put_dev_sector(Sector p)
{
put_page(p.v);
}
int kblockd_schedule_work(struct work_struct *work);
int kblockd_mod_delayed_work_on(int cpu, struct delayed_work *dwork, unsigned long delay);
@@ -1706,6 +1699,7 @@ struct block_device_operations {
void (*swap_slot_free_notify) (struct block_device *, unsigned long);
int (*report_zones)(struct gendisk *, sector_t sector,
unsigned int nr_zones, report_zones_cb cb, void *data);
char *(*devnode)(struct gendisk *disk, umode_t *mode);
struct module *owner;
const struct pr_ops *pr_ops;
};

3
include/linux/bootconfig.h
View File

@@ -216,7 +216,8 @@ static inline int __init xbc_node_compose_key(struct xbc_node *node,
}
/* XBC node initializer */
int __init xbc_init(char *buf);
int __init xbc_init(char *buf, const char **emsg, int *epos);
/* XBC cleanup data structures */
void __init xbc_destroy_all(void);

43
include/linux/bpf-cgroup.h
View File

@@ -36,7 +36,7 @@ struct bpf_cgroup_storage_map;
struct bpf_storage_buffer {
struct rcu_head rcu;
char data[0];
char data[];
};
struct bpf_cgroup_storage {
@@ -51,9 +51,18 @@ struct bpf_cgroup_storage {
struct rcu_head rcu;
};
struct bpf_cgroup_link {
struct bpf_link link;
struct cgroup *cgroup;
enum bpf_attach_type type;
};
extern const struct bpf_link_ops bpf_cgroup_link_lops;
struct bpf_prog_list {
struct list_head node;
struct bpf_prog *prog;
struct bpf_cgroup_link *link;
struct bpf_cgroup_storage *storage[MAX_BPF_CGROUP_STORAGE_TYPE];
};
@@ -84,20 +93,27 @@ struct cgroup_bpf {
int cgroup_bpf_inherit(struct cgroup *cgrp);
void cgroup_bpf_offline(struct cgroup *cgrp);
int __cgroup_bpf_attach(struct cgroup *cgrp, struct bpf_prog *prog,
struct bpf_prog *replace_prog,
int __cgroup_bpf_attach(struct cgroup *cgrp,
struct bpf_prog *prog, struct bpf_prog *replace_prog,
struct bpf_cgroup_link *link,
enum bpf_attach_type type, u32 flags);
int __cgroup_bpf_detach(struct cgroup *cgrp, struct bpf_prog *prog,
struct bpf_cgroup_link *link,
enum bpf_attach_type type);
int __cgroup_bpf_replace(struct cgroup *cgrp, struct bpf_cgroup_link *link,
struct bpf_prog *new_prog);
int __cgroup_bpf_query(struct cgroup *cgrp, const union bpf_attr *attr,
union bpf_attr __user *uattr);
/* Wrapper for __cgroup_bpf_*() protected by cgroup_mutex */
int cgroup_bpf_attach(struct cgroup *cgrp, struct bpf_prog *prog,
struct bpf_prog *replace_prog, enum bpf_attach_type type,
int cgroup_bpf_attach(struct cgroup *cgrp,
struct bpf_prog *prog, struct bpf_prog *replace_prog,
struct bpf_cgroup_link *link, enum bpf_attach_type type,
u32 flags);
int cgroup_bpf_detach(struct cgroup *cgrp, struct bpf_prog *prog,
enum bpf_attach_type type, u32 flags);
enum bpf_attach_type type);
int cgroup_bpf_replace(struct bpf_link *link, struct bpf_prog *old_prog,
struct bpf_prog *new_prog);
int cgroup_bpf_query(struct cgroup *cgrp, const union bpf_attr *attr,
union bpf_attr __user *uattr);
@@ -332,11 +348,13 @@ int cgroup_bpf_prog_attach(const union bpf_attr *attr,
enum bpf_prog_type ptype, struct bpf_prog *prog);
int cgroup_bpf_prog_detach(const union bpf_attr *attr,
enum bpf_prog_type ptype);
int cgroup_bpf_link_attach(const union bpf_attr *attr, struct bpf_prog *prog);
int cgroup_bpf_prog_query(const union bpf_attr *attr,
union bpf_attr __user *uattr);
#else
struct bpf_prog;
struct bpf_link;
struct cgroup_bpf {};
static inline int cgroup_bpf_inherit(struct cgroup *cgrp) { return 0; }
static inline void cgroup_bpf_offline(struct cgroup *cgrp) {}
@@ -354,6 +372,19 @@ static inline int cgroup_bpf_prog_detach(const union bpf_attr *attr,
return -EINVAL;
}
static inline int cgroup_bpf_link_attach(const union bpf_attr *attr,
struct bpf_prog *prog)
{
return -EINVAL;
}
static inline int cgroup_bpf_replace(struct bpf_link *link,
struct bpf_prog *old_prog,
struct bpf_prog *new_prog)
{
return -EINVAL;
}
static inline int cgroup_bpf_prog_query(const union bpf_attr *attr,
union bpf_attr __user *uattr)
{

164
include/linux/bpf.h
View File

@@ -18,6 +18,7 @@
#include <linux/refcount.h>
#include <linux/mutex.h>
#include <linux/module.h>
#include <linux/kallsyms.h>
struct bpf_verifier_env;
struct bpf_verifier_log;
@@ -160,6 +161,7 @@ static inline void copy_map_value(struct bpf_map *map, void *dst, void *src)
}
void copy_map_value_locked(struct bpf_map *map, void *dst, void *src,
bool lock_src);
int bpf_obj_name_cpy(char *dst, const char *src, unsigned int size);
struct bpf_offload_dev;
struct bpf_offloaded_map;
@@ -232,6 +234,7 @@ enum bpf_arg_type {
ARG_CONST_SIZE_OR_ZERO, /* number of bytes accessed from memory or 0 */
ARG_PTR_TO_CTX, /* pointer to context */
ARG_PTR_TO_CTX_OR_NULL, /* pointer to context or NULL */
ARG_ANYTHING, /* any (initialized) argument is ok */
ARG_PTR_TO_SPIN_LOCK, /* pointer to bpf_spin_lock */
ARG_PTR_TO_SOCK_COMMON, /* pointer to sock_common */
@@ -433,6 +436,16 @@ struct btf_func_model {
*/
#define BPF_TRAMP_F_SKIP_FRAME BIT(2)
/* Each call __bpf_prog_enter + call bpf_func + call __bpf_prog_exit is ~50
* bytes on x86. Pick a number to fit into BPF_IMAGE_SIZE / 2
*/
#define BPF_MAX_TRAMP_PROGS 40
struct bpf_tramp_progs {
struct bpf_prog *progs[BPF_MAX_TRAMP_PROGS];
int nr_progs;
};
/* Different use cases for BPF trampoline:
* 1. replace nop at the function entry (kprobe equivalent)
* flags = BPF_TRAMP_F_RESTORE_REGS
@@ -455,16 +468,25 @@ struct btf_func_model {
*/
int arch_prepare_bpf_trampoline(void *image, void *image_end,
const struct btf_func_model *m, u32 flags,
struct bpf_prog **fentry_progs, int fentry_cnt,
struct bpf_prog **fexit_progs, int fexit_cnt,
struct bpf_tramp_progs *tprogs,
void *orig_call);
/* these two functions are called from generated trampoline */
u64 notrace __bpf_prog_enter(void);
void notrace __bpf_prog_exit(struct bpf_prog *prog, u64 start);
struct bpf_ksym {
unsigned long start;
unsigned long end;
char name[KSYM_NAME_LEN];
struct list_head lnode;
struct latch_tree_node tnode;
bool prog;
};
enum bpf_tramp_prog_type {
BPF_TRAMP_FENTRY,
BPF_TRAMP_FEXIT,
BPF_TRAMP_MODIFY_RETURN,
BPF_TRAMP_MAX,
BPF_TRAMP_REPLACE, /* more than MAX */
};
@@ -493,6 +515,7 @@ struct bpf_trampoline {
/* Executable image of trampoline */
void *image;
u64 selector;
struct bpf_ksym ksym;
};
#define BPF_DISPATCHER_MAX 48 /* Fits in 2048B */
@@ -510,9 +533,10 @@ struct bpf_dispatcher {
int num_progs;
void *image;
u32 image_off;
struct bpf_ksym ksym;
};
static __always_inline unsigned int bpf_dispatcher_nopfunc(
static __always_inline unsigned int bpf_dispatcher_nop_func(
const void *ctx,
const struct bpf_insn *insnsi,
unsigned int (*bpf_func)(const void *,
@@ -525,17 +549,21 @@ struct bpf_trampoline *bpf_trampoline_lookup(u64 key);
int bpf_trampoline_link_prog(struct bpf_prog *prog);
int bpf_trampoline_unlink_prog(struct bpf_prog *prog);
void bpf_trampoline_put(struct bpf_trampoline *tr);
#define BPF_DISPATCHER_INIT(name) { \
.mutex = __MUTEX_INITIALIZER(name.mutex), \
.func = &name##func, \
.progs = {}, \
.num_progs = 0, \
.image = NULL, \
.image_off = 0 \
#define BPF_DISPATCHER_INIT(_name) { \
.mutex = __MUTEX_INITIALIZER(_name.mutex), \
.func = &_name##_func, \
.progs = {}, \
.num_progs = 0, \
.image = NULL, \
.image_off = 0, \
.ksym = { \
.name = #_name, \
.lnode = LIST_HEAD_INIT(_name.ksym.lnode), \
}, \
}
#define DEFINE_BPF_DISPATCHER(name) \
noinline unsigned int name##func( \
noinline unsigned int bpf_dispatcher_##name##_func( \
const void *ctx, \
const struct bpf_insn *insnsi, \
unsigned int (*bpf_func)(const void *, \
@@ -543,26 +571,26 @@ void bpf_trampoline_put(struct bpf_trampoline *tr);
{ \
return bpf_func(ctx, insnsi); \
} \
EXPORT_SYMBOL(name##func); \
struct bpf_dispatcher name = BPF_DISPATCHER_INIT(name);
EXPORT_SYMBOL(bpf_dispatcher_##name##_func); \
struct bpf_dispatcher bpf_dispatcher_##name = \
BPF_DISPATCHER_INIT(bpf_dispatcher_##name);
#define DECLARE_BPF_DISPATCHER(name) \
unsigned int name##func( \
unsigned int bpf_dispatcher_##name##_func( \
const void *ctx, \
const struct bpf_insn *insnsi, \
unsigned int (*bpf_func)(const void *, \
const struct bpf_insn *)); \
extern struct bpf_dispatcher name;
#define BPF_DISPATCHER_FUNC(name) name##func
#define BPF_DISPATCHER_PTR(name) (&name)
extern struct bpf_dispatcher bpf_dispatcher_##name;
#define BPF_DISPATCHER_FUNC(name) bpf_dispatcher_##name##_func
#define BPF_DISPATCHER_PTR(name) (&bpf_dispatcher_##name)
void bpf_dispatcher_change_prog(struct bpf_dispatcher *d, struct bpf_prog *from,
struct bpf_prog *to);
struct bpf_image {
struct latch_tree_node tnode;
unsigned char data[];
};
#define BPF_IMAGE_SIZE (PAGE_SIZE - sizeof(struct bpf_image))
bool is_bpf_image_address(unsigned long address);
void *bpf_image_alloc(void);
/* Called only from JIT-enabled code, so there's no need for stubs. */
void *bpf_jit_alloc_exec_page(void);
void bpf_image_ksym_add(void *data, struct bpf_ksym *ksym);
void bpf_image_ksym_del(struct bpf_ksym *ksym);
void bpf_ksym_add(struct bpf_ksym *ksym);
void bpf_ksym_del(struct bpf_ksym *ksym);
#else
static inline struct bpf_trampoline *bpf_trampoline_lookup(u64 key)
{
@@ -579,7 +607,7 @@ static inline int bpf_trampoline_unlink_prog(struct bpf_prog *prog)
static inline void bpf_trampoline_put(struct bpf_trampoline *tr) {}
#define DEFINE_BPF_DISPATCHER(name)
#define DECLARE_BPF_DISPATCHER(name)
#define BPF_DISPATCHER_FUNC(name) bpf_dispatcher_nopfunc
#define BPF_DISPATCHER_FUNC(name) bpf_dispatcher_nop_func
#define BPF_DISPATCHER_PTR(name) NULL
static inline void bpf_dispatcher_change_prog(struct bpf_dispatcher *d,
struct bpf_prog *from,
@@ -640,8 +668,7 @@ struct bpf_prog_aux {
void *jit_data; /* JIT specific data. arch dependent */
struct bpf_jit_poke_descriptor *poke_tab;
u32 size_poke_tab;
struct latch_tree_node ksym_tnode;
struct list_head ksym_lnode;
struct bpf_ksym ksym;
const struct bpf_prog_ops *ops;
struct bpf_map **used_maps;
struct bpf_prog *prog;
@@ -859,7 +886,7 @@ struct bpf_prog_array_item {
struct bpf_prog_array {
struct rcu_head rcu;
struct bpf_prog_array_item items[0];
struct bpf_prog_array_item items[];
};
struct bpf_prog_array *bpf_prog_array_alloc(u32 prog_cnt, gfp_t flags);
@@ -885,7 +912,7 @@ int bpf_prog_array_copy(struct bpf_prog_array *old_array,
struct bpf_prog *_prog; \
struct bpf_prog_array *_array; \
u32 _ret = 1; \
preempt_disable(); \
migrate_disable(); \
rcu_read_lock(); \
_array = rcu_dereference(array); \
if (unlikely(check_non_null && !_array))\
@@ -898,7 +925,7 @@ int bpf_prog_array_copy(struct bpf_prog_array *old_array,
} \
_out: \
rcu_read_unlock(); \
preempt_enable(); \
migrate_enable(); \
_ret; \
})
@@ -932,7 +959,7 @@ _out: \
u32 ret; \
u32 _ret = 1; \
u32 _cn = 0; \
preempt_disable(); \
migrate_disable(); \
rcu_read_lock(); \
_array = rcu_dereference(array); \
_item = &_array->items[0]; \
@@ -944,7 +971,7 @@ _out: \
_item++; \
} \
rcu_read_unlock(); \
preempt_enable(); \
migrate_enable(); \
if (_ret) \
_ret = (_cn ? NET_XMIT_CN : NET_XMIT_SUCCESS); \
else \
@@ -961,6 +988,36 @@ _out: \
#ifdef CONFIG_BPF_SYSCALL
DECLARE_PER_CPU(int, bpf_prog_active);
/*
* Block execution of BPF programs attached to instrumentation (perf,
* kprobes, tracepoints) to prevent deadlocks on map operations as any of
* these events can happen inside a region which holds a map bucket lock
* and can deadlock on it.
*
* Use the preemption safe inc/dec variants on RT because migrate disable
* is preemptible on RT and preemption in the middle of the RMW operation
* might lead to inconsistent state. Use the raw variants for non RT
* kernels as migrate_disable() maps to preempt_disable() so the slightly
* more expensive save operation can be avoided.
*/
static inline void bpf_disable_instrumentation(void)
{
migrate_disable();
if (IS_ENABLED(CONFIG_PREEMPT_RT))
this_cpu_inc(bpf_prog_active);
else
__this_cpu_inc(bpf_prog_active);
}
static inline void bpf_enable_instrumentation(void)
{
if (IS_ENABLED(CONFIG_PREEMPT_RT))
this_cpu_dec(bpf_prog_active);
else
__this_cpu_dec(bpf_prog_active);
migrate_enable();
}
extern const struct file_operations bpf_map_fops;
extern const struct file_operations bpf_prog_fops;
@@ -993,6 +1050,7 @@ void __bpf_free_used_maps(struct bpf_prog_aux *aux,
void bpf_prog_free_id(struct bpf_prog *prog, bool do_idr_lock);
void bpf_map_free_id(struct bpf_map *map, bool do_idr_lock);
struct bpf_map *bpf_map_get(u32 ufd);
struct bpf_map *bpf_map_get_with_uref(u32 ufd);
struct bpf_map *__bpf_map_get(struct fd f);
void bpf_map_inc(struct bpf_map *map);
@@ -1025,6 +1083,29 @@ extern int sysctl_unprivileged_bpf_disabled;
int bpf_map_new_fd(struct bpf_map *map, int flags);
int bpf_prog_new_fd(struct bpf_prog *prog);
struct bpf_link {
atomic64_t refcnt;
const struct bpf_link_ops *ops;
struct bpf_prog *prog;
struct work_struct work;
};
struct bpf_link_ops {
void (*release)(struct bpf_link *link);
void (*dealloc)(struct bpf_link *link);
};
void bpf_link_init(struct bpf_link *link, const struct bpf_link_ops *ops,
struct bpf_prog *prog);
void bpf_link_cleanup(struct bpf_link *link, struct file *link_file,
int link_fd);
void bpf_link_inc(struct bpf_link *link);
void bpf_link_put(struct bpf_link *link);
int bpf_link_new_fd(struct bpf_link *link);
struct file *bpf_link_new_file(struct bpf_link *link, int *reserved_fd);
struct bpf_link *bpf_link_get_from_fd(u32 ufd);
int bpf_obj_pin_user(u32 ufd, const char __user *pathname);
int bpf_obj_get_user(const char __user *pathname, int flags);
@@ -1102,6 +1183,9 @@ int bpf_prog_test_run_xdp(struct bpf_prog *prog, const union bpf_attr *kattr,
union bpf_attr __user *uattr);
int bpf_prog_test_run_skb(struct bpf_prog *prog, const union bpf_attr *kattr,
union bpf_attr __user *uattr);
int bpf_prog_test_run_tracing(struct bpf_prog *prog,
const union bpf_attr *kattr,
union bpf_attr __user *uattr);
int bpf_prog_test_run_flow_dissector(struct bpf_prog *prog,
const union bpf_attr *kattr,
union bpf_attr __user *uattr);
@@ -1259,6 +1343,13 @@ static inline int bpf_prog_test_run_skb(struct bpf_prog *prog,
return -ENOTSUPP;
}
static inline int bpf_prog_test_run_tracing(struct bpf_prog *prog,
const union bpf_attr *kattr,
union bpf_attr __user *uattr)
{
return -ENOTSUPP;
}
static inline int bpf_prog_test_run_flow_dissector(struct bpf_prog *prog,
const union bpf_attr *kattr,
union bpf_attr __user *uattr)
@@ -1355,6 +1446,8 @@ static inline void bpf_map_offload_map_free(struct bpf_map *map)
#if defined(CONFIG_BPF_STREAM_PARSER)
int sock_map_prog_update(struct bpf_map *map, struct bpf_prog *prog, u32 which);
int sock_map_get_from_fd(const union bpf_attr *attr, struct bpf_prog *prog);
void sock_map_unhash(struct sock *sk);
void sock_map_close(struct sock *sk, long timeout);
#else
static inline int sock_map_prog_update(struct bpf_map *map,
struct bpf_prog *prog, u32 which)
@@ -1367,7 +1460,7 @@ static inline int sock_map_get_from_fd(const union bpf_attr *attr,
{
return -EINVAL;
}
#endif
#endif /* CONFIG_BPF_STREAM_PARSER */
#if defined(CONFIG_INET) && defined(CONFIG_BPF_SYSCALL)
void bpf_sk_reuseport_detach(struct sock *sk);
@@ -1417,6 +1510,7 @@ extern const struct bpf_func_proto bpf_get_stack_proto;
extern const struct bpf_func_proto bpf_sock_map_update_proto;
extern const struct bpf_func_proto bpf_sock_hash_update_proto;
extern const struct bpf_func_proto bpf_get_current_cgroup_id_proto;
extern const struct bpf_func_proto bpf_get_current_ancestor_cgroup_id_proto;
extern const struct bpf_func_proto bpf_msg_redirect_hash_proto;
extern const struct bpf_func_proto bpf_msg_redirect_map_proto;
extern const struct bpf_func_proto bpf_sk_redirect_hash_proto;
@@ -1428,6 +1522,10 @@ extern const struct bpf_func_proto bpf_strtol_proto;
extern const struct bpf_func_proto bpf_strtoul_proto;
extern const struct bpf_func_proto bpf_tcp_sock_proto;
extern const struct bpf_func_proto bpf_jiffies64_proto;
extern const struct bpf_func_proto bpf_get_ns_current_pid_tgid_proto;
const struct bpf_func_proto *bpf_tracing_func_proto(
enum bpf_func_id func_id, const struct bpf_prog *prog);
/* Shared helpers among cBPF and eBPF. */
void bpf_user_rnd_init_once(void);

33
include/linux/bpf_lsm.h Normal file
View File

@@ -0,0 +1,33 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2020 Google LLC.
*/
#ifndef _LINUX_BPF_LSM_H
#define _LINUX_BPF_LSM_H
#include <linux/bpf.h>
#include <linux/lsm_hooks.h>
#ifdef CONFIG_BPF_LSM
#define LSM_HOOK(RET, DEFAULT, NAME, ...) \
RET bpf_lsm_##NAME(__VA_ARGS__);
#include <linux/lsm_hook_defs.h>
#undef LSM_HOOK
int bpf_lsm_verify_prog(struct bpf_verifier_log *vlog,
const struct bpf_prog *prog);
#else /* !CONFIG_BPF_LSM */
static inline int bpf_lsm_verify_prog(struct bpf_verifier_log *vlog,
const struct bpf_prog *prog)
{
return -EOPNOTSUPP;
}
#endif /* CONFIG_BPF_LSM */
#endif /* _LINUX_BPF_LSM_H */

4
include/linux/bpf_types.h
View File

@@ -70,6 +70,10 @@ BPF_PROG_TYPE(BPF_PROG_TYPE_STRUCT_OPS, bpf_struct_ops,
void *, void *)
BPF_PROG_TYPE(BPF_PROG_TYPE_EXT, bpf_extension,
void *, void *)
#ifdef CONFIG_BPF_LSM
BPF_PROG_TYPE(BPF_PROG_TYPE_LSM, lsm,
void *, void *)
#endif /* CONFIG_BPF_LSM */
#endif
BPF_MAP_TYPE(BPF_MAP_TYPE_ARRAY, array_map_ops)

4
include/linux/bpf_verifier.h
View File

@@ -123,6 +123,10 @@ struct bpf_reg_state {
s64 smax_value; /* maximum possible (s64)value */
u64 umin_value; /* minimum possible (u64)value */
u64 umax_value; /* maximum possible (u64)value */
s32 s32_min_value; /* minimum possible (s32)value */
s32 s32_max_value; /* maximum possible (s32)value */
u32 u32_min_value; /* minimum possible (u32)value */
u32 u32_max_value; /* maximum possible (u32)value */
/* parentage chain for liveness checking */
struct bpf_reg_state *parent;
/* Inside the callee two registers can be both PTR_TO_STACK like

2
include/linux/brcmphy.h
View File

@@ -79,6 +79,7 @@
#define MII_BCM54XX_ECR 0x10 /* BCM54xx extended control register */
#define MII_BCM54XX_ECR_IM 0x1000 /* Interrupt mask */
#define MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */
#define MII_BCM54XX_ECR_FIFOE 0x0001 /* FIFO elasticity */
#define MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */
#define MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */
@@ -119,6 +120,7 @@
#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x00
#define MII_BCM54XX_AUXCTL_ACTL_TX_6DB 0x0400
#define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800
#define MII_BCM54XX_AUXCTL_ACTL_EXT_PKT_LEN 0x4000
#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x07
#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN 0x0010

6
include/linux/buffer_head.h
View File

@@ -22,9 +22,6 @@ enum bh_state_bits {
BH_Dirty, /* Is dirty */
BH_Lock, /* Is locked */
BH_Req, /* Has been submitted for I/O */
BH_Uptodate_Lock,/* Used by the first bh in a page, to serialise
* IO completion of other buffers in the page
*/
BH_Mapped, /* Has a disk mapping */
BH_New, /* Disk mapping was newly created by get_block */
@@ -76,6 +73,9 @@ struct buffer_head {
struct address_space *b_assoc_map; /* mapping this buffer is
associated with */
atomic_t b_count; /* users using this buffer_head */
spinlock_t b_uptodate_lock; /* Used by the first bh in a page, to
* serialise IO completion of other
* buffers in the page */
};
/*

18
include/linux/ceph/ceph_fs.h
View File

@@ -444,8 +444,9 @@ union ceph_mds_request_args {
} __attribute__ ((packed)) lookupino;
} __attribute__ ((packed));
#define CEPH_MDS_FLAG_REPLAY 1 /* this is a replayed op */
#define CEPH_MDS_FLAG_WANT_DENTRY 2 /* want dentry in reply */
#define CEPH_MDS_FLAG_REPLAY 1 /* this is a replayed op */
#define CEPH_MDS_FLAG_WANT_DENTRY 2 /* want dentry in reply */
#define CEPH_MDS_FLAG_ASYNC 4 /* request is asynchronous */
struct ceph_mds_request_head {
__le64 oldest_client_tid;
@@ -530,6 +531,9 @@ struct ceph_mds_reply_lease {
__le32 seq;
} __attribute__ ((packed));
#define CEPH_LEASE_VALID (1 | 2) /* old and new bit values */
#define CEPH_LEASE_PRIMARY_LINK 4 /* primary linkage */
struct ceph_mds_reply_dirfrag {
__le32 frag; /* fragment */
__le32 auth; /* auth mds, if this is a delegation point */
@@ -564,6 +568,7 @@ struct ceph_filelock {
#define CEPH_FILE_MODE_RDWR 3 /* RD | WR */
#define CEPH_FILE_MODE_LAZY 4 /* lazy io */
#define CEPH_FILE_MODE_BITS 4
#define CEPH_FILE_MODE_MASK ((1 << CEPH_FILE_MODE_BITS) - 1)
int ceph_flags_to_mode(int flags);
@@ -655,10 +660,19 @@ int ceph_flags_to_mode(int flags);
#define CEPH_CAP_ANY (CEPH_CAP_ANY_RD | CEPH_CAP_ANY_EXCL | \
CEPH_CAP_ANY_FILE_WR | CEPH_CAP_FILE_LAZYIO | \
CEPH_CAP_PIN)
#define CEPH_CAP_ALL_FILE (CEPH_CAP_PIN | CEPH_CAP_ANY_SHARED | \
CEPH_CAP_AUTH_EXCL | CEPH_CAP_XATTR_EXCL | \
CEPH_CAP_ANY_FILE_RD | CEPH_CAP_ANY_FILE_WR)
#define CEPH_CAP_LOCKS (CEPH_LOCK_IFILE | CEPH_LOCK_IAUTH | CEPH_LOCK_ILINK | \
CEPH_LOCK_IXATTR)
/* cap masks async dir operations */
#define CEPH_CAP_DIR_CREATE CEPH_CAP_FILE_CACHE
#define CEPH_CAP_DIR_UNLINK CEPH_CAP_FILE_RD
#define CEPH_CAP_ANY_DIR_OPS (CEPH_CAP_FILE_CACHE | CEPH_CAP_FILE_RD | \
CEPH_CAP_FILE_WREXTEND | CEPH_CAP_FILE_LAZYIO)
int ceph_caps_for_mode(int mode);
enum {

14
include/linux/ceph/debugfs.h
View File

@@ -2,22 +2,8 @@
#ifndef _FS_CEPH_DEBUGFS_H
#define _FS_CEPH_DEBUGFS_H
#include <linux/ceph/ceph_debug.h>
#include <linux/ceph/types.h>
#define CEPH_DEFINE_SHOW_FUNC(name) \
static int name##_open(struct inode *inode, struct file *file) \
{ \
return single_open(file, name, inode->i_private); \
} \
\
static const struct file_operations name##_fops = { \
.open = name##_open, \
.read = seq_read, \
.llseek = seq_lseek, \
.release = single_release, \
};
/* debugfs.c */
extern void ceph_debugfs_init(void);
extern void ceph_debugfs_cleanup(void);

1
include/linux/ceph/libceph.h
View File

@@ -272,6 +272,7 @@ extern struct kmem_cache *ceph_cap_flush_cachep;
extern struct kmem_cache *ceph_dentry_cachep;
extern struct kmem_cache *ceph_file_cachep;
extern struct kmem_cache *ceph_dir_file_cachep;
extern struct kmem_cache *ceph_mds_request_cachep;
/* ceph_common.c */
extern bool libceph_compatible(void *data);

7
include/linux/ceph/messenger.h
View File

@@ -175,9 +175,10 @@ struct ceph_msg_data {
#endif /* CONFIG_BLOCK */
struct ceph_bvec_iter bvec_pos;
struct {
struct page **pages; /* NOT OWNER. */
struct page **pages;
size_t length; /* total # bytes */
unsigned int alignment; /* first page */
bool own_pages;
};
struct ceph_pagelist *pagelist;
};
@@ -356,8 +357,8 @@ extern void ceph_con_keepalive(struct ceph_connection *con);
extern bool ceph_con_keepalive_expired(struct ceph_connection *con,
unsigned long interval);
extern void ceph_msg_data_add_pages(struct ceph_msg *msg, struct page **pages,
size_t length, size_t alignment);
void ceph_msg_data_add_pages(struct ceph_msg *msg, struct page **pages,
size_t length, size_t alignment, bool own_pages);
extern void ceph_msg_data_add_pagelist(struct ceph_msg *msg,
struct ceph_pagelist *pagelist);
#ifdef CONFIG_BLOCK

17
include/linux/ceph/osd_client.h
View File

@@ -509,23 +509,6 @@ int ceph_osdc_call(struct ceph_osd_client *osdc,
struct page *req_page, size_t req_len,
struct page **resp_pages, size_t *resp_len);
extern int ceph_osdc_readpages(struct ceph_osd_client *osdc,
struct ceph_vino vino,
struct ceph_file_layout *layout,
u64 off, u64 *plen,
u32 truncate_seq, u64 truncate_size,
struct page **pages, int nr_pages,
int page_align);
extern int ceph_osdc_writepages(struct ceph_osd_client *osdc,
struct ceph_vino vino,
struct ceph_file_layout *layout,
struct ceph_snap_context *sc,
u64 off, u64 len,
u32 truncate_seq, u64 truncate_size,
struct timespec64 *mtime,
struct page **pages, int nr_pages);
int ceph_osdc_copy_from(struct ceph_osd_client *osdc,
u64 src_snapid, u64 src_version,
struct ceph_object_id *src_oid,

4
include/linux/ceph/osdmap.h
View File

@@ -37,6 +37,9 @@ int ceph_spg_compare(const struct ceph_spg *lhs, const struct ceph_spg *rhs);
#define CEPH_POOL_FLAG_HASHPSPOOL (1ULL << 0) /* hash pg seed and pool id
together */
#define CEPH_POOL_FLAG_FULL (1ULL << 1) /* pool is full */
#define CEPH_POOL_FLAG_FULL_QUOTA (1ULL << 10) /* pool ran out of quota,
will set FULL too */
#define CEPH_POOL_FLAG_NEARFULL (1ULL << 11) /* pool is nearfull */
struct ceph_pg_pool_info {
struct rb_node node;
@@ -304,5 +307,6 @@ extern struct ceph_pg_pool_info *ceph_pg_pool_by_id(struct ceph_osdmap *map,
extern const char *ceph_pg_pool_name_by_id(struct ceph_osdmap *map, u64 id);
extern int ceph_pg_poolid_by_name(struct ceph_osdmap *map, const char *name);
u64 ceph_pg_pool_flags(struct ceph_osdmap *map, u64 id);
#endif

6
include/linux/ceph/rados.h
View File

@@ -143,8 +143,10 @@ extern const char *ceph_osd_state_name(int s);
/*
* osd map flag bits
*/
#define CEPH_OSDMAP_NEARFULL (1<<0) /* sync writes (near ENOSPC) */
#define CEPH_OSDMAP_FULL (1<<1) /* no data writes (ENOSPC) */
#define CEPH_OSDMAP_NEARFULL (1<<0) /* sync writes (near ENOSPC),
not set since ~luminous */
#define CEPH_OSDMAP_FULL (1<<1) /* no data writes (ENOSPC),
not set since ~luminous */
#define CEPH_OSDMAP_PAUSERD (1<<2) /* pause all reads */
#define CEPH_OSDMAP_PAUSEWR (1<<3) /* pause all writes */
#define CEPH_OSDMAP_PAUSEREC (1<<4) /* pause recovery */

10
include/linux/cgroup-defs.h
View File

@@ -94,6 +94,11 @@ enum {
* Enable legacy local memory.events.
*/
CGRP_ROOT_MEMORY_LOCAL_EVENTS = (1 << 5),
/*
* Enable recursive subtree protection
*/
CGRP_ROOT_MEMORY_RECURSIVE_PROT = (1 << 6),
};
/* cftype->flags */
@@ -628,8 +633,9 @@ struct cgroup_subsys {
void (*cancel_attach)(struct cgroup_taskset *tset);
void (*attach)(struct cgroup_taskset *tset);
void (*post_attach)(void);
int (*can_fork)(struct task_struct *task);
void (*cancel_fork)(struct task_struct *task);
int (*can_fork)(struct task_struct *task,
struct css_set *cset);
void (*cancel_fork)(struct task_struct *task, struct css_set *cset);
void (*fork)(struct task_struct *task);
void (*exit)(struct task_struct *task);
void (*release)(struct task_struct *task);

24
include/linux/cgroup.h
View File

@@ -27,6 +27,8 @@
#include <linux/cgroup-defs.h>
struct kernel_clone_args;
#ifdef CONFIG_CGROUPS
/*
@@ -58,10 +60,8 @@ struct css_task_iter {
struct list_head *tcset_head;
struct list_head *task_pos;
struct list_head *tasks_head;
struct list_head *mg_tasks_head;
struct list_head *dying_tasks_head;
struct list_head *cur_tasks_head;
struct css_set *cur_cset;
struct css_set *cur_dcset;
struct task_struct *cur_task;
@@ -121,9 +121,12 @@ int proc_cgroup_show(struct seq_file *m, struct pid_namespace *ns,
struct pid *pid, struct task_struct *tsk);
void cgroup_fork(struct task_struct *p);
extern int cgroup_can_fork(struct task_struct *p);
extern void cgroup_cancel_fork(struct task_struct *p);
extern void cgroup_post_fork(struct task_struct *p);
extern int cgroup_can_fork(struct task_struct *p,
struct kernel_clone_args *kargs);
extern void cgroup_cancel_fork(struct task_struct *p,
struct kernel_clone_args *kargs);
extern void cgroup_post_fork(struct task_struct *p,
struct kernel_clone_args *kargs);
void cgroup_exit(struct task_struct *p);
void cgroup_release(struct task_struct *p);
void cgroup_free(struct task_struct *p);
@@ -707,9 +710,12 @@ static inline int cgroupstats_build(struct cgroupstats *stats,
struct dentry *dentry) { return -EINVAL; }
static inline void cgroup_fork(struct task_struct *p) {}
static inline int cgroup_can_fork(struct task_struct *p) { return 0; }
static inline void cgroup_cancel_fork(struct task_struct *p) {}
static inline void cgroup_post_fork(struct task_struct *p) {}
static inline int cgroup_can_fork(struct task_struct *p,
struct kernel_clone_args *kargs) { return 0; }
static inline void cgroup_cancel_fork(struct task_struct *p,
struct kernel_clone_args *kargs) {}
static inline void cgroup_post_fork(struct task_struct *p,
struct kernel_clone_args *kargs) {}
static inline void cgroup_exit(struct task_struct *p) {}
static inline void cgroup_release(struct task_struct *p) {}
static inline void cgroup_free(struct task_struct *p) {}

10
include/linux/clk-provider.h
View File

@@ -522,9 +522,9 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
* @clk_gate_flags: gate-specific flags for this clock
* @lock: shared register lock for this clock
*/
#define clk_hw_register_gate_parent_hw(dev, name, parent_name, flags, reg, \
#define clk_hw_register_gate_parent_hw(dev, name, parent_hw, flags, reg, \
bit_idx, clk_gate_flags, lock) \
__clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
__clk_hw_register_gate((dev), NULL, (name), NULL, (parent_hw), \
NULL, (flags), (reg), (bit_idx), \
(clk_gate_flags), (lock))
/**
@@ -539,10 +539,10 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
* @clk_gate_flags: gate-specific flags for this clock
* @lock: shared register lock for this clock
*/
#define clk_hw_register_gate_parent_data(dev, name, parent_name, flags, reg, \
#define clk_hw_register_gate_parent_data(dev, name, parent_data, flags, reg, \
bit_idx, clk_gate_flags, lock) \
__clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
NULL, (flags), (reg), (bit_idx), \
__clk_hw_register_gate((dev), NULL, (name), NULL, NULL, (parent_data), \
(flags), (reg), (bit_idx), \
(clk_gate_flags), (lock))
void clk_unregister_gate(struct clk *clk);
void clk_hw_unregister_gate(struct clk_hw *hw);

23
include/linux/clk/at91_pmc.h
View File

@@ -12,6 +12,9 @@
#ifndef AT91_PMC_H
#define AT91_PMC_H
#define AT91_PMC_V1 (1) /* PMC version 1 */
#define AT91_PMC_V2 (2) /* PMC version 2 [SAM9X60] */
#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
#define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */
@@ -30,16 +33,34 @@
#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */
#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */
#define AT91_PMC_PLL_CTRL0 0x0C /* PLL Control Register 0 [for SAM9X60] */
#define AT91_PMC_PLL_CTRL0_ENPLL (1 << 28) /* Enable PLL */
#define AT91_PMC_PLL_CTRL0_ENPLLCK (1 << 29) /* Enable PLL clock for PMC */
#define AT91_PMC_PLL_CTRL0_ENLOCK (1 << 31) /* Enable PLL lock */
#define AT91_PMC_PLL_CTRL1 0x10 /* PLL Control Register 1 [for SAM9X60] */
#define AT91_PMC_PCER 0x10 /* Peripheral Clock Enable Register */
#define AT91_PMC_PCDR 0x14 /* Peripheral Clock Disable Register */
#define AT91_PMC_PCSR 0x18 /* Peripheral Clock Status Register */
#define AT91_PMC_PLL_ACR 0x18 /* PLL Analog Control Register [for SAM9X60] */
#define AT91_PMC_PLL_ACR_DEFAULT_UPLL 0x12020010UL /* Default PLL ACR value for UPLL */
#define AT91_PMC_PLL_ACR_DEFAULT_PLLA 0x00020010UL /* Default PLL ACR value for PLLA */
#define AT91_PMC_PLL_ACR_UTMIVR (1 << 12) /* UPLL Voltage regulator Control */
#define AT91_PMC_PLL_ACR_UTMIBG (1 << 13) /* UPLL Bandgap Control */
#define AT91_CKGR_UCKR 0x1C /* UTMI Clock Register [some SAM9] */
#define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */
#define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */
#define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */
#define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */
#define AT91_PMC_PLL_UPDT 0x1C /* PMC PLL update register [for SAM9X60] */
#define AT91_PMC_PLL_UPDT_UPDATE (1 << 8) /* Update PLL settings */
#define AT91_PMC_PLL_UPDT_ID (1 << 0) /* PLL ID */
#define AT91_PMC_PLL_UPDT_STUPTIM (0xff << 16) /* Startup time */
#define AT91_CKGR_MOR 0x20 /* Main Oscillator Register [not on SAM9RL] */
#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */
@@ -180,6 +201,8 @@
#define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */
#define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */
#define AT91_PMC_PLL_ISR0 0xEC /* PLL Interrupt Status Register 0 [SAM9X60 only] */
#define AT91_PMC_PCER1 0x100 /* Peripheral Clock Enable Register 1 [SAMA5 only]*/
#define AT91_PMC_PCDR1 0x104 /* Peripheral Clock Enable Register 1 */
#define AT91_PMC_PCSR1 0x108 /* Peripheral Clock Enable Register 1 */

93
include/linux/clocksource.h
View File

@@ -23,18 +23,31 @@
struct clocksource;
struct module;
#ifdef CONFIG_ARCH_CLOCKSOURCE_DATA
#if defined(CONFIG_ARCH_CLOCKSOURCE_DATA) || \
defined(CONFIG_GENERIC_GETTIMEOFDAY)
#include <asm/clocksource.h>
#endif
#include <vdso/clocksource.h>
/**
* struct clocksource - hardware abstraction for a free running counter
* Provides mostly state-free accessors to the underlying hardware.
* This is the structure used for system time.
*
* @name: ptr to clocksource name
* @list: list head for registration
* @rating: rating value for selection (higher is better)
* @read: Returns a cycle value, passes clocksource as argument
* @mask: Bitmask for two's complement
* subtraction of non 64 bit counters
* @mult: Cycle to nanosecond multiplier
* @shift: Cycle to nanosecond divisor (power of two)
* @max_idle_ns: Maximum idle time permitted by the clocksource (nsecs)
* @maxadj: Maximum adjustment value to mult (~11%)
* @archdata: Optional arch-specific data
* @max_cycles: Maximum safe cycle value which won't overflow on
* multiplication
* @name: Pointer to clocksource name
* @list: List head for registration (internal)
* @rating: Rating value for selection (higher is better)
* To avoid rating inflation the following
* list should give you a guide as to how
* to assign your clocksource a rating
@@ -49,27 +62,23 @@ struct module;
* 400-499: Perfect
* The ideal clocksource. A must-use where
* available.
* @read: returns a cycle value, passes clocksource as argument
* @enable: optional function to enable the clocksource
* @disable: optional function to disable the clocksource
* @mask: bitmask for two's complement
* subtraction of non 64 bit counters
* @mult: cycle to nanosecond multiplier
* @shift: cycle to nanosecond divisor (power of two)
* @max_idle_ns: max idle time permitted by the clocksource (nsecs)
* @maxadj: maximum adjustment value to mult (~11%)
* @max_cycles: maximum safe cycle value which won't overflow on multiplication
* @flags: flags describing special properties
* @archdata: arch-specific data
* @suspend: suspend function for the clocksource, if necessary
* @resume: resume function for the clocksource, if necessary
* @flags: Flags describing special properties
* @enable: Optional function to enable the clocksource
* @disable: Optional function to disable the clocksource
* @suspend: Optional suspend function for the clocksource
* @resume: Optional resume function for the clocksource
* @mark_unstable: Optional function to inform the clocksource driver that
* the watchdog marked the clocksource unstable
* @owner: module reference, must be set by clocksource in modules
* @tick_stable: Optional function called periodically from the watchdog
* code to provide stable syncrhonization points
* @wd_list: List head to enqueue into the watchdog list (internal)
* @cs_last: Last clocksource value for clocksource watchdog
* @wd_last: Last watchdog value corresponding to @cs_last
* @owner: Module reference, must be set by clocksource in modules
*
* Note: This struct is not used in hotpathes of the timekeeping code
* because the timekeeper caches the hot path fields in its own data
* structure, so no line cache alignment is required,
* structure, so no cache line alignment is required,
*
* The pointer to the clocksource itself is handed to the read
* callback. If you need extra information there you can wrap struct
@@ -78,35 +87,37 @@ struct module;
* structure.
*/
struct clocksource {
u64 (*read)(struct clocksource *cs);
u64 mask;
u32 mult;
u32 shift;
u64 max_idle_ns;
u32 maxadj;
u64 (*read)(struct clocksource *cs);
u64 mask;
u32 mult;
u32 shift;
u64 max_idle_ns;
u32 maxadj;
#ifdef CONFIG_ARCH_CLOCKSOURCE_DATA
struct arch_clocksource_data archdata;
#endif
u64 max_cycles;
const char *name;
struct list_head list;
int rating;
int (*enable)(struct clocksource *cs);
void (*disable)(struct clocksource *cs);
unsigned long flags;
void (*suspend)(struct clocksource *cs);
void (*resume)(struct clocksource *cs);
void (*mark_unstable)(struct clocksource *cs);
void (*tick_stable)(struct clocksource *cs);
u64 max_cycles;
const char *name;
struct list_head list;
int rating;
enum vdso_clock_mode vdso_clock_mode;
unsigned long flags;
int (*enable)(struct clocksource *cs);
void (*disable)(struct clocksource *cs);
void (*suspend)(struct clocksource *cs);
void (*resume)(struct clocksource *cs);
void (*mark_unstable)(struct clocksource *cs);
void (*tick_stable)(struct clocksource *cs);
/* private: */
#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
/* Watchdog related data, used by the framework */
struct list_head wd_list;
u64 cs_last;
u64 wd_last;
struct list_head wd_list;
u64 cs_last;
u64 wd_last;
#endif
struct module *owner;
struct module *owner;
};
/*

14
include/linux/cma.h
View File

@@ -4,6 +4,7 @@
#include <linux/init.h>
#include <linux/types.h>
#include <linux/numa.h>
/*
* There is always at least global CMA area and a few optional
@@ -24,10 +25,19 @@ extern phys_addr_t cma_get_base(const struct cma *cma);
extern unsigned long cma_get_size(const struct cma *cma);
extern const char *cma_get_name(const struct cma *cma);
extern int __init cma_declare_contiguous(phys_addr_t base,
extern int __init cma_declare_contiguous_nid(phys_addr_t base,
phys_addr_t size, phys_addr_t limit,
phys_addr_t alignment, unsigned int order_per_bit,
bool fixed, const char *name, struct cma **res_cma);
bool fixed, const char *name, struct cma **res_cma,
int nid);
static inline int __init cma_declare_contiguous(phys_addr_t base,
phys_addr_t size, phys_addr_t limit,
phys_addr_t alignment, unsigned int order_per_bit,
bool fixed, const char *name, struct cma **res_cma)
{
return cma_declare_contiguous_nid(base, size, limit, alignment,
order_per_bit, fixed, name, res_cma, NUMA_NO_NODE);
}
extern int cma_init_reserved_mem(phys_addr_t base, phys_addr_t size,
unsigned int order_per_bit,
const char *name,

9
include/linux/compat.h
View File

@@ -454,12 +454,13 @@ extern void __user *compat_alloc_user_space(unsigned long len);
int compat_restore_altstack(const compat_stack_t __user *uss);
int __compat_save_altstack(compat_stack_t __user *, unsigned long);
#define compat_save_altstack_ex(uss, sp) do { \
#define unsafe_compat_save_altstack(uss, sp, label) do { \
compat_stack_t __user *__uss = uss; \
struct task_struct *t = current; \
put_user_ex(ptr_to_compat((void __user *)t->sas_ss_sp), &__uss->ss_sp); \
put_user_ex(t->sas_ss_flags, &__uss->ss_flags); \
put_user_ex(t->sas_ss_size, &__uss->ss_size); \
unsafe_put_user(ptr_to_compat((void __user *)t->sas_ss_sp), \
&__uss->ss_sp, label); \
unsafe_put_user(t->sas_ss_flags, &__uss->ss_flags, label); \
unsafe_put_user(t->sas_ss_size, &__uss->ss_size, label); \
if (t->sas_ss_flags & SS_AUTODISARM) \
sas_ss_reset(t); \
} while (0);

2
include/linux/compiler.h
View File

@@ -347,7 +347,7 @@ static inline void *offset_to_ptr(const int *off)
* compiler has support to do so.
*/
#define compiletime_assert(condition, msg) \
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
#define compiletime_assert_atomic_type(t) \
compiletime_assert(__native_word(t), \

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