From 00f02019990d9020321c446a04044b6ca05d20f8 Mon Sep 17 00:00:00 2001 From: Leon Elazar Date: Fri, 17 Mar 2017 12:02:58 -0400 Subject: [PATCH] drm/amd/display: Fix applying surface to underlay pipe 1. Locking all pipes before doing any changes 2. Applying surface for both top and bottom pipes Signed-off-by: Leon Elazar Acked-by: Harry Wentland Reviewed-by: Tony Cheng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/core/dc.c | 42 +++++++++++++++--------- 1 file changed, 26 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 6409d4d1d7f8..c0889ad8357e 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -1331,9 +1331,34 @@ void dc_update_surfaces_and_stream(struct dc *dc, if (!surface_count) /* reset */ core_dc->hwss.apply_ctx_for_surface(core_dc, NULL, context); + /* Lock pipes for provided surfaces */ for (i = 0; i < surface_count; i++) { struct core_surface *surface = DC_SURFACE_TO_CORE(srf_updates[i].surface); + for (j = 0; j < context->res_ctx.pool->pipe_count; j++) { + struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; + + if (pipe_ctx->surface != surface) + continue; + if (!pipe_ctx->tg->funcs->is_blanked(pipe_ctx->tg)) { + core_dc->hwss.pipe_control_lock( + core_dc, + pipe_ctx, + true); + } + } + } + + /* Perform requested Updates */ + for (i = 0; i < surface_count; i++) { + struct core_surface *surface = DC_SURFACE_TO_CORE(srf_updates[i].surface); + + if (update_type >= UPDATE_TYPE_MED) { + core_dc->hwss.apply_ctx_for_surface( + core_dc, surface, context); + context_timing_trace(dc, &context->res_ctx); + } + for (j = 0; j < context->res_ctx.pool->pipe_count; j++) { struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; struct pipe_ctx *cur_pipe_ctx; @@ -1342,22 +1367,6 @@ void dc_update_surfaces_and_stream(struct dc *dc, if (pipe_ctx->surface != surface) continue; - if (update_type >= UPDATE_TYPE_MED) { - /* only apply for top pipe */ - if (!pipe_ctx->top_pipe) { - core_dc->hwss.apply_ctx_for_surface(core_dc, - surface, context); - context_timing_trace(dc, &context->res_ctx); - } - } - - if (!pipe_ctx->tg->funcs->is_blanked(pipe_ctx->tg)) { - core_dc->hwss.pipe_control_lock( - core_dc, - pipe_ctx, - true); - } - if (srf_updates[i].flip_addr) core_dc->hwss.update_plane_addr(core_dc, pipe_ctx); @@ -1387,6 +1396,7 @@ void dc_update_surfaces_and_stream(struct dc *dc, } } + /* Unlock pipes */ for (i = context->res_ctx.pool->pipe_count - 1; i >= 0; i--) { struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];